公开(公告)号：US20070298129A1

公开(公告)日：2007-12-27

申请号：US11804588

申请日：2007-05-18

申请人： Byoung Gwag ,  Young Lee ,  Jin Shin ,  Sung Cho ,  Jae Noh ,  Jae Cho ,  Ki Kim ,  Hyang Lim ,  Jae Lee ,  Han Byun ,  Sun Ko ,  Sun Son ,  Sun Park

发明人： Byoung Gwag ,  Young Lee ,  Jin Shin ,  Sung Cho ,  Jae Noh ,  Jae Cho ,  Ki Kim ,  Hyang Lim ,  Jae Lee ,  Han Byun ,  Sun Ko ,  Sun Son ,  Sun Park

IPC分类号： A61K33/00 ,  A61K31/196 ,  A61P25/00 ,  A61P25/16 ,  A61P25/28 ,  C07C229/56

CPC分类号： A61K31/137 ,  A61K31/195 ,  A61K31/24 ,  A61K31/60 ,  A61K33/00 ,  A61K45/06 ,  A61K2300/00

摘要： The present invention relates to 2-hydroxy-alkylamino-benzoic acid derivatives and to a combination of cell necrosis inhibitor and lithium, process for the preparation of the derivatives or the combination, pharmaceutical formulation containing the derivatives or the combination, and use of the derivatives or the combination by either concomitant or sequential administration for improvement of treatment of neuronal death or neurological dysfunction. The derivatives and the combination of the present invention are useful for treating neurological diseases, such as amyotrophic lateral sclerosis (ALS, Lou Gehrig's disease), spinal muscular atrophy, Alzheimer's disease, Parkinson's disease, Huntington's disease, stroke, traumatic brain injury or spinal cord injury; and for treating ocular diseases such as glaucoma, diabetic retinopathy or macular degeneration.

摘要翻译： 本发明涉及2-羟基 - 烷基氨基 - 苯甲酸衍生物和细胞坏死物抑制剂与锂的组合，制备衍生物或组合的方法，含有衍生物或组合的药物制剂及其衍生物的用途 或通过伴随或连续施用来改善神经元死亡或神经功能障碍的治疗的组合。 本发明的衍生物和组合可用于治疗神经系统疾病，例如肌萎缩性侧索硬化（ALS，Lou Gehrig's disease），脊髓性肌萎缩症，阿尔茨海默氏病，帕金森病，亨廷顿病，中风，创伤性脑损伤或脊髓 伤害 并用于治疗眼部疾病如青光眼，糖尿病性视网膜病变或黄斑变性。

公开(公告)号：US20070049565A1

公开(公告)日：2007-03-01

申请号：US11503379

申请日：2006-08-11

申请人： Byoung Gwag ,  Young Lee ,  Jin Shin ,  Sung Cho ,  Jae Noh ,  Jae Cho ,  Ki Kim ,  Hyang Lim ,  Jae Lee ,  Han Byun

发明人： Byoung Gwag ,  Young Lee ,  Jin Shin ,  Sung Cho ,  Jae Noh ,  Jae Cho ,  Ki Kim ,  Hyang Lim ,  Jae Lee ,  Han Byun

IPC分类号： A61K31/60 ,  A61K31/195 ,  A61K31/24 ,  A61K31/137

CPC分类号： A61K31/24 ,  A61K31/137 ,  A61K31/195 ,  A61K31/60 ,  A61K33/00 ,  A61K45/06 ,  A61K2300/00

摘要： The present invention relates to a combination of cell necrosis inhibitor and lithium, process for the preparation of the combination, pharmaceutical formulation containing the combination and use of the combination by either concomitant or sequential administration for improvement of treatment of neuronal death or neurological dysfunction. The combination of the present invention shows a synergic effect and thus is useful for treating neurological diseases, such as amyotrophic lateral sclerosis (ALS, Lou Gehrig's disease), Alzheimer's disease, Parkinson's disease, Huntington's disease, stroke, traumatic brain injury or spinal cord injury; and for treating ocular diseases such as glaucoma, diabetic retinopathy or macular degeneration.

摘要翻译： 本发明涉及细胞坏死抑制剂和锂的组合，制备该组合的方法，含有组合的药物制剂以及通过伴随或连续施用组合使用以改善神经元死亡或神经功能障碍的治疗。 本发明的组合显示出协同效应，因此可用于治疗诸如肌萎缩性侧索硬化（ALS，Lou Gehrig's disease），阿尔茨海默病，帕金森病，亨廷顿病，中风，创伤性脑损伤或脊髓损伤等神经疾病 ; 并用于治疗眼部疾病如青光眼，糖尿病性视网膜病变或黄斑变性。

公开(公告)号：US20050054076A1

公开(公告)日：2005-03-10

申请号：US10916804

申请日：2004-08-12

申请人： Jae Cho ,  Byoung Lee ,  Dae Kim ,  Jin Lee ,  Young Park

发明人： Jae Cho ,  Byoung Lee ,  Dae Kim ,  Jin Lee ,  Young Park

IPC分类号： C12N15/09 ,  C12N1/21 ,  C12P13/08 ,  C12N1/20

CPC分类号： C12P13/08

摘要： An L-threonine-producing Escherichia coli strain and a method for producing the same are provided. The Escherchia coli strain contains chromosomal DNA with inactivated metJ gene. Therefore, expression repression of threonine biosynthesis genes by a metJ gene product is prevented, thereby producing a high concentration of threonine. Further, a high concentration of L-threonine can be produced in high yield using the method.

摘要翻译： 提供了产生L-苏氨酸的大肠杆菌菌株及其制备方法。 大肠埃希氏菌菌株含有具有灭活的metJ基因的染色体DNA。 因此，通过metJ基因产物抑制苏氨酸生物合成基因的表达抑制，从而产生高浓度的苏氨酸。 此外，可以使用该方法以高产率制备高浓度的L-苏氨酸。

公开(公告)号：US06817006B1

公开(公告)日：2004-11-09

申请号：US10104324

申请日：2002-03-22

申请人： Robert W. Wells ,  Zhi-Min Ling ,  Robert D. Patrie ,  Vincent L. Tong ,  Jae Cho ,  Shahin Toutounchi

发明人： Robert W. Wells ,  Zhi-Min Ling ,  Robert D. Patrie ,  Vincent L. Tong ,  Jae Cho ,  Shahin Toutounchi

IPC分类号： G06F1750

CPC分类号： G01R31/318519

摘要： Disclosed are methods for utilizing programmable logic devices that contain at least one localized defect. Such devices are tested to determine their suitability for implementing selected designs that may not require the resources impacted by the defect. If the FPGA is found to be unsuitable for one design, additional designs may be tested. The test methods in some embodiments employ test circuits derived from a user's design to verify PLD resources required for the design. The test circuits allow PLD vendors to verify the suitability of a PLD for a given user's design without requiring the PLD vendor to understand the user's design.

摘要翻译： 公开了利用包含至少一个局部缺陷的可编程逻辑器件的方法。 这些设备被测试以确定它们适用于实现可能不需要受缺陷影响的资源的选定设计。 如果发现FPGA不适合于一个设计，则可以测试其他设计。 在一些实施例中的测试方法使用从用户设计得出的测试电路来验证设计所需的PLD资源。 测试电路允许PLD供应商验证PLD对给定用户设计的适用性，而不需要PLD供应商了解用户的设计。

公开(公告)号：US20070221920A1

公开(公告)日：2007-09-27

申请号：US11804391

申请日：2007-05-17

申请人： Mohsen Mardi ,  Jae Cho ,  Xin Wu ,  Chih-Chung Wu ,  Shih-Liang Liang ,  Sanjiv Stokes ,  Hassan Bazargan

发明人： Mohsen Mardi ,  Jae Cho ,  Xin Wu ,  Chih-Chung Wu ,  Shih-Liang Liang ,  Sanjiv Stokes ,  Hassan Bazargan

IPC分类号： H01L23/485

CPC分类号： H01L22/32 ,  H01L24/05 ,  H01L24/06 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/05552 ,  H01L2224/05554 ,  H01L2224/05567 ,  H01L2224/05599 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H05K1/0268 ,  H01L2924/00012 ,  H01L2924/00

摘要： A semiconductor component having test pads and a method and apparatus for testing the same is described. In an example, an un-bumped substrate is obtained having a pattern of bond pads configured to support bumped contacts and a plurality of test pads. Each of the plurality of test pads is in electrical communication with a respective one of the bond pads. The substrate is tested using the plurality of test pads. In another example, a substrate is fabricated having a pattern of bond pads configured to support bumped contacts and a plurality of test pads. Each of the plurality of test pads is in electrical communication with a respective one of the bond pads. The substrate is tested using the plurality of test pads. An insulating layer is formed over the plurality of test pads.

摘要翻译： 描述了具有测试焊盘的半导体部件及其测试方法和装置。 在一个示例中，获得具有被配置为支撑凸起的触点和多个测试焊盘的接合焊盘图案的未凸起的衬底。 多个测试焊盘中的每一个与相应的一个接合焊盘电连通。 使用多个测试垫测试衬底。 在另一示例中，制造具有被配置为支撑凸起的触点和多个测试焊盘的接合焊盘图案的衬底。 多个测试焊盘中的每一个与相应的一个接合焊盘电连通。 使用多个测试垫测试衬底。 绝缘层形成在多个测试焊盘上。

公开(公告)号：US20060222833A1

公开(公告)日：2006-10-05

申请号：US11327111

申请日：2006-01-06

申请人： Il Maeng ,  Myeong Hong ,  Choon Lee ,  Jeong Kwak ,  Jae Cho ,  Seung Ra

发明人： Il Maeng ,  Myeong Hong ,  Choon Lee ,  Jeong Kwak ,  Jae Cho ,  Seung Ra

IPC分类号： B05D5/12 ,  B32B7/00

CPC分类号： H05K3/107 ,  H05K3/0014 ,  H05K3/005 ,  H05K2201/0209 ,  H05K2203/0108 ,  Y10T428/24917

摘要： The present invention relates to an imprinting mold for a printed circuit board, having excellent durability, and a method of manufacturing a printed circuit board using the same. Specifically, this invention provides an imprinting mold for a printed circuit board, having excellent durability, in which the mold having a surface structure corresponding to a plurality of via holes and a pattern to be formed is prepared by incorporating 30-80 parts by weight of a filler, having an average particle size of 0.1-5.0 μm, into 100 parts by weight of a heat or UV curing prepolymer. In addition, a method of manufacturing a printed circuit board using the imprinting mold is provided.

摘要翻译： 本发明涉及具有优异的耐久性的用于印刷电路板的印模，以及使用其的印刷电路板的制造方法。 具体而言，本发明提供一种印刷电路板的耐压性优异的耐压性，其中具有与多个通孔相对应的表面结构的模具和待形成的图案通过将30-80重量份的 将平均粒度为0.1-5.0μm的填料加入到100重量份的热固化或UV固化预聚物中。 此外，提供了使用压印模具制造印刷电路板的方法。

公开(公告)号：US06664808B2

公开(公告)日：2003-12-16

申请号：US09924365

申请日：2001-08-07

申请人： Zhi-Min Ling ,  Jae Cho ,  Robert W. Wells ,  Clay S. Johnson ,  Shelly G. Davis

发明人： Zhi-Min Ling ,  Jae Cho ,  Robert W. Wells ,  Clay S. Johnson ,  Shelly G. Davis

IPC分类号： H03K19177

CPC分类号： G01R31/318519

摘要： FPGAs that contain at least one localized defect may be used to implement some designs if the localized defect is not used in the designs. To determine if the FPGA is suitable to implement a design, the design is loaded into the FPGA. The FPGA is tested to determine whether it can execute the design accurately even with the localized defect. The FPGA will be marked as suitable for that design if it passes the test. If the FPGA is found to be unsuitable for one design, additional designs may be tested. Thus, a FPGA manufacturer can sell FPGAs that are normally discarded. As a result, the price of these FPGAs could be set significantly low.

公开(公告)号：US20070218573A1

公开(公告)日：2007-09-20

申请号：US11804496

申请日：2007-05-17

申请人： Mohsen Mardi ,  Jae Cho ,  Xin Wu ,  Chih-Chung Wu ,  Shih-Liang Liang ,  Sanjiv Stokes ,  Hassan Bazargan

发明人： Mohsen Mardi ,  Jae Cho ,  Xin Wu ,  Chih-Chung Wu ,  Shih-Liang Liang ,  Sanjiv Stokes ,  Hassan Bazargan

IPC分类号： H01L21/66

CPC分类号： H01L22/32 ,  H01L24/05 ,  H01L24/06 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/05552 ,  H01L2224/05554 ,  H01L2224/05567 ,  H01L2224/05599 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H05K1/0268 ,  H01L2924/00012 ,  H01L2924/00

摘要： A semiconductor component having test pads and a method and apparatus for testing the same is described. In an example, an un-bumped substrate is obtained having a pattern of bond pads configured to support bumped contacts and a plurality of test pads. Each of the plurality of test pads is in electrical communication with a respective one of the bond pads. The substrate is tested using the plurality of test pads. In another example, a substrate is fabricated having a pattern of bond pads configured to support bumped contacts and a plurality of test pads. Each of the plurality of test pads is in electrical communication with a respective one of the bond pads. The substrate is tested using the plurality of test pads. An insulating layer is formed over the plurality of test pads.

公开(公告)号：US07235412B1

公开(公告)日：2007-06-26

申请号：US10842770

申请日：2004-05-11

申请人： Mohsen Hossein Mardi ,  Jae Cho ,  Xin X. Wu ,  Chih-Chung Wu ,  Shih-Liang Liang ,  Sanjiv Stokes ,  Hassan K. Bazargan

发明人： Mohsen Hossein Mardi ,  Jae Cho ,  Xin X. Wu ,  Chih-Chung Wu ,  Shih-Liang Liang ,  Sanjiv Stokes ,  Hassan K. Bazargan

IPC分类号： H01L21/66

CPC分类号： H01L22/32 ,  H01L24/05 ,  H01L24/06 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/05552 ,  H01L2224/05554 ,  H01L2224/05567 ,  H01L2224/05599 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H05K1/0268 ,  H01L2924/00012 ,  H01L2924/00

摘要： A semiconductor component having test pads and a method and apparatus for testing the same is described. In an example, an un-bumped substrate is obtained having a pattern of bond pads configured to support bumped contacts and a plurality of test pads. Each of the plurality of test pads is in electrical communication with a respective one of the bond pads. The substrate is tested using the plurality of test pads. In another example, a substrate is fabricated having a pattern of bond pads configured to support bumped contacts and a plurality of test pads. Each of the plurality of test pads is in electrical communication with a respective one of the bond pads. The substrate is tested using the plurality of test pads. An insulating layer is formed over the plurality of test pads.

公开(公告)号：US20060063874A1

公开(公告)日：2006-03-23

申请号：US11141888

申请日：2005-06-01

申请人： Ki Lee ,  Jae Cho ,  Man Her

发明人： Ki Lee ,  Jae Cho ,  Man Her

IPC分类号： C08K3/22 ,  C08K3/34

CPC分类号： B82Y30/00 ,  C08K3/22 ,  C08K3/34 ,  C08K3/346 ,  C08K2201/011 ,  C08L23/06 ,  C08L23/0853 ,  C08L2201/02 ,  C08L23/02 ,  C08L2666/06

摘要： An incombustible polyolefin resin composition, particularly, an incombustible polyolefin resin composition comprising polyethylene resin, ethylene vinylacetate resin, inorganic hydroxide flame retardant and nano-clay. The composition has improved resin processability, product flexibility and non-dripping properties due to reduced specific weight while maintaining or improving incombustibility, by using a nano-clay additionally and an inorganic hydroxide flame retardant with a reduced content, as compared to the conventional incombustible polyolefin resin composition.

摘要翻译： 不燃性聚烯烃树脂组合物，特别是包含聚乙烯树脂，乙烯乙酸乙烯酯树脂，无机氢氧化物阻燃剂和纳米粘土的不燃性聚烯烃树脂组合物。 与常规不燃性聚烯烃相比，通过使用另外的纳米粘土和含量降低的无机氢氧化物阻燃剂，由于降低的比重，同时保持或改善不燃性，组合物具有改善的树脂加工性，产品柔软性和不滴落性 树脂组合物。