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    High efficiency LEDs and methods of manufacturing
    1.
    发明授权
    High efficiency LEDs and methods of manufacturing 有权

    公开(公告)号：US10658546B2

    公开(公告)日：2020-05-19

    申请号：US14602040

    申请日：2015-01-21

    申请人： CREE, INC.

    发明人： Matthew Donofrio ,  Pritish Kar ,  Sten Heikman ,  Harshad Golakia ,  Rajeev Acharya ,  Yuvaraj Dora

    IPC分类号： H01L33/46 ,  H01L33/14 ,  H01L33/38 ,  H01L33/00 ,  H01L33/42

    摘要： Simplified LED chip architectures or chip builds are disclosed that can result in simpler manufacturing processes using fewer steps. The LED structure can have fewer layers than conventional LED chips with the layers arranged in different ways for efficient fabrication and operation. The LED chips can comprise an active LED structure. A dielectric reflective layer is included adjacent to one of the oppositely doped layers. A metal reflective layer is on the dielectric reflective layer, wherein the dielectric and metal reflective layers extend beyond the edge of said active region. By extending the dielectric layer, the LED chips can emit with more efficiency by reflecting more LED light to emit in the desired direction. By extending the metal reflective layer beyond the edge of the active region, the metal reflective layer can serve as a current spreading layer and barrier, in addition to reflecting LED light to emit in the desired direction. The LED chips can also comprise self-aligned and self-limiting features that simplify etching processes during fabrication.

    CHIP WITH ENHANCED LIGHT EXTRACTION
    3.
    发明申请
    CHIP WITH ENHANCED LIGHT EXTRACTION 审中-公开
    具有增强的光提取的芯片

    公开(公告)号：US20150311387A1

    公开(公告)日：2015-10-29

    申请号：US14697282

    申请日：2015-04-27

    申请人： CREE, INC.

    发明人： Sten Heikman ,  Jeffrey Vincent DiMaria

    IPC分类号： H01L33/10 ,  H01L33/22 ,  H01L33/32 ,  H01L27/15 ,  H01L33/58 ,  H01L33/24 ,  H01L33/08 ,  H01L33/00 ,  H01L33/60

    CPC分类号： H01L33/10 ,  H01L27/156 ,  H01L33/22 ,  H01L33/382 ,  H01L33/405

    摘要： Described herein are devices and methods incorporating light extraction features for improving light extraction in light emitting diode (LED) chips, for example, thin-film semiconductor LED chips such as thin film GaN chips. These features can be located in the semiconductor diode region of an LED chip and are configured to improve device light extraction by redirecting light emitted by the chip's active region. In some embodiments, the light extraction features can comprise a material with a refractive index lower than the surrounding semiconductor material. In some embodiments, the light extraction features are shaped to improve light extraction and can be formed as protrusions, indentations and can comprise various features such as sloped sidewalls. Also disclosed herein are contact configurations for improving electrical conductivity in the disclosed devices.

    摘要翻译： 这里描述了结合光提取特征的装置和方法，用于改进发光二极管（LED）芯片中的光提取，例如薄膜半导体LED芯片，例如薄膜GaN芯片。 这些特征可以位于LED芯片的半导体二极管区域中并且被配置为通过重定向由芯片的有源区域发射的光来改善器件光提取。 在一些实施例中，光提取特征可以包括折射率低于周围半导体材料的材料。 在一些实施例中，光提取特征被成形为改善光提取并且可以形成为突起，凹陷，并且可以包括各种特征，例如倾斜的侧壁。 本文还公开了用于改善所公开的装置中的导电性的接触构造。

    LED PACKAGE WITH ENCAPSULANT HAVING PLANAR SURFACES
    4.
    发明申请
    LED PACKAGE WITH ENCAPSULANT HAVING PLANAR SURFACES 有权
    LED包装与具有平面表面的包装

    公开(公告)号：US20150194580A1

    公开(公告)日：2015-07-09

    申请号：US14661874

    申请日：2015-03-18

    申请人： CREE, INC.

    发明人： THEODORE LOWES ,  Eric Tarsa ,  Sten Heikman ,  Bernd Keller ,  Jesse Reiherzer ,  Hormoz Benjamin

    IPC分类号： H01L33/54 ,  H01L33/60 ,  H01L33/50

    CPC分类号： H01L33/54 ,  F21V9/00 ,  H01L33/502 ,  H01L33/504 ,  H01L33/505 ,  H01L33/60 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/0002 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

    摘要： LED packages are disclosed that are compact and efficiently emit light, and can comprise encapsulants with planar surfaces that refract and/or reflect light within the package encapsulant. The packages can also comprise a submount with one or more LEDs, and a blanket conversion material layer on the one or more LEDs and the submount. The encapsulant can be on the submount, over the LEDs, and light reflected within the encapsulant will reach the conversion material, where it will be absorbed and emitted omnidirectionally. This allows for reflected light to now escape from the encapsulant. This allows for efficient emission and a broader emission profile, for example when compared to conventional packages with hemispheric encapsulants or lenses. In certain embodiments, the LED package provides a higher chip area to LED package area ratio. By using an encapsulant with planar surfaces, the LED package can provide unique dimensional relationships between the various features and the LED package ratios, enabling more flexibility in using the packages in different applications.

    摘要翻译： 公开了紧凑且有效地发光的LED封装，并且可以包括具有折射和/或反射封装密封剂内的光的平坦表面的密封剂。 包装还可以包括具有一个或多个LED的底座以及一个或多个LED和底座上的毯子转换材料层。 密封剂可以在底座上，LED上方，并且在密封剂内部反射的光将到达转换材料，并将其全向吸收和发射。 这允许反射光现在从密封剂中逸出。 这允许例如当与具有半球密封剂或透镜的传统封装相比时，有效地发射和更宽的发射特征。 在某些实施例中，LED封装为LED封装面积比提供更高的芯片面积。 通过使用具有平面表面的密封剂，LED封装可以在各种特征和LED封装比之间提供独特的尺寸关系，使得在不同应用中使用封装更具灵活性。

    LED PACKAGE WITH MULTIPLE ELEMENT LIGHT SOURCE AND ENCAPSULANT HAVING PLANAR SURFACES
    5.
    发明申请
    LED PACKAGE WITH MULTIPLE ELEMENT LIGHT SOURCE AND ENCAPSULANT HAVING PLANAR SURFACES 有权
    带多个元件的LED封装光源和具有平面表面的封装

    公开(公告)号：US20130328073A1

    公开(公告)日：2013-12-12

    申请号：US13649067

    申请日：2012-10-10

    申请人： CREE, INC.

    发明人： THEODORE LOWES ,  Eric J. Tarsa ,  Sten Heikman ,  Bernd Keller ,  Jesse Reiherzer ,  Hormoz Benjamin

    IPC分类号： H01L33/50 ,  H01L33/54

    CPC分类号： H01L33/54 ,  F21V9/00 ,  H01L33/502 ,  H01L33/504 ,  H01L33/505 ,  H01L33/60 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/0002 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

    摘要： LED packages are disclosed that are compact and efficiently emit light, and can comprise encapsulants with planar surfaces that refract and/or reflect light within the package encapsulant. The packages can comprise a submount with a plurality of LEDs, which emit different colors of light, and a blanket conversion material layer on the LEDs and the submount. The encapsulant can be on the submount, over the LEDs, and light reflected within the encapsulant will reach the conversion material to be absorbed and emitted omnidirectionally. Reflected light can now escape the encapsulant, allowing for efficient emission and a broader emission profile, when compared to conventional packages with hemispheric encapsulants or lenses. The LED package can have a higher chip area to LED package area ratio. By using an encapsulant with planar surfaces, the LED package provides unique dimensional relationships between the features and LED package ratios, enabling more flexibility with different applications.

    摘要翻译： 公开了紧凑且有效地发光的LED封装，并且可以包括具有折射和/或反射封装密封剂内的光的平坦表面的密封剂。 包装可以包括具有发射不同颜色的光的多个LED的底座和LED和底座上的毯子转换材料层。 密封剂可以在基座上，LED上方，并且在密封剂内反射的光将到达转换材料以被全向吸收和发射。 当与具有半球密封剂或透镜的传统包装相比时，反射光现在可以逃避密封剂，从而有效地发射和更宽的发射特征。 LED封装可以具有更高的芯片面积与LED封装面积比。 通过使用具有平面表面的密封剂，LED封装在特征和LED封装比率之间提供独特的尺寸关系，从而在不同应用中实现更大的灵活性。

    LOW VOLTAGE DIODE WITH REDUCED PARASITIC RESISTANCE AND METHOD FOR FABRICATING
    6.
    发明申请
    LOW VOLTAGE DIODE WITH REDUCED PARASITIC RESISTANCE AND METHOD FOR FABRICATING 审中-公开
    具有降低阻抗的低电压二极管和制造方法

    公开(公告)号：US20130126894A1

    公开(公告)日：2013-05-23

    申请号：US13693929

    申请日：2012-12-04

    申请人： CREE, INC.

    发明人： Primit Parikh ,  Sten Heikman

    IPC分类号： H01L29/66 ,  H01L29/872

    CPC分类号： H01L29/66143 ,  H01L29/2003 ,  H01L29/475 ,  H01L29/66212 ,  H01L29/872

    摘要： A method of making a diode begins by depositing an AlxGa1-xN nucleation layer on a SiC substrate, then depositing an n+ GaN buffer layer, an n− GaN layer, an AlxGa1-xN barrier layer, and an SiO2 dielectric layer. A portion of the dielectric layer is removed and a Schottky metal deposited in the void. The dielectric layer is affixed to the support layer with a metal bonding layer using an Au—Sn utectic wafer bonding process, the substrate is removed using reactive ion etching to expose the n+ layer, selected portions of the n+, n−, and barrier layers are removed to form a mesa diode structure on the dielectric layer over the Schottky metal; and an ohmic contact is deposited on the n+ layer.

    摘要翻译： 制造二极管的方法开始于在SiC衬底上沉积Al x Ga 1-x N成核层，然后沉积n + GaN缓冲层，n-GaN层，Al x Ga 1-x N势垒层和SiO 2电介质层。 去除介电层的一部分并沉积在空隙中的肖特基金属。 使用Au-Sn结晶晶片接合工艺用金属接合层将电介质层固定到支撑层上，使用反应离子蚀刻去除衬底以露出n +层，n +，n-和阻挡层的选定部分 被去除以在肖特基金属上的介电层上形成台面二极管结构; 并且在n +层上沉积欧姆接触。

    Light emitting diode dielectric mirror
    8.
    发明授权
    Light emitting diode dielectric mirror 有权
    发光二极管电介质镜

    公开(公告)号：US09461201B2

    公开(公告)日：2016-10-04

    申请号：US13909927

    申请日：2013-06-04

    申请人： CREE, INC.

    发明人： Sten Heikman ,  James Ibbetson

    IPC分类号： H01L33/00 ,  H01L33/10 ,  H01L33/32 ,  H01L33/46 ,  H01L33/38 ,  H01L33/40

    CPC分类号： H01L33/10 ,  H01L33/32 ,  H01L33/38 ,  H01L33/405 ,  H01L33/46

    摘要： A high efficiency LED chip is disclosed that comprises an active LED structure comprising an active layer between two oppositely doped layers. A first reflective layer can be provided adjacent to one of the oppositely doped layers, with the first layer comprising a material with a different index of refraction than the active LED structure. The difference in IR between the active LED structure and the first reflective layer increases TIR of light at the junction. In some embodiments the first reflective layer can comprise an IR lower than the semiconductor material, increasing the amount of light that can experience TIR. Some embodiments of LED chips according to the present invention can also comprise a second reflective layer or metal layer on and used in conjunction with the first reflective layer such that light passing through the first reflective layer can be reflected by the second reflective layer.

    摘要翻译： 公开了一种高效率LED芯片，其包括在两个相对掺杂的层之间包括有源层的有源LED结构。 第一反射层可以与相对掺杂的层之一相邻地设置，第一层包括与有源LED结构不同的折射率的材料。 有源LED结构和第一反射层之间的IR差异增加了接合处的光的TIR。 在一些实施例中，第一反射层可以包括低于半导体材料的IR，增加可以体验TIR的光量。 根据本发明的LED芯片的一些实施例还可以包括第二反射层或金属层，并且与第一反射层结合使用，使得穿过第一反射层的光可被第二反射层反射。

    Low voltage diode with reduced parasitic resistance and method for fabricating
    9.
    发明授权
    Low voltage diode with reduced parasitic resistance and method for fabricating 有权
    降低寄生电阻的低压二极管和制造方法

    公开(公告)号：US09041139B2

    公开(公告)日：2015-05-26

    申请号：US13693929

    申请日：2012-12-04

    申请人： CREE, INC.

    发明人： Primit Parikh ,  Sten Heikman

    IPC分类号： H01L29/66 ,  H01L29/47 ,  H01L29/872 ,  H01L29/20

    CPC分类号： H01L29/66143 ,  H01L29/2003 ,  H01L29/475 ,  H01L29/66212 ,  H01L29/872

    摘要： A method of making a diode begins by depositing an AlxGa1-xN nucleation layer on a SiC substrate, then depositing an n+ GaN buffer layer, an n− GaN layer, an AlxGa1-xN barrier layer, and an SiO2 dielectric layer. A portion of the dielectric layer is removed and a Schottky metal deposited in the void. The dielectric layer is affixed to the support layer with a metal bonding layer using an Au—Sn utectic wafer bonding process, the substrate is removed using reactive ion etching to expose the n+ layer, selected portions of the n+, n−, and barrier layers are removed to form a mesa diode structure on the dielectric layer over the Schottky metal; and an ohmic contact is deposited on the n+ layer.

    摘要翻译： 制造二极管的方法开始于在SiC衬底上沉积Al x Ga 1-x N成核层，然后沉积n + GaN缓冲层，n-GaN层，Al x Ga 1-x N势垒层和SiO 2电介质层。 去除介电层的一部分并沉积在空隙中的肖特基金属。 使用Au-Sn结晶晶片接合工艺用金属接合层将电介质层固定到支撑层上，使用反应离子蚀刻去除衬底以露出n +层，n +，n-和阻挡层的选定部分 被去除以在肖特基金属上的介电层上形成台面二极管结构; 并且在n +层上沉积欧姆接触。