ELECTRONIC ELEMENT INCLUDING DIELECTRIC STACK
    2.
    发明申请
    ELECTRONIC ELEMENT INCLUDING DIELECTRIC STACK 审中-公开
    电子元件包括电介质堆叠

    公开(公告)号:US20140061869A1

    公开(公告)日:2014-03-06

    申请号:US13600266

    申请日:2012-08-31

    IPC分类号: H01L29/02

    摘要: An electronic element includes a substrate; a patterned first electrically conductive layer on the substrate; a patterned second electrically conductive layer on the substrate; and a dielectric stack on the substrate. A portion of the first electrically conductive layer and a portion of the second electrically conductive layer overlap each other such that an overlap region is present. At least a portion of the dielectric stack is positioned in the overlap region between the patterned first electrically conductive layer and the patterned second electrically conductive layer. The dielectric stack includes a first inorganic thin film dielectric material layer and a second inorganic thin film dielectric material layer. The first inorganic thin film dielectric material layer and the second inorganic thin film dielectric material layer have the same material composition.

    摘要翻译: 电子元件包括基板; 图案化的第一导电层; 图案化的第二导电层; 和基片上的电介质叠层。 第一导电层的一部分和第二导电层的一部分彼此重叠,使得存在重叠区域。 电介质堆叠的至少一部分位于图案化的第一导电层和图案化的第二导电层之间的重叠区域中。 电介质堆叠包括第一无机薄膜电介质材料层和第二无机薄膜电介质材料层。 第一无机薄膜电介质材料层和第二无机薄膜电介质材料层具有相同的材料组成。

    Patterned thin film dielectric stack formation
    6.
    发明授权
    Patterned thin film dielectric stack formation 有权
    图案化薄膜电介质叠层形成

    公开(公告)号:US08927434B2

    公开(公告)日:2015-01-06

    申请号:US13600274

    申请日:2012-08-31

    IPC分类号: H01L21/314

    摘要: A method of producing a patterned inorganic thin film dielectric stack includes providing a substrate. A first patterned deposition inhibiting material layer is provided on the substrate. A first inorganic thin film dielectric material layer is selectively deposited on a region of the substrate where the first deposition inhibiting material layer is not present using an atomic layer deposition process. The first deposition inhibiting and first inorganic thin film dielectric material layers are simultaneously treated after deposition of the first inorganic thin film dielectric material layer. A second patterned deposition inhibiting material layer is provided on the substrate. A second inorganic thin film dielectric material layer is selectively deposited on a region of the substrate where the second deposition inhibiting material layer is not present using an atomic layer deposition process. The first and second inorganic thin film dielectric material layers form a patterned inorganic thin film dielectric stack.

    摘要翻译: 制造图案化无机薄膜电介质叠层的方法包括提供基板。 第一图案化沉积抑制材料层设置在基板上。 使用原子层沉积工艺,在不存在第一沉积抑制材料层的基板的区域上选择性地沉积第一无机薄膜电介质材料层。 在沉积第一无机薄膜电介质材料层之后,同时处理第一沉积抑制和第一无机薄膜电介质材料层。 第二图案化的沉积抑制材料层设置在基板上。 使用原子层沉积工艺,在不存在第二沉积抑制材料层的基板的区域上选择性地沉积第二无机薄膜电介质材料层。 第一和第二无机薄膜电介质材料层形成图案化的无机薄膜电介质叠层。

    High performance thin film transistor
    7.
    发明授权
    High performance thin film transistor 有权
    高性能薄膜晶体管

    公开(公告)号:US08653516B1

    公开(公告)日:2014-02-18

    申请号:US13600323

    申请日:2012-08-31

    IPC分类号: H01L29/10

    摘要: A transistor includes a substrate; a gate including a first electrically conductive layer stack on the substrate; and a first inorganic thin film dielectric layer on the substrate with the first inorganic thin film dielectric layer having a first pattern. A second inorganic thin film dielectric layer, having a second pattern, is in contact with the first inorganic thin film dielectric layer. The first inorganic thin film dielectric layer and the second thin film dielectric layer have the same material composition. A third inorganic thin film dielectric layer has a third pattern. A semiconductor layer is in contact with and has the same pattern as the third inorganic thin film dielectric material layer. A source/drain includes a second electrically conductive layer stack.

    摘要翻译: 晶体管包括衬底; 栅极,包括在所述衬底上的第一导电层堆叠; 以及第一无机薄膜电介质层,其具有第一图案的第一无机薄膜电介质层。 具有第二图案的第二无机薄膜电介质层与第一无机薄膜电介质层接触。 第一无机薄膜电介质层和第二薄膜电介质层具有相同的材料组成。 第三无机薄膜电介质层具有第三图案。 半导体层与第三无机薄膜电介质材料层接触并具有相同的图案。 源极/漏极包括第二导电层堆叠。

    THIN FILM TRANSISTOR INCLUDING IMPROVED SEMICONDUCTOR INTERFACE
    10.
    发明申请
    THIN FILM TRANSISTOR INCLUDING IMPROVED SEMICONDUCTOR INTERFACE 审中-公开
    薄膜晶体管,包括改进的半导体界面

    公开(公告)号:US20140061795A1

    公开(公告)日:2014-03-06

    申请号:US13600302

    申请日:2012-08-31

    IPC分类号: H01L29/786

    摘要: A transistor includes a substrate; a gate including a first electrically conductive layer stack on the substrate; and a first inorganic thin film dielectric layer on the substrate with the first inorganic thin film dielectric layer having a first pattern. A second inorganic thin film dielectric layer has a second pattern. A semiconductor layer is in contact with and has the same pattern as the second inorganic thin film dielectric material layer. A source/drain includes a second electrically conductive layer stack.

    摘要翻译: 晶体管包括衬底; 栅极,包括在所述衬底上的第一导电层堆叠; 以及第一无机薄膜电介质层,其具有第一图案的第一无机薄膜电介质层。 第二无机薄膜电介质层具有第二图案。 半导体层与第二无机薄膜介电材料层接触并具有相同的图案。 源极/漏极包括第二导电层堆叠。