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公开(公告)号:US08846545B2
公开(公告)日:2014-09-30
申请号:US13600292
申请日:2012-08-31
IPC分类号: H01L21/31 , H01L21/469 , H01L21/00 , H01L21/84 , H01L21/44
CPC分类号: C23C16/042 , H01L21/02178 , H01L21/022 , H01L21/0228 , H01L21/02304 , H01L21/02422 , H01L21/02488 , H01L21/02521 , H01L21/02642 , H01L29/4908 , H01L29/66765
摘要: A method of producing an inorganic multi-layered thin film structure includes providing a substrate. A patterned deposition inhibiting material layer is provided on the substrate. A first inorganic thin film material layer is selectively deposited on a region of the substrate where the deposition inhibiting material layer is not present using an atomic layer deposition process. A second inorganic thin film material layer is selectively deposited on the region of the substrate where the thin film deposition inhibiting material layer is not present using an atomic layer deposition process.
摘要翻译: 无机多层薄膜结构体的制造方法包括提供基板。 在衬底上设置有图案化的沉积抑制材料层。 使用原子层沉积工艺,在不存在沉积抑制材料层的基板的区域上选择性地沉积第一无机薄膜材料层。 使用原子层沉积工艺,在不存在薄膜沉积抑制材料层的基板的区域上选择性地沉积第二无机薄膜材料层。
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公开(公告)号:US20140061869A1
公开(公告)日:2014-03-06
申请号:US13600266
申请日:2012-08-31
IPC分类号: H01L29/02
CPC分类号: H01L21/28008 , H01L21/02178 , H01L21/022 , H01L21/0228 , H01L21/02315 , H01L21/32 , H01L29/4908 , H01L29/66765
摘要: An electronic element includes a substrate; a patterned first electrically conductive layer on the substrate; a patterned second electrically conductive layer on the substrate; and a dielectric stack on the substrate. A portion of the first electrically conductive layer and a portion of the second electrically conductive layer overlap each other such that an overlap region is present. At least a portion of the dielectric stack is positioned in the overlap region between the patterned first electrically conductive layer and the patterned second electrically conductive layer. The dielectric stack includes a first inorganic thin film dielectric material layer and a second inorganic thin film dielectric material layer. The first inorganic thin film dielectric material layer and the second inorganic thin film dielectric material layer have the same material composition.
摘要翻译: 电子元件包括基板; 图案化的第一导电层; 图案化的第二导电层; 和基片上的电介质叠层。 第一导电层的一部分和第二导电层的一部分彼此重叠,使得存在重叠区域。 电介质堆叠的至少一部分位于图案化的第一导电层和图案化的第二导电层之间的重叠区域中。 电介质堆叠包括第一无机薄膜电介质材料层和第二无机薄膜电介质材料层。 第一无机薄膜电介质材料层和第二无机薄膜电介质材料层具有相同的材料组成。
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公开(公告)号:US20140065838A1
公开(公告)日:2014-03-06
申请号:US13600264
申请日:2012-08-31
IPC分类号: H01L21/3105 , H01L21/318 , H01L21/316
CPC分类号: H01L21/02178 , C23C16/04 , C23C16/45525 , H01L21/022 , H01L21/0228 , H01L21/02299 , H01L21/02334 , H01L21/0234 , H01L21/02348 , H01L29/4908 , H01L29/66765
摘要: A method of producing an inorganic thin film dielectric material layer includes providing a substrate. A first inorganic thin film dielectric material layer is deposited on the substrate using an atomic layer deposition process. The first inorganic thin film dielectric material layer is treated after its deposition. A second inorganic thin film dielectric material layer is deposited on the treated surface of the first inorganic thin film dielectric material layer using an atomic layer deposition process.
摘要翻译: 无机薄膜电介质材料层的制造方法包括提供基板。 使用原子层沉积工艺在衬底上沉积第一无机薄膜电介质材料层。 第一种无机薄膜介电材料层在沉积后进行处理。 使用原子层沉积工艺在第一无机薄膜电介质材料层的处理表面上沉积第二无机薄膜电介质材料层。
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公开(公告)号:US20140065803A1
公开(公告)日:2014-03-06
申请号:US13600292
申请日:2012-08-31
CPC分类号: C23C16/042 , H01L21/02178 , H01L21/022 , H01L21/0228 , H01L21/02304 , H01L21/02422 , H01L21/02488 , H01L21/02521 , H01L21/02642 , H01L29/4908 , H01L29/66765
摘要: A method of producing an inorganic multi-layered thin film structure includes providing a substrate. A patterned deposition inhibiting material layer is provided on the substrate. A first inorganic thin film material layer is selectively deposited on a region of the substrate where the deposition inhibiting material layer is not present using an atomic layer deposition process. A second inorganic thin film material layer is selectively deposited on the region of the substrate where the thin film deposition inhibiting material layer is not present using an atomic layer deposition process.
摘要翻译: 无机多层薄膜结构体的制造方法包括提供基板。 在衬底上设置有图案化的沉积抑制材料层。 使用原子层沉积工艺,在不存在沉积抑制材料层的基板的区域上选择性地沉积第一无机薄膜材料层。 使用原子层沉积工艺,在不存在薄膜沉积抑制材料层的基板的区域上选择性地沉积第二无机薄膜材料层。
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公开(公告)号:US20090081842A1
公开(公告)日:2009-03-26
申请号:US11861491
申请日:2007-09-26
申请人: Shelby F. Nelson , David H. Levy , Lyn M. Irving , Peter J. Cowdery-Corvan , Diane C. Freeman , Carolyn R. Ellinger
发明人: Shelby F. Nelson , David H. Levy , Lyn M. Irving , Peter J. Cowdery-Corvan , Diane C. Freeman , Carolyn R. Ellinger
IPC分类号: H01L21/336
CPC分类号: H01L27/1259 , B33Y80/00 , C23C16/407 , C23C16/45551 , C23C16/45595 , C23C16/545 , H01L27/1214 , H01L27/1225
摘要: The present invention relates to a process of making thin film electronic components and devices, such as thin film transistors, environmental barrier layers, capacitors, insulators and bus lines, where most or all of the layers are made by an atmospheric atomic layer deposition process.
摘要翻译: 本发明涉及薄膜电子元件和薄膜晶体管,环境屏障层,电容器,绝缘子和总线线路的制造方法,其中大部分或全部层通过大气原子层沉积工艺制成。
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公开(公告)号:US08927434B2
公开(公告)日:2015-01-06
申请号:US13600274
申请日:2012-08-31
IPC分类号: H01L21/314
CPC分类号: H01L21/02348 , C23C16/04 , C23C16/45525 , H01L21/02178 , H01L21/022 , H01L21/0228 , H01L21/02299 , H01L21/02334 , H01L21/0234 , H01L29/4908
摘要: A method of producing a patterned inorganic thin film dielectric stack includes providing a substrate. A first patterned deposition inhibiting material layer is provided on the substrate. A first inorganic thin film dielectric material layer is selectively deposited on a region of the substrate where the first deposition inhibiting material layer is not present using an atomic layer deposition process. The first deposition inhibiting and first inorganic thin film dielectric material layers are simultaneously treated after deposition of the first inorganic thin film dielectric material layer. A second patterned deposition inhibiting material layer is provided on the substrate. A second inorganic thin film dielectric material layer is selectively deposited on a region of the substrate where the second deposition inhibiting material layer is not present using an atomic layer deposition process. The first and second inorganic thin film dielectric material layers form a patterned inorganic thin film dielectric stack.
摘要翻译: 制造图案化无机薄膜电介质叠层的方法包括提供基板。 第一图案化沉积抑制材料层设置在基板上。 使用原子层沉积工艺,在不存在第一沉积抑制材料层的基板的区域上选择性地沉积第一无机薄膜电介质材料层。 在沉积第一无机薄膜电介质材料层之后,同时处理第一沉积抑制和第一无机薄膜电介质材料层。 第二图案化的沉积抑制材料层设置在基板上。 使用原子层沉积工艺,在不存在第二沉积抑制材料层的基板的区域上选择性地沉积第二无机薄膜电介质材料层。 第一和第二无机薄膜电介质材料层形成图案化的无机薄膜电介质叠层。
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公开(公告)号:US08653516B1
公开(公告)日:2014-02-18
申请号:US13600323
申请日:2012-08-31
IPC分类号: H01L29/10
CPC分类号: H01L29/4908 , H01L29/66969 , H01L29/7869
摘要: A transistor includes a substrate; a gate including a first electrically conductive layer stack on the substrate; and a first inorganic thin film dielectric layer on the substrate with the first inorganic thin film dielectric layer having a first pattern. A second inorganic thin film dielectric layer, having a second pattern, is in contact with the first inorganic thin film dielectric layer. The first inorganic thin film dielectric layer and the second thin film dielectric layer have the same material composition. A third inorganic thin film dielectric layer has a third pattern. A semiconductor layer is in contact with and has the same pattern as the third inorganic thin film dielectric material layer. A source/drain includes a second electrically conductive layer stack.
摘要翻译: 晶体管包括衬底; 栅极,包括在所述衬底上的第一导电层堆叠; 以及第一无机薄膜电介质层,其具有第一图案的第一无机薄膜电介质层。 具有第二图案的第二无机薄膜电介质层与第一无机薄膜电介质层接触。 第一无机薄膜电介质层和第二薄膜电介质层具有相同的材料组成。 第三无机薄膜电介质层具有第三图案。 半导体层与第三无机薄膜电介质材料层接触并具有相同的图案。 源极/漏极包括第二导电层堆叠。
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公开(公告)号:US07851380B2
公开(公告)日:2010-12-14
申请号:US11861491
申请日:2007-09-26
申请人: Shelby F. Nelson , David H. Levy , Lyn M. Irving , Peter J. Cowdery-Corvan , Diane C. Freeman , Carolyn R. Ellinger
发明人: Shelby F. Nelson , David H. Levy , Lyn M. Irving , Peter J. Cowdery-Corvan , Diane C. Freeman , Carolyn R. Ellinger
IPC分类号: H01L21/31
CPC分类号: H01L27/1259 , B33Y80/00 , C23C16/407 , C23C16/45551 , C23C16/45595 , C23C16/545 , H01L27/1214 , H01L27/1225
摘要: The present invention relates to a process of making thin film electronic components and devices, such as thin film transistors, environmental barrier layers, capacitors, insulators and bus lines, where most or all of the layers are made by an atmospheric atomic layer deposition process.
摘要翻译: 本发明涉及薄膜电子元件和薄膜晶体管,环境屏障层,电容器,绝缘子和总线线路的制造方法,其中大部分或全部层通过大气原子层沉积工艺制成。
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公开(公告)号:US08791023B2
公开(公告)日:2014-07-29
申请号:US13600287
申请日:2012-08-31
IPC分类号: H01L21/311
CPC分类号: H01L31/1884 , H01L21/02178 , H01L21/022 , H01L21/0228 , H01L21/02301 , H01L21/02315 , H01L21/02565 , H01L21/02573 , H01L21/0262 , H01L21/32 , H01L29/42384 , H01L29/4908 , H01L31/0392 , H01L31/03926 , Y02E10/50
摘要: A method of producing an inorganic thin film dielectric material layer includes providing a substrate. A first inorganic thin film dielectric material layer is deposited on the substrate using an atomic layer deposition process. The first inorganic thin film dielectric material layer is treated after its deposition. A patterned deposition inhibiting material layer is provided on the substrate. A second inorganic thin film dielectric material layer is selectively deposited on a region of the substrate where the deposition inhibiting material layer is not present using an atomic layer deposition process.
摘要翻译: 无机薄膜电介质材料层的制造方法包括提供基板。 使用原子层沉积工艺在衬底上沉积第一无机薄膜电介质材料层。 第一种无机薄膜介电材料层在沉积后进行处理。 在衬底上设置有图案化的沉积抑制材料层。 使用原子层沉积工艺,在不存在沉积抑制材料层的基板的区域上选择性地沉积第二无机薄膜电介质材料层。
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10.
公开(公告)号:US20140061795A1
公开(公告)日:2014-03-06
申请号:US13600302
申请日:2012-08-31
IPC分类号: H01L29/786
CPC分类号: H01L29/7869 , H01L29/42384 , H01L29/4908
摘要: A transistor includes a substrate; a gate including a first electrically conductive layer stack on the substrate; and a first inorganic thin film dielectric layer on the substrate with the first inorganic thin film dielectric layer having a first pattern. A second inorganic thin film dielectric layer has a second pattern. A semiconductor layer is in contact with and has the same pattern as the second inorganic thin film dielectric material layer. A source/drain includes a second electrically conductive layer stack.
摘要翻译: 晶体管包括衬底; 栅极,包括在所述衬底上的第一导电层堆叠; 以及第一无机薄膜电介质层,其具有第一图案的第一无机薄膜电介质层。 第二无机薄膜电介质层具有第二图案。 半导体层与第二无机薄膜介电材料层接触并具有相同的图案。 源极/漏极包括第二导电层堆叠。
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