公开(公告)号：US20100059886A1

公开(公告)日：2010-03-11

申请号：US12292261

申请日：2008-11-14

申请人： Chin-Long Wey ,  Chun-Ming Huang ,  Chien-Ming Wu ,  Chih-Chyan Yang ,  Wei-De Chien

发明人： Chin-Long Wey ,  Chun-Ming Huang ,  Chien-Ming Wu ,  Chih-Chyan Yang ,  Wei-De Chien

IPC分类号： H01L23/48

CPC分类号： H01L25/0655 ,  H01L23/3121 ,  H01L23/538 ,  H01L24/13 ,  H01L24/16 ,  H01L24/48 ,  H01L25/0652 ,  H01L25/18 ,  H01L2224/16 ,  H01L2224/48 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2224/0401 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： The present invention discloses a carrier structure of a System-on-Chip (SoC) with a custom interface. The carrier structure includes a substrate, at least one common die, at least one custom interface and a molding compound. The common die and the custom interface are disposed on the substrate. The molding compound is used to package the common die which electrically connects to the substrate and the custom interface respectively. The carrier structure which includes the common die can form a complete SoC by connecting to an expansive die through the custom interface. The carrier structure with the common die which can be tested and certified in advance allows reducing and simplifying the developing procedures of the SoC.

公开(公告)号：US07755177B2

公开(公告)日：2010-07-13

申请号：US12292261

申请日：2008-11-14

申请人： Chin-Long Wey ,  Chun-Ming Huang ,  Chien-Ming Wu ,  Chih-Chyan Yang ,  Wei-De Chien

发明人： Chin-Long Wey ,  Chun-Ming Huang ,  Chien-Ming Wu ,  Chih-Chyan Yang ,  Wei-De Chien

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L25/0655 ,  H01L23/3121 ,  H01L23/538 ,  H01L24/13 ,  H01L24/16 ,  H01L24/48 ,  H01L25/0652 ,  H01L25/18 ,  H01L2224/16 ,  H01L2224/48 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2224/0401 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： The present invention discloses a carrier structure of a System-on-Chip (SoC) with a custom interface. The carrier structure includes a substrate, at least one common die, at least one custom interface and a molding compound. The common die and the custom interface are disposed on the substrate. The molding compound is used to package the common die which electrically connects to the substrate and the custom interface respectively. The carrier structure which includes the common die can form a complete SoC by connecting to an expansive die through the custom interface. The carrier structure with the common die which can be tested and certified in advance allows reducing and simplifying the developing procedures of the SoC.

摘要翻译： 本发明公开了一种具有定制界面的片上系统（SoC）的载体结构。 载体结构包括基底，至少一个共同的模，至少一个定制界面和模塑料。 普通模具和定制界面设置在基板上。 模塑料用于包装分别与基板和定制界面电连接的公共模具。 包括通用管芯的载体结构可以通过定制界面连接到膨胀模具，形成完整的SoC。 具有可以预先测试和认证的共同芯片的载体结构可以减少和简化SoC的开发过程。

公开(公告)号：US20110282831A1

公开(公告)日：2011-11-17

申请号：US12821163

申请日：2010-06-23

申请人： Chun-Ming Huang ,  Chien-Ming Wu ,  Wei-De Chien ,  Wei-Chang Tsai ,  Chin-Long Wey ,  Yu-Tsang Chang

发明人： Chun-Ming Huang ,  Chien-Ming Wu ,  Wei-De Chien ,  Wei-Chang Tsai ,  Chin-Long Wey ,  Yu-Tsang Chang

IPC分类号： G06F17/30 ,  G06F7/00

CPC分类号： G06F9/4411

摘要： A device including a virtual drive system is provided. An image file can be identified as an ordinary physical disk drive via the device. The device includes a storage unit, an image management unit, and an operating-system interface. The storage unit is configured to store at least one image file. The image management unit includes an image management program which can manage the image files to be selected. The operating-system interface is connected by electrical signals with an operating-system apparatus and is controlled by the image management program to send a controlling signal to the operating-system apparatus. Therefore, the operating-system apparatus can identify as many physical disk drives as the corresponding selected image files.

摘要翻译： 提供了包括虚拟驱动系统的设备。 图像文件可以通过该设备被识别为普通的物理磁盘驱动器。 该设备包括存储单元，图像管理单元和操作系统接口。 存储单元被配置为存储至少一个图像文件。 图像管理单元包括能够管理要选择的图像文件的图像管理程序。 操作系统接口通过电信号与操作系统装置连接，并由图像管理程序控制，以将控制信号发送到操作系统装置。 因此，操作系统设备可以识别与相应的所选图像文件一样多的物理磁盘驱动器。

公开(公告)号：US20110188210A1

公开(公告)日：2011-08-04

申请号：US12752345

申请日：2010-04-01

申请人： Chun-Ming Huang ,  Chin-Long Wey ,  Chien-Ming Wu ,  Chih-Chyau Yang ,  Shih-Lun Chen ,  Chi-Shi Chen ,  Chi-Sheng Lin

发明人： Chun-Ming Huang ,  Chin-Long Wey ,  Chien-Ming Wu ,  Chih-Chyau Yang ,  Shih-Lun Chen ,  Chi-Shi Chen ,  Chi-Sheng Lin

IPC分类号： H05K1/14 ,  H05K7/00

CPC分类号： H05K1/14 ,  H01L2224/16227 ,  H01L2924/15153 ,  H01L2924/15311 ,  H05K7/00

摘要： A three-dimensional SoC structure formed by stacking multiple chip modules is provided. The three-dimensional SoC structure includes at least two vertical SoC modules and at least one connector module, wherein each connector module electrically connects two vertical SoC modules. Each vertical SoC module is constructed by stacking at least two chip modules vertically. Each chip module includes a module circuit board and at least one preset element. A recess is formed in each module circuit board and provided with a first connecting interface for electrically connecting with the corresponding at least one preset element. The at least two vertical SoC modules are connected by the connector module to form a three-dimensional SoC structure with multiple functions. Besides, the recesses formed in the module circuit boards provide effective heat dissipation paths for the preset elements.

摘要翻译： 提供了通过堆叠多个芯片模块形成的三维SoC结构。 三维SoC结构包括至少两个垂直SoC模块和至少一个连接器模块，其中每个连接器模块电连接两个垂直SoC模块。 每个垂直SoC模块通过垂直堆叠至少两个芯片模块构成。 每个芯片模块包括模块电路板和至少一个预设元件。 在每个模块电路板中形成凹部，并设置有用于与相应的至少一个预设元件电连接的第一连接接口。 至少两个垂直SoC模块通过连接器模块连接，形成具有多种功能的三维SoC结构。 此外，形成在模块电路板中的凹部为预设元件提供有效的散热路径。

公开(公告)号：US08199510B2

公开(公告)日：2012-06-12

申请号：US12685723

申请日：2010-01-12

申请人： Chun-Ming Huang ,  Chien-Ming Wu ,  Chih-Chyau Yang ,  Shih-Lun Chen ,  Chin-Long Wey ,  Chi-Shi Chen ,  Chi-Sheng Lin

发明人： Chun-Ming Huang ,  Chien-Ming Wu ,  Chih-Chyau Yang ,  Shih-Lun Chen ,  Chin-Long Wey ,  Chi-Shi Chen ,  Chi-Sheng Lin

IPC分类号： H05K7/20

CPC分类号： H05K7/20 ,  H01L23/49833 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/16145 ,  H01L2225/0652 ,  H01L2225/06572 ,  H01L2225/1023 ,  H01L2225/107 ,  H01L2225/1094 ,  H05K1/0272 ,  H05K1/144 ,  H05K1/181 ,  H05K3/284 ,  H05K2201/064 ,  H05K2201/09063 ,  H05K2201/10378 ,  H05K2201/10674 ,  H05K2201/2018 ,  H05K2203/1572

摘要： A multi-layer system-on-chip (SoC) module structure is provided. The multi-layer SoC module structure includes at least two circuit board module layers and at least one connector module layer. Each connector module layer is sandwiched between and thus electrically connects two circuit board module layers such that the SoC module structure is formed by stacking. Each circuit board module layer is composed of at least one circuit board module while each connector module layer is composed of at least one connector module. Hence, the SoC module structure can be manufactured as a three-dimensional structure, thus allowing highly flexible connections within the SoC module structure.

摘要翻译： 提供了多层片上系统（SoC）模块结构。 多层SoC模块结构包括至少两个电路板模块层和至少一个连接器模块层。 每个连接器模块层夹在两个电路板模块层之间并由此电连接，使得SoC模块结构通过堆叠形成。 每个电路板模块层由至少一个电路板模块组成，而每个连接器模块层由至少一个连接器模块组成。 因此，SoC模块结构可以制造为三维结构，从而允许SoC模块结构内的高度灵活的连接。

公开(公告)号：US20110096506A1

公开(公告)日：2011-04-28

申请号：US12685723

申请日：2010-01-12

申请人： Chun-Ming Huang ,  Chien-Ming Wu ,  Chih-Chyau Yang ,  Shih-Lun Chen ,  Chin-Long Wey ,  Chi-Shi Chen ,  Chi-Sheng Lin

发明人： Chun-Ming Huang ,  Chien-Ming Wu ,  Chih-Chyau Yang ,  Shih-Lun Chen ,  Chin-Long Wey ,  Chi-Shi Chen ,  Chi-Sheng Lin

IPC分类号： H05K7/20 ,  H05K7/00

CPC分类号： H05K7/20 ,  H01L23/49833 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/16145 ,  H01L2225/0652 ,  H01L2225/06572 ,  H01L2225/1023 ,  H01L2225/107 ,  H01L2225/1094 ,  H05K1/0272 ,  H05K1/144 ,  H05K1/181 ,  H05K3/284 ,  H05K2201/064 ,  H05K2201/09063 ,  H05K2201/10378 ,  H05K2201/10674 ,  H05K2201/2018 ,  H05K2203/1572

摘要： A multi-layer system-on-chip (SoC) module structure is provided. The multi-layer SoC module structure includes at least two circuit board module layers and at least one connector module layer. Each connector module layer is sandwiched between and thus electrically connects two circuit board module layers such that the SoC module structure is formed by stacking. Each circuit board module layer is composed of at least one circuit board module while each connector module layer is composed of at least one connector module. Hence, the SoC module structure can be manufactured as a three-dimensional structure, thus allowing highly flexible connections within the SoC module structure.

摘要翻译： 提供了多层片上系统（SoC）模块结构。 多层SoC模块结构包括至少两个电路板模块层和至少一个连接器模块层。 每个连接器模块层夹在两个电路板模块层之间并由此电连接，使得SoC模块结构通过堆叠形成。 每个电路板模块层由至少一个电路板模块组成，而每个连接器模块层由至少一个连接器模块组成。 因此，SoC模块结构可以制造为三维结构，从而允许SoC模块结构内的高度灵活的连接。

公开(公告)号：US08274794B2

公开(公告)日：2012-09-25

申请号：US12752345

申请日：2010-04-01

申请人： Chun-Ming Huang ,  Chin-Long Wey ,  Chien-Ming Wu ,  Chih-Chyau Yang ,  Shih-Lun Chen ,  Chi-Shi Chen ,  Chi-Sheng Lin

发明人： Chun-Ming Huang ,  Chin-Long Wey ,  Chien-Ming Wu ,  Chih-Chyau Yang ,  Shih-Lun Chen ,  Chi-Shi Chen ,  Chi-Sheng Lin

IPC分类号： H05K7/00 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H05K1/14 ,  H01L2224/16227 ,  H01L2924/15153 ,  H01L2924/15311 ,  H05K7/00

摘要： A three-dimensional SoC structure formed by stacking multiple chip modules is provided. The three-dimensional SoC structure includes at least two vertical SoC modules and at least one connector module, wherein each connector module electrically connects two vertical SoC modules. Each vertical SoC module is constructed by stacking at least two chip modules vertically. Each chip module includes a module circuit board and at least one preset element. A recess is formed in each module circuit board and provided with a first connecting interface for electrically connecting with the corresponding at least one preset element. The at least two vertical SoC modules are connected by the connector module to form a three-dimensional SoC structure with multiple functions. Besides, the recesses formed in the module circuit boards provide effective heat dissipation paths for the preset elements.

摘要翻译： 提供了通过堆叠多个芯片模块形成的三维SoC结构。 三维SoC结构包括至少两个垂直SoC模块和至少一个连接器模块，其中每个连接器模块电连接两个垂直SoC模块。 每个垂直SoC模块通过垂直堆叠至少两个芯片模块构成。 每个芯片模块包括模块电路板和至少一个预设元件。 在每个模块电路板中形成凹部，并设置有用于与相应的至少一个预设元件电连接的第一连接接口。 至少两个垂直SoC模块通过连接器模块连接，形成具有多种功能的三维SoC结构。 此外，形成在模块电路板中的凹部为预设元件提供有效的散热路径。

公开(公告)号：US20100330741A1

公开(公告)日：2010-12-30

申请号：US12570049

申请日：2009-09-30

申请人： Chun-Ming Huang ,  Chien-Ming Wu ,  Chih-Chyau Yang ,  Shih-Lun Chen ,  Chin-Long Wey ,  Chi-Shi Chen ,  Chi-Sheng Lin

发明人： Chun-Ming Huang ,  Chien-Ming Wu ,  Chih-Chyau Yang ,  Shih-Lun Chen ,  Chin-Long Wey ,  Chi-Shi Chen ,  Chi-Sheng Lin

IPC分类号： H01L21/56

CPC分类号： H01L23/3128 ,  H01L23/38 ,  H01L23/467 ,  H01L25/105 ,  H01L25/16 ,  H01L2225/1005 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/0002 ,  H01L2924/19105 ,  H01L2924/00

摘要： A fabrication method for a system-on-chip (SoC) module is provided. The fabrication method includes the steps of providing at least two SoC sub-modules and connecting the SoC sub-modules. The SoC sub-modules are electrically connected with each other by connection interfaces of the SoC sub-modules so as to form the SoC module. As the SoC sub-modules have been verified in advance, the time required for verifying the resulting SoC module can be significantly reduced. As for application-specific SoC modules, they are fabricated by connecting with application-specific SoC sub-modules via the appropriate connection interfaces. Thus, the time and costs for developing SoC modules can both be minimized.

摘要翻译： 提供了一种片上系统（SoC）模块的制造方法。 该制造方法包括提供至少两个SoC子模块并连接SoC子模块的步骤。 SoC子模块通过SoC子模块的连接接口彼此电连接，形成SoC模块。 由于SoC子模块已经被提前验证，所以可以显着地减少验证所得到的SoC模块所需的时间。 对于特定于应用的SoC模块，它们是通过与特定应用的SoC子模块通过适当的连接接口进行连接而制造的。 因此，开发SoC模块的时间和成本都可以最小化。

公开(公告)号：US20120102254A1

公开(公告)日：2012-04-26

申请号：US12961783

申请日：2010-12-07

申请人： Chun-Ming Huang ,  Chin-Long Wey ,  Hui-Ming Lin ,  Chien-Ming Wu ,  Kai-Chao Yang ,  Yu-Tsang Chang

发明人： Chun-Ming Huang ,  Chin-Long Wey ,  Hui-Ming Lin ,  Chien-Ming Wu ,  Kai-Chao Yang ,  Yu-Tsang Chang

IPC分类号： G06F13/20

CPC分类号： G06F13/385 ,  G06F2213/0058

摘要： The present invention discloses a virtualized peripheral hardware platform system. The virtualized peripheral hardware platform system includes a first hardware platform and a software platform, which is executed in a second hardware platform. The first hardware platform is in signal communication with the second hardware platform. The software platform not only simulates the operation of the peripheral device of the first hardware platform but also simulates input signals of virtual peripheral devices and then transmits the input signals to the first hardware platform to conduct further calculations. Furthermore, the input/output (I/O) interface of the second hardware platform can be simulated as the I/O interface of the first hardware platform, so as to decrease the number of the I/O interface which the first hardware platform needed and downsize the first hardware platform.

摘要翻译： 本发明公开了一种虚拟化的外围硬件平台系统。 虚拟化外设硬件平台系统包括第一个硬件平台和一个在第二个硬件平台上执行的软件平台。 第一个硬件平台与第二个硬件平台进行信号通信。 该软件平台不仅模拟第一硬件平台的外围设备的运行，而且模拟虚拟外围设备的输入信号，然后将输入信号发送到第一硬件平台进行进一步的计算。 此外，可以将第二硬件平台的输入/输出（I / O）接口模拟为第一硬件平台的I / O接口，从而减少第一硬件平台所需的I / O接口数量 并缩小了第一个硬件平台。

公开(公告)号：US20110181245A1

公开(公告)日：2011-07-28

申请号：US12728288

申请日：2010-03-22

申请人： Chin-Long Wey ,  Chun-Ming Huang ,  Shih-Lun Chen ,  Chi-Sheng Lin ,  Ting-Hsu Chien ,  Jiann-Jenn Wang

发明人： Chin-Long Wey ,  Chun-Ming Huang ,  Shih-Lun Chen ,  Chi-Sheng Lin ,  Ting-Hsu Chien ,  Jiann-Jenn Wang

IPC分类号： H02J7/00

CPC分类号： H02J7/0016 ,  H02J7/0019 ,  H02J7/0024 ,  Y02T10/7055

摘要： The present invention discloses a unitized charging and discharging battery management system and a programmable battery management module thereof The unitized charging and discharging battery management system includes a smart battery module and a programmable battery management module, which has a universal loop and a control unit. The smart battery module has at least two smart batteries which are electrically connected by a plurality of switches and circuits of the universal loop to form a charging/discharging loop in series/parallel. The control unit monitors the charging and discharging status of the smart batteries to turn on or off the switches accordingly, so as to manage the smart batteries, thereby enhancing the overall power efficacy of the smart battery module. Besides, the service life of the smart battery module is also prolonged due to the simultaneous charging and discharging capability.

摘要翻译： 本发明公开了一种单元化充放电电池管理系统及其可编程电池管理模块。该单元化充放电电池管理系统包括智能电池模块和可编程电池管理模块，其具有通用回路和控制单元。 智能电池模块具有至少两个智能电池，其通过多个开关和通用回路的电路电连接以形成串/并联的充电/放电回路。 控制单元监视智能电池的充电和放电状态，以相应地打开或关闭开关，以便管理智能电池，从而提高智能电池模块的整体功率效率。 此外，智能电池模块的使用寿命也由于同时的充放电能力而延长。