公开(公告)号：US08686560B2

公开(公告)日：2014-04-01

申请号：US12755929

申请日：2010-04-07

申请人： Pirooz Parvarandeh ,  Reynante Alvarado ,  Chiung C. Lo ,  Arkadii V. Samoilov

发明人： Pirooz Parvarandeh ,  Reynante Alvarado ,  Chiung C. Lo ,  Arkadii V. Samoilov

IPC分类号： H01L23/488

CPC分类号： H01L24/14 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L2224/0345 ,  H01L2224/0346 ,  H01L2224/03828 ,  H01L2224/0401 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/0603 ,  H01L2224/0613 ,  H01L2224/11001 ,  H01L2224/11312 ,  H01L2224/1132 ,  H01L2224/1134 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11849 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/1403 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/1703 ,  H01L2224/17051 ,  H01L2224/17517 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01068 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/1432 ,  H01L2924/1436 ,  H01L2924/3512 ,  H01L2224/05552

摘要： Wafer-level chip-scale package semiconductor devices are described that have bump assemblies configured to mitigate solder bump failures due to stresses, particularly stresses caused by CTE mismatch during thermal cycling tests, dynamic deformation during drop tests or cyclic bending tests, and so on. In an implementation, the wafer-level chip-scale package devices include an integrated circuit chip having two or more arrays of bump assemblies for mounting the device to a printed circuit board. At least one of the arrays includes bump assemblies that are configured to withstand higher levels of stress than the bump assemblies of the remaining arrays.

摘要翻译： 描述了具有凸块组件的晶片级芯片级封装半导体器件，所述凸块组件被配置为减轻由于应力导致的焊料凸块故障，特别是在热循环测试期间由CTE失配引起的应力，跌落测试期间的动态变形或循环弯曲测试等。 在一个实现中，晶片级芯片级封装器件包括具有两个或更多个凸块组件阵列的集成电路芯片，用于将器件安装到印刷电路板上。 所述阵列中的至少一个包括凸块组件，其被配置为承受比剩余阵列的凸块组件更高的应力水平。

公开(公告)号：US08278748B2

公开(公告)日：2012-10-02

申请号：US12707239

申请日：2010-02-17

申请人： Chiung C. Lo ,  Arkadii V. Samoilov ,  Reynante Alvarado

发明人： Chiung C. Lo ,  Arkadii V. Samoilov ,  Reynante Alvarado

IPC分类号： H01L23/52

CPC分类号： H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/64 ,  H01L24/66 ,  H01L24/69 ,  H01L24/81 ,  H01L24/89 ,  H01L2224/0401 ,  H01L2224/06102 ,  H01L2224/11914 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/1403 ,  H01L2224/81136 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/83191 ,  H01L2224/83194 ,  H01L2224/83907 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01068 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/3025

摘要： A wafer-level packaged semiconductor device is described. In an implementation, the device includes one or more self-assembled resilient leads disposed on an integrated circuit chip. Each of the resilient leads are configured to move from a first position wherein the resilient lead is held adjacent to the chip and a second position wherein the resilient lead is extended away from the chip to interconnect the chip to a printed circuit board. A guard is provided to protect the resilient leads when the resilient leads are in the first position. One or more attachment bumps may also be furnished to facilitate attachment of the device to the printed circuit board.

摘要翻译： 描述了晶片级封装半导体器件。 在一个实现中，该装置包括设置在集成电路芯片上的一个或多个自组装的弹性引线。 每个弹性引线构造成从第一位置移动，其中弹性引线邻近芯片保持，第二位置，其中弹性引线远离芯片延伸以将芯片与印刷电路板互连。 当弹性引线处于第一位置时，提供防护件以保护弹性引线。 还可以设置一个或多个附接凸块以便于将装置附接到印刷电路板。

公开(公告)号：US20110248398A1

公开(公告)日：2011-10-13

申请号：US12755929

申请日：2010-04-07

申请人： PIROOZ PARVARANDEH ,  Reynante Alvarado ,  Chiung C. Lo ,  Arkadii V. Samoilov

发明人： PIROOZ PARVARANDEH ,  Reynante Alvarado ,  Chiung C. Lo ,  Arkadii V. Samoilov

IPC分类号： H01L23/498 ,  H01L21/78 ,  H01L21/60 ,  H05K1/11

CPC分类号： H01L24/14 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L2224/0345 ,  H01L2224/0346 ,  H01L2224/03828 ,  H01L2224/0401 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/0603 ,  H01L2224/0613 ,  H01L2224/11001 ,  H01L2224/11312 ,  H01L2224/1132 ,  H01L2224/1134 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11849 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/1403 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/1703 ,  H01L2224/17051 ,  H01L2224/17517 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01068 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/1432 ,  H01L2924/1436 ,  H01L2924/3512 ,  H01L2224/05552

摘要： Wafer-level chip-scale package semiconductor devices are described that have bump assemblies configured to mitigate solder bump failures due to stresses, particularly stresses caused by CTE mismatch during thermal cycling tests, dynamic deformation during drop tests or cyclic bending tests, and so on. In an implementation, the wafer-level chip-scale package devices include an integrated circuit chip having two or more arrays of bump assemblies for mounting the device to a printed circuit board. At least one of the arrays includes bump assemblies that are configured to withstand higher levels of stress than the bump assemblies of the remaining arrays.

摘要翻译： 描述了具有凸块组件的晶片级芯片级封装半导体器件，所述凸块组件被配置为减轻由于应力导致的焊料凸块故障，特别是在热循环测试期间由CTE失配引起的应力，跌落测试期间的动态变形或循环弯曲测试等。 在一个实现中，晶片级芯片级封装器件包括具有两个或更多个凸块组件阵列的集成电路芯片，用于将器件安装到印刷电路板上。 所述阵列中的至少一个包括凸块组件，其被配置为承受比剩余阵列的凸块组件更高的应力水平。

公开(公告)号：US08188606B2

公开(公告)日：2012-05-29

申请号：US13085759

申请日：2011-04-13

申请人： Reynante Alvarado ,  Yuan Lu ,  Richard Redburn

发明人： Reynante Alvarado ,  Yuan Lu ,  Richard Redburn

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/05 ,  H01L23/3171 ,  H01L23/3192 ,  H01L24/02 ,  H01L24/03 ,  H01L24/13 ,  H01L2224/0235 ,  H01L2224/0239 ,  H01L2224/0345 ,  H01L2224/0346 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05022 ,  H01L2224/05073 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05541 ,  H01L2224/05548 ,  H01L2224/05554 ,  H01L2224/05555 ,  H01L2224/05567 ,  H01L2224/05572 ,  H01L2224/0558 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/1148 ,  H01L2224/13006 ,  H01L2224/13007 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48666 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48866 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10329 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/3011 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2224/13099 ,  H01L2924/00

摘要： A semiconductor package includes a device pad on a substrate. A polybenzoxazole (PBO) layer overlies the substrate, and the PBO layer has an opening to expose the device pad. A redistribution layer (RDL) comprises a landing pad, and the RDL is positioned on the PBO layer and conductively coupled to the device pad. A polymer layer is on the RDL, and an under bump metal pad (UBM) is on the landing pad and extends onto a top surface of the polymer layer. The UBM electrically connects to the landing pad through an opening in the polymer layer. A solder bump is secured to the UBM. A shortest distance from a center of the landing pad to an outer edge of the landing pad, and a shortest distance from a center of the UBM to an outer edge of the UBM are in a ratio that ranges from 0.5:1 up to 0.95:1.

摘要翻译： 半导体封装包括在衬底上的器件焊盘。 聚苯并恶唑（PBO）层覆盖在基底上，并且PBO层具有露出装置垫的开口。 再分配层（RDL）包括着陆焊盘，并且RDL定位在PBO层上并且导电地耦合到器件焊盘。 聚合物层位于RDL上，底部凸块金属垫（UBM）位于着陆垫上并延伸到聚合物层的顶表面上。 UBM通过聚合物层中的开口与着陆垫电连接。 焊接凸块固定在UBM上。 从着陆焊盘的中心到着陆焊盘的外边缘的最短距离，并且从UBM的中心到UBM的外边缘的最短距离的范围为0.5:1至0.95： 1。

公开(公告)号：US20110186995A1

公开(公告)日：2011-08-04

申请号：US13085759

申请日：2011-04-13

申请人： Reynante Alvarado ,  Yuan Lu ,  Richard Redburn

发明人： Reynante Alvarado ,  Yuan Lu ,  Richard Redburn

IPC分类号： H01L23/498

CPC分类号： H01L24/05 ,  H01L23/3171 ,  H01L23/3192 ,  H01L24/02 ,  H01L24/03 ,  H01L24/13 ,  H01L2224/0235 ,  H01L2224/0239 ,  H01L2224/0345 ,  H01L2224/0346 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05022 ,  H01L2224/05073 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05541 ,  H01L2224/05548 ,  H01L2224/05554 ,  H01L2224/05555 ,  H01L2224/05567 ,  H01L2224/05572 ,  H01L2224/0558 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/1148 ,  H01L2224/13006 ,  H01L2224/13007 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48666 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48866 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10329 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/3011 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2224/13099 ,  H01L2924/00

摘要： A semiconductor package includes a device pad on a substrate. A polybenzoxazole (PBO) layer overlies the substrate, and the PBO layer has an opening to expose the device pad. A redistribution layer (RDL) comprises a landing pad, and the RDL is positioned on the PBO layer and conductively coupled to the device pad. A polymer layer is on the RDL, and an under bump metal pad (UBM) is on the landing pad and extends onto a top surface of the polymer layer. The UBM electrically connects to the landing pad through an opening in the polymer layer. A solder bump is secured to the UBM. A shortest distance from a center of the landing pad to an outer edge of the landing pad, and a shortest distance from a center of the UBM to an outer edge of the UBM are in a ratio that ranges from 0.5:1 up to 0.95:1.

摘要翻译： 半导体封装包括在衬底上的器件焊盘。 聚苯并恶唑（PBO）层覆盖在基底上，并且PBO层具有露出装置垫的开口。 再分配层（RDL）包括着陆焊盘，并且RDL定位在PBO层上并且导电地耦合到器件焊盘。 聚合物层位于RDL上，底部凸块金属垫（UBM）位于着陆垫上并延伸到聚合物层的顶表面上。 UBM通过聚合物层中的开口与着陆垫电连接。 焊接凸块固定在UBM上。 从着陆焊盘的中心到着陆焊盘的外边缘的最短距离，并且从UBM的中心到UBM的外边缘的最短距离的范围为0.5:1至0.95： 1。

公开(公告)号：US20080308934A1

公开(公告)日：2008-12-18

申请号：US12107009

申请日：2008-04-21

申请人： Reynante Alvarado ,  Yuan Lu ,  Richard Redburn

发明人： Reynante Alvarado ,  Yuan Lu ,  Richard Redburn

IPC分类号： H01L23/52

CPC分类号： H01L24/05 ,  H01L23/3171 ,  H01L23/3192 ,  H01L24/02 ,  H01L24/03 ,  H01L24/13 ,  H01L2224/0235 ,  H01L2224/0239 ,  H01L2224/0345 ,  H01L2224/0346 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05022 ,  H01L2224/05073 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05541 ,  H01L2224/05548 ,  H01L2224/05554 ,  H01L2224/05555 ,  H01L2224/05567 ,  H01L2224/05572 ,  H01L2224/0558 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/1148 ,  H01L2224/13006 ,  H01L2224/13007 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48666 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48866 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10329 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/3011 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2224/13099 ,  H01L2924/00

摘要： An apparatus and method for a semiconductor package including a bump on input-output (IO) structure are disclosed involving a device pad, an under bump metal pad (UBM), a polymer, and a passivation layer. The shortest distance from the center of the device pad to its outer edge, and the shortest distance from the center of the UBM to its outer edge are in a ratio from 0.5:1 to 0.95:1. Also, the shortest distance from the center of the polymer to its outer edge, and the shortest distance from the center of the UBM to its outer edge are in a ratio from 0.35:1 to 0.85:1. Additionally, the shortest distance from the center of the passivation layer to its outer edge, and the shortest distance from the center of the UBM to its outer edge are in a ratio from 0.35:1 to 0.80:1.

摘要翻译： 公开了一种用于包括输入 - 输出（IO）结构上的凸块的半导体封装的装置和方法，其涉及器件焊盘，凸块下金属焊盘（UBM），聚合物和钝化层。 从装置衬垫的中心到其外边缘的最短距离以及从UBM的中心到其外边缘的最短距离的比例为0.5:1至0.95:1。 此外，从聚合物的中心到其外边缘的最短距离以及从UBM的中心到其外边缘的最短距离的比例为0.35:1至0.85:1。 此外，从钝化层的中心到其外边缘的最短距离以及从UBM的中心到其外边缘的最短距离的比例为0.35:1至0.80:1。

公开(公告)号：US08446019B2

公开(公告)日：2013-05-21

申请号：US13457311

申请日：2012-04-26

申请人： Reynante Alvarado ,  Yuan Lu ,  Richard Redburn

发明人： Reynante Alvarado ,  Yuan Lu ,  Richard Redburn

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/05 ,  H01L23/3171 ,  H01L23/3192 ,  H01L24/02 ,  H01L24/03 ,  H01L24/13 ,  H01L2224/0235 ,  H01L2224/0239 ,  H01L2224/0345 ,  H01L2224/0346 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05022 ,  H01L2224/05073 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05541 ,  H01L2224/05548 ,  H01L2224/05554 ,  H01L2224/05555 ,  H01L2224/05567 ,  H01L2224/05572 ,  H01L2224/0558 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/1148 ,  H01L2224/13006 ,  H01L2224/13007 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48666 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48866 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10329 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/3011 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2224/13099 ,  H01L2924/00

摘要： A semiconductor package includes a device pad on a substrate. A first polymer layer overlies the substrate, and the first polymer layer has an opening to expose the device pad. In one embodiment, a redistribution layer (RDL) comprises a landing pad, and the RDL is positioned on the first polymer layer and conductively coupled to the device pad. A second polymer layer is on the RDL, and an under bump metal pad (UBM) is on the landing pad and extends onto a top surface of the second polymer layer. In one embodiment, a shortest distance from a center of the landing pad to an outer edge of the landing pad, and a shortest distance from a center of the UBM to an outer edge of the UBM are in a ratio that ranges from 0.5:1 up to 0.95:1.

摘要翻译： 半导体封装包括在衬底上的器件焊盘。 第一聚合物层覆盖在基底上，第一聚合物层具有露出装置垫的开口。 在一个实施例中，再分配层（RDL）包括着陆焊盘，并且RDL定位在第一聚合物层上并且导电地耦合到器件焊盘。 第二聚合物层位于RDL上，下凸块金属垫（UBM）在着陆垫上并延伸到第二聚合物层的顶表面上。 在一个实施例中，从着陆焊盘的中心到着陆焊盘的外边缘的最短距离以及从UBM的中心到UBM的外边缘的最短距离的范围为0.5:1 高达0.95：1。

公开(公告)号：US20120228765A1

公开(公告)日：2012-09-13

申请号：US13457311

申请日：2012-04-26

申请人： Reynante Alvarado ,  Yuan Lu ,  Richard Redburn

发明人： Reynante Alvarado ,  Yuan Lu ,  Richard Redburn

IPC分类号： H01L23/485

CPC分类号： H01L24/05 ,  H01L23/3171 ,  H01L23/3192 ,  H01L24/02 ,  H01L24/03 ,  H01L24/13 ,  H01L2224/0235 ,  H01L2224/0239 ,  H01L2224/0345 ,  H01L2224/0346 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05022 ,  H01L2224/05073 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05541 ,  H01L2224/05548 ,  H01L2224/05554 ,  H01L2224/05555 ,  H01L2224/05567 ,  H01L2224/05572 ,  H01L2224/0558 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/1148 ,  H01L2224/13006 ,  H01L2224/13007 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48666 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48866 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10329 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/3011 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2224/13099 ,  H01L2924/00

摘要： A semiconductor package includes a device pad on a substrate. A first polymer layer overlies the substrate, and the first polymer layer has an opening to expose the device pad. In one embodiment, a redistribution layer (RDL) comprises a landing pad, and the RDL is positioned on the first polymer layer and conductively coupled to the device pad. A second polymer layer is on the RDL, and an under bump metal pad (UBM) is on the landing pad and extends onto a top surface of the second polymer layer. In one embodiment, a shortest distance from a center of the landing pad to an outer edge of the landing pad, and a shortest distance from a center of the UBM to an outer edge of the UBM are in a ratio that ranges from 0.5:1 up to 0.95:1.

摘要翻译： 半导体封装包括在衬底上的器件焊盘。 第一聚合物层覆盖在基底上，第一聚合物层具有露出装置垫的开口。 在一个实施例中，再分配层（RDL）包括着陆焊盘，并且RDL定位在第一聚合物层上并且导电地耦合到器件焊盘。 第二聚合物层位于RDL上，下凸块金属垫（UBM）在着陆垫上并延伸到第二聚合物层的顶表面上。 在一个实施例中，从着陆焊盘的中心到着陆焊盘的外边缘的最短距离以及从UBM的中心到UBM的外边缘的最短距离的范围为0.5:1 高达0.95：1。

公开(公告)号：US07973418B2

公开(公告)日：2011-07-05

申请号：US12107009

申请日：2008-04-21

申请人： Reynante Alvarado ,  Yuan Lu ,  Richard Redburn

发明人： Reynante Alvarado ,  Yuan Lu ,  Richard Redburn

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/05 ,  H01L23/3171 ,  H01L23/3192 ,  H01L24/02 ,  H01L24/03 ,  H01L24/13 ,  H01L2224/0235 ,  H01L2224/0239 ,  H01L2224/0345 ,  H01L2224/0346 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05022 ,  H01L2224/05073 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05541 ,  H01L2224/05548 ,  H01L2224/05554 ,  H01L2224/05555 ,  H01L2224/05567 ,  H01L2224/05572 ,  H01L2224/0558 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/1148 ,  H01L2224/13006 ,  H01L2224/13007 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48666 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48866 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10329 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/3011 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2224/13099 ,  H01L2924/00

摘要： An apparatus and method for a semiconductor package including a bump on input-output (IO) structure are disclosed involving a device pad, an under bump metal pad (UBM), a polymer, and a passivation layer. The shortest distance from the center of the device pad to its outer edge, and the shortest distance from the center of the UBM to its outer edge are in a ratio from 0.5:1 to 0.95:1. Also, the shortest distance from the center of the polymer to its outer edge, and the shortest distance from the center of the UBM to its outer edge are in a ratio from 0.35:1 to 0.85:1. Additionally, the shortest distance from the center of the passivation layer to its outer edge, and the shortest distance from the center of the UBM to its outer edge are in a ratio from 0.35:1 to 0.80:1.

摘要翻译： 公开了一种用于包括输入 - 输出（IO）结构上的凸块的半导体封装的装置和方法，其涉及器件焊盘，下凸块金属焊盘（UBM），聚合物和钝化层。 从装置衬垫的中心到其外边缘的最短距离以及从UBM的中心到其外边缘的最短距离的比例为0.5:1至0.95:1。 此外，从聚合物的中心到其外边缘的最短距离以及从UBM的中心到其外边缘的最短距离的比例为0.35:1至0.85:1。 此外，从钝化层的中心到其外边缘的最短距离以及从UBM的中心到其外边缘的最短距离的比例为0.35:1至0.80:1。