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    Method for forming a selective contact and local interconnect in situ and semiconductor devices carrying the same
    1.
    发明授权
    Method for forming a selective contact and local interconnect in situ and semiconductor devices carrying the same 失效
    用于形成选择性接触和局部互连原位以及携带其的半导体器件的方法

    公开(公告)号：US06372643B1

    公开(公告)日：2002-04-16

    申请号：US09056309

    申请日：1998-04-07

    申请人： Christopher W. Hill ,  Weimin Li ,  Gurtej S. Sandhu

    发明人： Christopher W. Hill ,  Weimin Li ,  Gurtej S. Sandhu

    IPC分类号： H01L2144

    CPC分类号： H01L21/28568 ,  C23C16/0272 ,  C23C16/44 ,  H01L21/28518 ,  H01L21/28556 ,  H01L21/28562 ,  H01L21/76877

    摘要： A process for the in situ formation of a selective contact and a local interconnect on a semiconductor substrate. The exposed semiconductor substrate regions of a semiconductor device structure may be treated in a plasma to enhance the adhesiveness of a selective contact thereto. The semiconductor device structure is positioned within a reaction chamber, wherein a selective contact is deposited onto the exposed semiconductor substrate regions, Any residual selective contact material may be removed from oxide surfaces either intermediately or after selective contact deposition. While the semiconductor device remains in the reaction chamber, a local interconnect is deposited over the semiconductor device structure. The local interconnect may then be patterned. Subsequent layers may be deposited over the local interconnect. The present invention also includes semiconductor device structures formed by the inventive process.

    摘要翻译： 用于在半导体衬底上原位形成选择性接触和局部互连的方法。 可以在等离子体中处理半导体器件结构的暴露的半导体衬底区域以增强与其的选择性接触的粘合性。 半导体器件结构位于反应室内，其中选择性接触沉积在暴露的半导体衬底区域上。任何残留的选择性接触材料可以在中间或选择性接触沉积之后从氧化物表面去除。 当半导体器件保留在反应室中时，在半导体器件结构上沉积局部互连。 然后可以对局部互连进行图案化。 随后的层可以沉积在局部互连上。 本发明还包括通过本发明方法形成的半导体器件结构。

    Method for forming a selective contact and local interconnect in situ
    2.
    发明授权
    Method for forming a selective contact and local interconnect in situ 有权
    在原位形成选择性接触和局部互连的方法

    公开(公告)号：US07858518B2

    公开(公告)日：2010-12-28

    申请号：US10067410

    申请日：2002-02-04

    申请人： Christopher W. Hill ,  Weimin Li ,  Gurtej S. Sandhu

    发明人： Christopher W. Hill ,  Weimin Li ,  Gurtej S. Sandhu

    IPC分类号： H01L21/4763

    CPC分类号： H01L21/76895 ,  H01L21/28518 ,  H01L21/28562 ,  H01L21/28568

    摘要： A process for the in situ formation of a selective contact and a local interconnect on a semiconductor substrate. The exposed semiconductor substrate regions of a semiconductor device structure may be treated in a plasma to enhance the adhesiveness of a selective contact thereto. The semiconductor device structure is positioned within a reaction chamber, wherein a selective contact is deposited onto the exposed semiconductor substrate regions. Any residual selective contact material may be removed from oxide surfaces either intermediately or after selective contact deposition. While the semiconductor device remains in the reaction chamber, a local interconnect is deposited over the semiconductor device structure. The local interconnect may then be patterned. Subsequent layers may be deposited over the local interconnect. The present invention also includes semiconductor device structures formed by the inventive process.

    摘要翻译： 用于在半导体衬底上原位形成选择性接触和局部互连的方法。 可以在等离子体中处理半导体器件结构的暴露的半导体衬底区域以增强与其的选择性接触的粘合性。 半导体器件结构位于反应室内，其中选择性接触沉积在暴露的半导体衬底区域上。 任何残留的选择性接触材料可以在中间或选择性接触沉积之后从氧化物表面去除。 当半导体器件保留在反应室中时，在半导体器件结构上沉积局部互连。 然后可以对局部互连进行图案化。 随后的层可以沉积在局部互连上。 本发明还包括通过本发明方法形成的半导体器件结构。

    Methods of forming intermediate semiconductor device structures using spin-on, photopatternable, interlayer dielectric materials
    8.
    发明授权
    Methods of forming intermediate semiconductor device structures using spin-on, photopatternable, interlayer dielectric materials 有权
    使用旋涂，光图案化，层间介电材料形成中间半导体器件结构的方法

    公开(公告)号：US07060637B2

    公开(公告)日：2006-06-13

    申请号：US10435791

    申请日：2003-05-12

    申请人： Weimin Li ,  Gurtej S. Sandhu

    发明人： Weimin Li ,  Gurtej S. Sandhu

    IPC分类号： H01L21/47 ,  C08J7/04

    CPC分类号： G03F7/095 ,  G03F7/0757 ,  H01L21/02134 ,  H01L21/02137 ,  H01L21/02216 ,  H01L21/02222 ,  H01L21/02282 ,  H01L21/02348 ,  H01L21/311 ,  Y10T428/31663

    摘要： A cap layer that enables a photopatternable, spin-on material to be used in the formation of semiconductor device structures at wavelengths that were previously unusable. The photopatternable, spin-on material is applied as a layer to a semiconductor substrate. The cap layer and a photoresist layer are each formed over the photopatternable layer. The cap layer absorbs or reflects radiation and protects the photopatternable layer from a first wavelength of radiation used in patterning the photoresist layer. The photopatternable, spin-on material is convertible to a silicon dioxide-based material upon exposure to a second wavelength of radiation.

    摘要翻译： 能够使光可图案化的旋涂材料用于以前不可用的波长形成半导体器件结构的盖层。 将可光刻图案的旋涂材料作为层施加到半导体衬底。 覆盖层和光致抗蚀剂层各自形成在光图案化层上。 盖层吸收或反射辐射，并保护光致图案层免受用于图案化光致抗蚀剂层的第一波长的辐射。 照射图案化的旋涂材料在暴露于第二波长辐射时可转换为二氧化硅基材料。

    Method of depositing a silicon dioxide comprising layer doped with at least one of P, B and Ge
    9.
    发明授权
    Method of depositing a silicon dioxide comprising layer doped with at least one of P, B and Ge 有权
    沉积掺杂有P，B和Ge中的至少一种的包含二氧化硅的层的方法

    公开(公告)号：US06930058B2

    公开(公告)日：2005-08-16

    申请号：US10420246

    申请日：2003-04-21

    申请人： Chris W. Hill ,  Weimin Li ,  Gurtej S. Sandhu

    发明人： Chris W. Hill ,  Weimin Li ,  Gurtej S. Sandhu

    IPC分类号： C23C16/40 ,  C23C16/44 ,  C23C16/455 ,  H01L21/316 ,  H01L21/31 ,  H01L21/469 ,  H01L21/76 ,  H01L21/8238

    CPC分类号： C23C16/45523 ,  C23C16/401 ,  H01L21/02126 ,  H01L21/02129 ,  H01L21/02271 ,  H01L21/31625

    摘要： A substrate is positioned within a deposition chamber. At least two gaseous precursors are fed to the chamber which collectively comprise silicon, an oxidizer comprising oxygen and dopant which become part of the deposited doped silicon dioxide. The feeding is over at least two different time periods and under conditions effective to deposit a doped silicon dioxide layer on the substrate. The time periods and conditions are characterized by some period of time when one of said gaseous precursors comprising said dopant is flowed to the chamber in the substantial absence of flowing any of said oxidizer precursor. In one implementation, the time periods and conditions are effective to at least initially deposit a greater quantity of doped silicon dioxide within at least some gaps on the substrate as compared to any doped silicon dioxide deposited atop substrate structure which define said gaps.

    摘要翻译： 衬底位于沉积室内。 将至少两种气体前体进料到共同包含硅的室，包含氧和掺杂剂的氧化剂成为沉积的掺杂二氧化硅的一部分。 进料至少在两个不同的时间段内并且在有效沉积掺杂的二氧化硅层的条件下在基板上。 时间段和条件的特征在于一段时间，其中一种所述包含所述掺杂剂的气态前体在基本上不流动任何所述氧化剂前体的情况下流动到所述室。 在一个实施方案中，与沉积在限定所述间隙的衬底结构上的任何掺杂二氧化硅相比，时间段和条件有效地至少在衬底上的至少一些间隙内沉积更大量的掺杂二氧化硅。

    Method of improving HDP fill process
    10.
    发明授权
    Method of improving HDP fill process 失效
    改善HDP填充过程的方法

    公开(公告)号：US06777308B2

    公开(公告)日：2004-08-17

    申请号：US10150843

    申请日：2002-05-17

    申请人： Li Li ,  Weimin Li ,  Gurtej S. Sandhu

    发明人： Li Li ,  Weimin Li ,  Gurtej S. Sandhu

    IPC分类号： H01L2176

    CPC分类号： C23C16/4408 ,  C23C16/045 ,  C23C16/402 ,  H01L21/02164 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/31612 ,  H01L21/76224

    摘要： A method for depositing a dielectric in a trench on a semiconductor substrate is provided. The dielectric is deposited by using an HDP-CVD system and performing a deposition of first and second layers of dielectric material. A first inert gas is utilized during the deposition of the first layer, and a second inert gas is utilized during the deposition of the second layer. Generally, a purge step is performed between the deposition of the first and second layers. The resulting dielectric layers are substantially free of voids and have low particle counts. Structures utilizing the filled trenches are also disclosed.

    摘要翻译： 提供了一种在半导体衬底上的沟槽中沉积电介质的方法。 通过使用HDP-CVD系统沉积电介质并执行介电材料的第一和第二层的沉积。 在第一层的沉积期间使用第一惰性气体，并且在沉积第二层期间使用第二惰性气体。 通常，在第一和第二层的沉积之间进行清洗步骤。 所得到的电介质层基本上没有空隙并且具有低的颗粒计数。 还公开了利用填充沟槽的结构。