公开(公告)号：US06781242B1

公开(公告)日：2004-08-24

申请号：US10307279

申请日：2002-12-02

申请人： Chun Ho Fan ,  Kwok Cheung Tsang ,  William Lap Keung Chow

发明人： Chun Ho Fan ,  Kwok Cheung Tsang ,  William Lap Keung Chow

IPC分类号： H01L2348

CPC分类号： H01L23/3128 ,  H01L23/36 ,  H01L23/4334 ,  H01L24/45 ,  H01L24/48 ,  H01L25/105 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/3011 ,  H01L2924/00015 ,  H01L2224/05599 ,  H01L2924/00 ,  H01L2924/00012

摘要： An integrated circuit package is provided. The package includes a substrate having first and second surfaces and a plurality of conductive traces therebetween. The substrate further has a cavity therein and a heat slug is fixed to the substrate and spans the cavity. A semiconductor die is mounted to the heat slug such that at least a portion of the semiconductor die is disposed in the cavity. A plurality of wire bonds connect the semiconductor die to ones of the conductive traces of the substrate and an encapsulating material encapsulates the wire bonds and the semiconductor die. A ball grid array is disposed on the first surface of the substrate. Bumps of the ball grid array are in electrical connection with ones of the conductive traces.

摘要翻译： 提供集成电路封装。 该封装包括具有第一和第二表面的基板和它们之间的多个导电迹线。 基板还在其中具有空腔，并且热块固定到基板并跨越空腔。 将半导体管芯安装到散热块上，使半导体管芯的至少一部分设置在空腔中。 多个引线接合将半导体管芯与衬底的导电迹线连接，并且封装材料封装引线接合和半导体管芯。 球栅阵列设置在基板的第一表面上。 球栅阵列的凸起与导电迹线中的一个导电连接。

公开(公告)号：US07439099B1

公开(公告)日：2008-10-21

申请号：US10678417

申请日：2003-10-03

申请人： Chun Ho Fan ,  Kwok Cheung Tsang ,  William Lap Keung Chow

发明人： Chun Ho Fan ,  Kwok Cheung Tsang ,  William Lap Keung Chow

IPC分类号： H01L21/48

CPC分类号： H01L23/3128 ,  H01L23/36 ,  H01L23/4334 ,  H01L24/45 ,  H01L24/48 ,  H01L25/105 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/3011 ,  H01L2924/00015 ,  H01L2224/05599 ,  H01L2924/00 ,  H01L2924/00012

摘要： An integrated circuit package is provided. The package includes a substrate having first and second surfaces and a plurality of conductive traces therebetween. The substrate further has a cavity therein and a heat slug is fixed to the substrate and spans the cavity. A semiconductor die is mounted to the heat slug such that at least a portion of the semiconductor die is disposed in the cavity. A plurality of wire bonds connect the semiconductor die to ones of the conductive traces of the substrate and an encapsulating material encapsulates the wire bonds and the semiconductor die. A ball grid array is disposed on the first surface of the substrate. Bumps of the ball grid array are in electrical connection with ones of the conductive traces.

摘要翻译： 提供集成电路封装。 该封装包括具有第一和第二表面的基板和它们之间的多个导电迹线。 基板还在其中具有空腔，并且热块固定到基板并且跨越空腔。 将半导体管芯安装到加热块上，使半导体管芯的至少一部分设置在空腔中。 多个引线接合将半导体管芯与衬底的导电迹线连接，并且封装材料封装引线接合和半导体管芯。 球栅阵列设置在基板的第一表面上。 球栅阵列的凸起与导电迹线中的一个导电连接。

公开(公告)号：US06995460B1

公开(公告)日：2006-02-07

申请号：US11123489

申请日：2005-05-06

申请人： Neil McLellan ,  Chun Ho Fan ,  Kwok Cheung Tsang ,  Kin Pui Kwan ,  Wing Him Lau

发明人： Neil McLellan ,  Chun Ho Fan ,  Kwok Cheung Tsang ,  Kin Pui Kwan ,  Wing Him Lau

IPC分类号： H01L23/495

CPC分类号： H01L21/568 ,  H01L21/4832 ,  H01L21/6835 ,  H01L23/3107 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/19041 ,  H05K1/185 ,  H05K1/187 ,  H05K3/205 ,  H01L2924/00015 ,  H01L2224/05599 ,  H01L2924/00 ,  H01L2924/00012

摘要： A leadless plastic chip carrier is constructed by half etching one or both sides of the package design onto a leadframe strip so as to create unique design features such as power and/or ground ring surrounding the die attach pad, interlocking rivet head construction for the contact pads, and an interlocking pattern for the die attach pad. After wire bonding and molding, a further etching is performed to isolate and expose contact pads. Singulation of individual chip packages from the leadframe strip is then performed by saw singulation or die punching.

摘要翻译： 无引线塑料芯片载体是通过将封装设计的一面或两面半蚀刻到引线框条上构建的，以便产生独特的设计特征，例如围绕芯片附接焊盘的电源和/或接地环，用于触点的互锁铆钉头结构 垫，以及用于管芯附接垫的互锁图案。 在引线接合和模制之后，进行另外的蚀刻来隔离和暴露接触焊盘。 然后通过锯切单模或冲模进行从引线框条单独的单个芯片封装。

公开(公告)号：US09520306B2

公开(公告)日：2016-12-13

申请号：US13618509

申请日：2012-09-14

申请人： Geraldine Tsui Yee Lin ,  Walter de Munnik ,  Kin Pui Kwan ,  Wing Him Lau ,  Kwok Cheung Tsang ,  Chun Ho Fan ,  Neil McLellan

发明人： Geraldine Tsui Yee Lin ,  Walter de Munnik ,  Kin Pui Kwan ,  Wing Him Lau ,  Kwok Cheung Tsang ,  Chun Ho Fan ,  Neil McLellan

IPC分类号： H01L21/56 ,  H01L21/48 ,  H01L23/31 ,  H01L23/495 ,  H01L23/00 ,  H01L21/78

CPC分类号： H01L21/561 ,  H01L21/4828 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/49503 ,  H01L23/49541 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/92 ,  H01L24/97 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

摘要： A process for fabricating an integrated circuit package includes selectively etching a leadframe strip to define a die attach pad and a plurality of contact pads. At least one side of the die attach pad has a plurality of spaced apart pad portions. A semiconductor die is mounted to the die attach pad and wires are bonded from the semiconductor die to respective ones of the contact pads. A first surface of the leadframe strip, including the semiconductor die and wire bonds, is encapsulated in a molding material such that at least one surface of the leadframe strip is exposed. The integrated circuit package is singulated from a remainder of the leadframe strip.

摘要翻译： 一种用于制造集成电路封装的工艺包括选择性地蚀刻引线框条以限定管芯附接焊盘和多个接触焊盘。 管芯附接垫的至少一侧具有多个间隔开的垫部分。 将半导体管芯安装到管芯附接焊盘，并且将导线从半导体管芯接合到相应的接触焊盘。 包括半导体管芯和引线接合的引线框条的第一表面被封装在模制材料中，使得引线框带的至少一个表面被暴露。 集成电路封装从引线框条的其余部分分离。

公开(公告)号：US07270867B1

公开(公告)日：2007-09-18

申请号：US11022130

申请日：2004-12-22

申请人： Kin Pui Kwan ,  Wing Him Lau ,  Kwok Cheung Tsang ,  Chun Ho Fan ,  Neil McLellan

发明人： Kin Pui Kwan ,  Wing Him Lau ,  Kwok Cheung Tsang ,  Chun Ho Fan ,  Neil McLellan

IPC分类号： H01L21/48

CPC分类号： H01L23/49582 ,  H01L21/4821 ,  H01L21/4832 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/484 ,  H01L2224/48599 ,  H01L2224/85001 ,  H01L2224/85444 ,  H01L2224/85447 ,  H01L2224/85455 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15747 ,  H01L2924/181 ,  Y10T428/24107 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A process for fabricating a leadless plastic chip carrier includes selectively depositing a plurality of base layers on a first surface of a base of a leadframe strip to at least partially define a die attach pad and at least one row of contact pads. At least one further layer is selectively deposited on portions of the plurality of layers to further define at least the contact pads. The leadframe strip is then treated with a surface preparation. A semiconductor die is mounted to the die attach pad, followed by wire bonding the semiconductor die to at least the contact pads. Molding the semiconductor die, the wire bonds, the die attach pad and the contact pads on the surface of the leadframe strip, in a molding compound follows. The leadframe strip is etched to expose the contact pads and the die attach pad and the leadless plastic chip carrier is singulated from a remainder of the leadframe strip.

摘要翻译： 一种用于制造无引线塑料芯片载体的方法包括在引线框架条的基底的第一表面上选择性地沉积多个基层以至少部分地限定管芯附着垫和至少一排接触垫。 至少一个另外的层选择性地沉积在多个层的部分上以进一步限定至少接触焊盘。 然后用表面处理处理引线框条。 将半导体管芯安装到管芯附接焊盘，然后将半导体管芯引线接合至少于接触焊盘。 在模制化合物中，模制半导体管芯，引线接合，引线框架条的表面上的焊盘和接触焊盘。 蚀刻引线框条以暴露接触焊盘和管芯附接焊盘，并且引线框架条的其余部分分离无引线塑料芯片载体。

公开(公告)号：US07482690B1

公开(公告)日：2009-01-27

申请号：US11071737

申请日：2005-03-03

申请人： Chun Ho Fan ,  Kwok Cheung Tsang

发明人： Chun Ho Fan ,  Kwok Cheung Tsang

IPC分类号： H01L23/34

CPC分类号： H01L21/568 ,  H01L21/4832 ,  H01L21/561 ,  H01L21/6835 ,  H01L23/3107 ,  H01L23/49541 ,  H01L23/49548 ,  H01L24/17 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/97 ,  H01L2221/68377 ,  H01L2223/6644 ,  H01L2224/1134 ,  H01L2224/16 ,  H01L2224/16245 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/00012

摘要： A process for fabricating an integrated circuit package includes establishing a plating mask on a first surface of a metal carrier. The plating mask defines a plurality of components including a die attach pad, at least one row of contact pads and at least one additional electronic component. A plurality of metallic layers is deposited on exposed portions of the first surface of the metal carrier. The plating mask is stripped from the metal carrier, leaving the plurality of metallic layers in the form of the plurality of components. A semiconductor die is mounted to die attach pad and pads of the semiconductor die are electrically connected to ones of the contact pads and to the additional electronic component. The first surface of the metal carrier is overmolded to encapsulate the plurality of components and the semiconductor die and the metal carrier is etched away.

摘要翻译： 一种用于制造集成电路封装的方法，包括在金属载体的第一表面上建立电镀掩模。 电镀掩模限定多个部件，包括管芯附接焊盘，至少一排接触焊盘和至少一个附加电子部件。 多个金属层沉积在金属载体的第一表面的暴露部分上。 电镀掩模从金属载体剥离，留下多个金属层以多个部件的形式。 半导体管芯安装到管芯附着焊盘，并且半导体管芯的焊盘电连接到接触焊盘和附加电子部件中的一个。 金属载体的第一表面被包覆成型以封装多个部件，半导体管芯和金属载体被蚀刻掉。

公开(公告)号：US07372151B1

公开(公告)日：2008-05-13

申请号：US10660611

申请日：2003-09-12

申请人： Chun Ho Fan ,  Neil McLellan ,  Kwok Cheung Tsang

发明人： Chun Ho Fan ,  Neil McLellan ,  Kwok Cheung Tsang

IPC分类号： H01L23/48

CPC分类号： H01L21/561 ,  H01L23/3128 ,  H01L23/36 ,  H01L23/49816 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/1532 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/3011 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/05599 ,  H01L2224/0401

摘要： A process for manufacturing an integrated circuit package includes forming a plurality of solder balls on a first surface of a substrate and mounting a semiconductor die to the substrate such that bumps of the semiconductor die are electrically connected to conductive traces of the substrate. The semiconductor die and the solder balls are encapsulated in an overmold material on the substrate such that portions of the solder balls are exposed. A ball grid array is formed such that bumps of the ball grid array are electrically connected to the conductive traces and the integrated circuit package is singulated.

摘要翻译： 一种用于制造集成电路封装的方法，包括在衬底的第一表面上形成多个焊球，并将半导体管芯安装到衬底上，使得半导体管芯的凸块与衬底的导电迹线电连接。 半导体管芯和焊球被封装在衬底上的包覆模制材料中，使得焊球的部分暴露。 形成球栅阵列，使得球栅阵列的凸块电连接到导电迹线，并且集成电路封装被分割。

公开(公告)号：US07081403B1

公开(公告)日：2006-07-25

申请号：US11151469

申请日：2005-06-13

申请人： Mohan Kirloskar ,  Chun Ho Fan ,  Kwok Cheung Tsang ,  Kin Pui Kwan

发明人： Mohan Kirloskar ,  Chun Ho Fan ,  Kwok Cheung Tsang ,  Kin Pui Kwan

IPC分类号： H01L21/44

CPC分类号： H01L21/4832 ,  H01L21/6835 ,  H01L23/49575 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/85001 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3011 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A leadless plastic chip carrier is fabricated by selectively etching a leadframe strip to reduce a thickness of the strip at a portion thereof. Selectively masking the surface of the leadframe strip using a mask, follows selectively etching, to provide exposed areas of the surface at the portion and contact pad areas on leadframe the strip. At least one layer of metal is deposited on the exposed areas to define a die attach pad on the portion of the leadframe strip with reduced thickness and to define contact pads on the surface of the strip. At least one semiconductor die is mounted to the die attach pad, followed by wire bonding the at least one semiconductor die to ones of the contact pads. The at least one semiconductor die, the wire bonds, and the contact pads are covered with an overmold material and the leadframe strip is etched to thereby remove the leadframe strip. The leadless plastic chip carrier is singulated from the leadframe strip.

公开(公告)号：US08330270B1

公开(公告)日：2012-12-11

申请号：US11008593

申请日：2004-12-09

申请人： Geraldine Tsui Yee Lin ,  Walter de Munnik ,  Kin Pui Kwan ,  Wing Him Lau ,  Kwok Cheung Tsang ,  Chun Ho Fan ,  Neil McLellan

发明人： Geraldine Tsui Yee Lin ,  Walter de Munnik ,  Kin Pui Kwan ,  Wing Him Lau ,  Kwok Cheung Tsang ,  Chun Ho Fan ,  Neil McLellan

IPC分类号： H01L23/495 ,  H01L23/04 ,  H01L23/34

CPC分类号： H01L21/561 ,  H01L21/4828 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/49503 ,  H01L23/49541 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/92 ,  H01L24/97 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

摘要： An integrated circuit package having a selectively etched leadframe strip defining a die attach pad and a plurality of contact pads, at least one side of the die attach pad having a plurality of spaced apart pad portions; a semiconductor die mounted to the die attach pad and wires bonding the semiconductor die to respective ones of the contact pads; a first surface of the leadframe strip, including the semiconductor die and wire bonds, encapsulated in a molding material such that at least one surface of the leadframe strip is exposed, and wherein solder paste is disposed on said contact pads and said at least one side of said die attach pad.

摘要翻译： 一种集成电路封装，其具有限定管芯附接焊盘和多个接触焊盘的选择性蚀刻的引线框条，所述管芯附接焊盘的至少一侧具有多个间隔开的焊盘部分; 安装到管芯附接焊盘的半导体管芯和将半导体管芯接合到相应的接触焊盘的引线; 引线框带的第一表面，包括半导体管芯和引线接合，封装在模制材料中，使得引线框架条的至少一个表面被暴露，并且其中焊膏设置在所述接触焊盘和所述至少一个侧面上 的所述管芯附接垫。

公开(公告)号：US06989294B1

公开(公告)日：2006-01-24

申请号：US10353241

申请日：2003-01-28

申请人： Neil McLellan ,  Chun Ho Fan ,  Kwok Cheung Tsang ,  Kin Pui Kwan ,  Wing Him Lau

发明人： Neil McLellan ,  Chun Ho Fan ,  Kwok Cheung Tsang ,  Kin Pui Kwan ,  Wing Him Lau

IPC分类号： H01L21/48

CPC分类号： H01L21/568 ,  H01L21/4832 ,  H01L21/6835 ,  H01L23/3107 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/19041 ,  H05K1/185 ,  H05K1/187 ,  H05K3/205 ,  H01L2924/00015 ,  H01L2224/05599 ,  H01L2924/00 ,  H01L2924/00012

摘要： A leadless plastic chip carrier is constructed by half etching one or both sides of the package design onto a leadframe strip so as to create unique design features such as power and/or ground ring surrounding the die attach pad, interlocking rivet head construction for the contact pads, and an interlocking pattern for the die attach pad. After wire bonding and molding, a further etching is performed to isolate and expose contact pads. Singulation of individual chip packages from the leadframe strip is then performed by saw singulation or die punching.