公开(公告)号：US06082610A

公开(公告)日：2000-07-04

申请号：US880955

申请日：1997-06-23

申请人： Dongkai Shangguan ,  Mohan Paruchuri ,  Achyuta Achari

发明人： Dongkai Shangguan ,  Mohan Paruchuri ,  Achyuta Achari

IPC分类号： H01L23/12 ,  H01L21/60 ,  H01L23/485 ,  H01L23/498 ,  H05K3/34 ,  B23K1/20 ,  H01L21/441 ,  H01L29/40

CPC分类号： H01L24/10 ,  H01L23/49866 ,  H01L24/13 ,  H01L24/81 ,  H05K3/3463 ,  H01L2224/05001 ,  H01L2224/05023 ,  H01L2224/0508 ,  H01L2224/05184 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/13109 ,  H01L2224/13144 ,  H01L2224/81801 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15747 ,  H01L2924/30107 ,  Y10T29/49144

摘要： A method which utilizes flip chip technology to provide interconnection between printed circuit boards and integrated circuits is disclosed. The method involves metallization of the bond pad and multiple, novel bump compositions and coating compositions to provide an interconnection which is reliable and which withstands differences in the coefficient of thermal expansion between the silicon device and the bump material.

摘要翻译： 公开了一种利用倒装芯片技术提供印刷电路板和集成电路之间的互连的方法。 该方法涉及金属化接合焊盘和多个新颖的凸块组合物和涂层组合物，以提供可靠的互连，并且能够承受硅器件和凸块材料之间的热膨胀系数的差异。

公开(公告)号：US5429689A

公开(公告)日：1995-07-04

申请号：US299230

申请日：1994-08-31

申请人： Dongkai Shangguan ,  Achyuta Achari

发明人： Dongkai Shangguan ,  Achyuta Achari

IPC分类号： B23K35/26 ,  C22C13/02

CPC分类号： C22C13/02 ,  B23K35/262

摘要： A non-toxic alloy for soldering electronic components comprising 80% Sn, 5-14.5% In, 4.5-14.5% Bi and 0.5% Ag. The disclosed alloy has a fine microstructure. Particles of intermetallic compounds are finely dispersed throughout the matrix, thereby inhibiting grain growth. Accordingly, the alloy does not significantly coarsen after thermal aging.

摘要翻译： 用于焊接电子元件的无毒合金，包括80％Sn，5-14.5％In，4.5-14.5％Bi和0.5％Ag。 所公开的合金具有精细的微观结构。 金属间化合物的颗粒细分散在整个基质中，从而抑制晶粒生长。 因此，在热老化后，合金不会显着变粗糙。

公开(公告)号：US5996222A

公开(公告)日：1999-12-07

申请号：US84867

申请日：1998-05-26

申请人： Dongkai Shangguan ,  Myron Lemecha ,  Achyuta Achari

发明人： Dongkai Shangguan ,  Myron Lemecha ,  Achyuta Achari

IPC分类号： H05K1/00 ,  H05K3/34

CPC分类号： H05K3/3494 ,  H05K1/0284 ,  H05K2201/0129 ,  H05K2201/0999 ,  H05K2203/111 ,  Y10T29/49144

摘要： A soldering process is suitable for use with low cost, low heat distortion temperature thermoplastic substrates without distortion or damage to the substrate yet having the mass production capability exhibited by wave and reflow soldering techniques. The process allows integration of consumer products and, in particular, vehicle components such as integrated instrument panel or other such assemblies, without the redundancy of separate printed circuit boards.

摘要翻译： 焊接工艺适用于低成本，低热变形温度的热塑性基材，而不会对基材产生变形或损坏，但具有通过波浪和回流焊接技术显示的大规模生产能力。 该过程允许消费产品，特别是集成仪表板或其他这样的组件的车辆部件的集成，而不需要单独的印刷电路板的冗余。

公开(公告)号：US5871690A

公开(公告)日：1999-02-16

申请号：US939644

申请日：1997-09-29

申请人： Achyuta Achari ,  Mohan R. Paruchuri ,  Dongkai Shangguan

发明人： Achyuta Achari ,  Mohan R. Paruchuri ,  Dongkai Shangguan

IPC分类号： B23K35/26 ,  C22C13/02

CPC分类号： B23K35/268 ,  B23K35/262

摘要： Low temperature electrical solder compositions (by weight percent) having between 45-60% Sn; 25-40% Pb; 5-15% Bi; and 0.5-2.5% In. Preferably, the solder compositions have a melting temperature of about 154.degree.-162.degree. C. The solder compositions have microstructure similarly to Sn/Pb eutectic microstructure which makes them have excellent properties like higher yield strength and better creep resistance providing long term reliability to solder joints.

摘要翻译： 具有45-60％Sn之间的低温电焊料组成（重量百分比） 25-40％Pb; 5-15％Bi; 和0.5-2.5％。 优选地，焊料组合物的熔融温度为约154°-162℃。焊料组合物具有类似于Sn / Pb共晶组织的微结构，这使得它们具有优异的性能，例如更高的屈服强度和更好的抗蠕变性，为焊料提供长期的可靠性 关节。

公开(公告)号：US5863493A

公开(公告)日：1999-01-26

申请号：US771351

申请日：1996-12-16

申请人： Achyuta Achari ,  Mohan R. Paruchuri ,  Dongkai Shangguan

发明人： Achyuta Achari ,  Mohan R. Paruchuri ,  Dongkai Shangguan

IPC分类号： B23K35/26 ,  C22C13/00 ,  H05K3/34

CPC分类号： C22C13/00 ,  B23K35/262 ,  B23K2201/36

摘要： Electrical solder compositions (by weight percent) having between 91.5-96.5% Sn; 2-5% Ag; 0.1-3% Ni; and 0-2.9% Cu; and having a melting temperature 220.degree. C. or less. The solder compositions have microstructure with uniformly dispersed fine grains of Sn--Ni, Sn--Cu and Sn--Cu--Ni intermetallic phases that provide resistance to grain growth during thermal cycling.

摘要翻译： 锡焊料组成（重量百分比）为91.5-96.5％Sn; 2-5％Ag; 0.1-3％Ni; 和0-2.9％Cu; 熔点220℃以下。 焊料组合物具有均匀分散的Sn-Ni，Sn-Cu和Sn-Cu-Ni金属间相的微细颗粒的微观结构，其在热循环期间提供对晶粒生长的抵抗力。

公开(公告)号：US06250541B1

公开(公告)日：2001-06-26

申请号：US09553909

申请日：2000-04-20

申请人： Dongkai Shangguan ,  Mohan Paruchuri ,  Achyuta Achari

发明人： Dongkai Shangguan ,  Mohan Paruchuri ,  Achyuta Achari

IPC分类号： B23K3102

CPC分类号： H01L24/10 ,  H01L23/49866 ,  H01L24/13 ,  H01L24/81 ,  H01L2224/05001 ,  H01L2224/05023 ,  H01L2224/0508 ,  H01L2224/05184 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/13109 ,  H01L2224/13144 ,  H01L2224/81801 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15747 ,  H01L2924/30107 ,  H05K3/3463 ,  Y10T29/49144 ,  H01L2224/29099 ,  H01L2924/00 ,  H01L2224/05639 ,  H01L2924/00014 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166

摘要： A method which utilizes flip chip technology to provide interconnection between printed circuit boards and integrated circuits is disclosed. The method involves metallization of the bond pad and multiple, novel bump compositions and coating compositions to provide an interconnection which is reliable and which withstands differences in the coefficient of thermal expansion between the silicon device and the bump material.

摘要翻译： 公开了一种利用倒装芯片技术提供印刷电路板和集成电路之间的互连的方法。 该方法涉及金属化接合焊盘和多个新颖的凸块组合物和涂层组合物，以提供可靠的互连，并且能够承受硅器件和凸块材料之间的热膨胀系数的差异。

公开(公告)号：US6011313A

公开(公告)日：2000-01-04

申请号：US241885

申请日：1999-02-01

申请人： Dongkai Shangguan ,  Mohan Paruchuri ,  Achyuta Achari

发明人： Dongkai Shangguan ,  Mohan Paruchuri ,  Achyuta Achari

IPC分类号： H01L23/12 ,  H01L21/60 ,  H01L23/485 ,  H01L23/498 ,  H05K3/34 ,  H01L23/48

CPC分类号： H01L24/10 ,  H01L23/49866 ,  H01L24/13 ,  H01L24/81 ,  H05K3/3463 ,  H01L2224/05001 ,  H01L2224/05023 ,  H01L2224/0508 ,  H01L2224/05184 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/13109 ,  H01L2224/13144 ,  H01L2224/81801 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15747 ,  H01L2924/30107 ,  Y10T29/49144

摘要： A device which utilizes flip chip technology to provide interconnection between printed circuit boards and integrated circuits is disclosed. The method involves metallization of the bond pad and multiple, novel bump compositions and coating compositions to provide an interconnection which is reliable and which withstands differences in the coefficient of thermal expansion between the silicon device and the bump material.

摘要翻译： 公开了一种使用倒装芯片技术来提供印刷电路板和集成电路之间的互连的装置。 该方法涉及金属化接合焊盘和多个新颖的凸块组合物和涂层组合物，以提供可靠的互连，并且能够承受硅器件和凸块材料之间的热膨胀系数的差异。

公开(公告)号：US06555015B1

公开(公告)日：2003-04-29

申请号：US09712838

申请日：2000-11-09

申请人： Daniel Phillip Dailey ,  Robert Edward Belke, Jr. ,  Jay DeAvis Baker ,  Achyuta Achari ,  Myron Lemecha ,  Michael George Todd

发明人： Daniel Phillip Dailey ,  Robert Edward Belke, Jr. ,  Jay DeAvis Baker ,  Achyuta Achari ,  Myron Lemecha ,  Michael George Todd

IPC分类号： H01B1300

CPC分类号： H05K3/4092 ,  H05K3/4685

摘要： Method of manufacturing a multi-layer printed circuit board adapted for reduce interfacial sheer stresses includes a laminate substrate having a top layer forming a first major surface, a middle layer having a predetermined thickness and a bottom layer forming a second major surface opposed to the first major surface. Etch resists are disposed on the first and second surfaces corresponding to reverse images of desired conductor patterns. The first and second surfaces are thereafter etched and the photoresist removed. The laminate substrate is secured via a low modules adhesive layer to a major surface of a base. The middle layer of the laminate substrate is thereafter selectively etched so as to isolate selected portions of the first and second surfaces and to define inner connect regions therebetween having a height equal to the predetermined thickness.

公开(公告)号：US06274819B1

公开(公告)日：2001-08-14

申请号：US09387808

申请日：1999-09-01

申请人： Delin Li ,  Jay DeAvis Baker ,  Achyuta Achari ,  Brenda Joyce Nation ,  John Trublowski

发明人： Delin Li ,  Jay DeAvis Baker ,  Achyuta Achari ,  Brenda Joyce Nation ,  John Trublowski

IPC分类号： H05K111

CPC分类号： H05K3/361 ,  H05K1/0293 ,  H05K1/117 ,  H05K1/118 ,  H05K3/0052 ,  H05K3/225 ,  H05K2201/053 ,  H05K2201/09127 ,  H05K2201/09409 ,  H05K2201/09709 ,  H05K2201/0979 ,  H05K2203/0228 ,  H05K2203/175 ,  Y10T29/49124 ,  Y10T29/49169 ,  Y10T29/4973 ,  Y10T29/49732

摘要： An article and method for making and repairing connections between first and second circuits, such as flex circuits. The article 10 includes: a flexible dielectric substrate 12 having first and second edges 14/16, and a plurality of conductive circuit traces 18 arranged on or within the substrate, wherein each of the traces extends from proximate the first edge 14 to proximate the second edge 16. Each of the circuit traces 18 includes: a first connection feature 20 disposed proximate the first edge 14; a second connection feature 22 disposed proximate the second edge 16; and at least one third connection feature 24 disposed between the first and second edges 14/16. Each of the first, second, and third connection features 20/22/24 is a plated through hole, a plated blind via, or a mounting pad. This article 10 may be used to connect together the first and second circuits 50/60 using the first and second connection features 20/22, such as by soldering. If either of the two circuits needs to be subsequently detached (e.g., because of a component failure), the article 10 may be cut so as to present a set of third connection features 24 to which a new replacement circuit may be connected.

公开(公告)号：US06270354B1

公开(公告)日：2001-08-07

申请号：US09387202

申请日：1999-08-31

申请人： Delin Li ,  Jay DeAvis Baker ,  Achyuta Achari ,  Brenda Joyce Nation ,  John Trublowski

发明人： Delin Li ,  Jay DeAvis Baker ,  Achyuta Achari ,  Brenda Joyce Nation ,  John Trublowski

IPC分类号： H01R1200

摘要： A multi-connectable printed circuit assembly, comprising: (a) a printed circuit substrate 11 having a first edge 22 and first and second edge regions 44/55, wherein at least the first edge region 44 is defined along the first edge 22; (b) a first array 77 of electrical connection features 66 disposed on or within the substrate proximate the first edge region 44; (c) a second array 88 of electrical connection features 66 disposed on or within the substrate proximate the second edge region 55, wherein the second array 88 is substantially a duplication or a mirror image of the first array 77; and (d) a plurality of circuit traces 99 disposed on or within the substrate such that each electrical connection feature 66 of the first array 77 is connected by one of the circuit traces 99 to a corresponding electrical connection feature 66 of the second array 88.