摘要:
Microelectronic devices having a protected input and methods for manufacturing such microelectronic devices. A microelectronic device has a microelectronic die and a support structure for coupling the die to voltage and signal sources. The microelectronic die can have integrated circuitry and a plurality of bond-pads coupled to the integrated circuitry. The bond-pads, for example, can include a reference voltage (Vref) bond-pad and a signal bond-pad adjacent to the Vref bond-pad. The signal bond-pad can be for a clock signal, a data signal, a strobe signal, an address signal, or another type signal for operating the integrated circuitry. The support structure can be a lead frame or a interposing substrate having a plurality of conductive members coupled to the bond-pads of the die. The conductive members can accordingly be metal pins in the case of lead frames or traces and solder ball-pads in the case of interposing substrates. Each conductive member can have a first end with a bond-site proximate to a corresponding bond-pad of the die, a second end defining an external connector, and an elongated conductive section connecting the bond-site to the external connector. The conductive members are generally arranged so that at least some of the bond-sites are arranged in a first row in which the bond-sites and a portion of the elongated sections are spaced apart from one other by a first gap width. The support structure can more specifically include a first conductive member having a first bond-site coupled to the Vref bond-pad by a first wire-bond line and a second conductive member having a second bond-site coupled to the signal bond-pad by a second wire-bond line. The first bond-site of the first conductive member can be spaced apart from the second bond-site of the second conductive member by a second gap width greater than the first gap width.
摘要:
Microelectronic devices having a protected input and methods for manufacturing such microelectronic devices. A microelectronic device has a microelectronic die and a support structure for coupling the die to voltage and signal sources. The microelectronic die can have integrated circuitry and a plurality of bond-pads coupled to the integrated circuitry. The bond-pads, for example, can include a reference voltage (Vref) bond-pad and a signal bond-pad adjacent to the Vref bond-pad. The signal bond-pad can be for a clock signal, a data signal, a strobe signal, an address signal, or another type signal for operating the integrated circuitry. The support structure can be a lead frame or a interposing substrate having a plurality of conductive members coupled to the bond-pads of the die. The conductive members can accordingly be metal pins in the case of lead frames or traces and solder ball-pads in the case of interposing substrates. Each conductive member can have a first end with a bond-site proximate to a corresponding bond-pad of the die, a second end defining an external connector, and an elongated conductive section connecting the bond-site to the external connector. The conductive members are generally arranged so that at least some of the bond-sites are arranged in a first row in which the bond-sites and a portion of the elongated sections are spaced apart from one other by a first gap width. The support structure can more specifically include a first conductive member having a first bond-site coupled to the Vref bond-pad by a first wire-bond line and a second conductive member having a second bond-site coupled to the signal bond-pad by a second wire-bond line. The first bond-site of the first conductive member can be spaced apart from the second bond-site of the second conductive member by a second gap width greater than the first gap width.
摘要:
Filament nylon 6 and 66 fabrics are dyed in a multi-step continuous aqueous dyeing process. Uniformly dyed fabrics having a high degree of fiber bundle penetration result.
摘要:
Aramid fibers, polybenzimidazole fibers or blends of aramid and polybenzimidazole fibers are rendered flame resistant by a flame retardant introduced into the fibers by a polar organic swelling agent such as DMSO. Dyed or undyed fibers so treated exhibit substantially improved flame resistance as compared with untreated fibers.
摘要:
A hybrid leadframe-over-chip (LOC) semiconductor package is generally comprised of bonding finger elements located over a surface of a semiconductor component and electrically coupled, by means of conducting wires, to the bonding pads located on the surface. In addition, at least one bonding finger is located outside the boundary of the surface of the semiconductor component. Each bonding finger located outside the boundary is coupled, by a conducting wire, to a bonding pad positioned within the boundary of the semiconductor component. In this manner, for a given semiconductor component size and for given routing and lead dimension constraints, a larger number of conducting paths can be provided between the leadframe and the semiconductor component.
摘要:
The invention discloses a high density semiconductor package. In one embodiment, two semiconductor chips are each affixed on a corresponding one of two lead frames. The semiconductor chips and the lead frames are encapsulated, wherein only a portion of the leads of the lead frames protrudes and extends from the package.
摘要:
Described is a process for continuously dyeing high tenacity nylon 6,6 fabrics including the sequential steps of applying to a high tenacity, highly crystalline nylon 6,6 fabric whose fibers have a breaking tenacity in the range of 6.0 to 10 g/denier and an aqueous dyebath containing a tinctorial amount of at least one dye. The dyed fabric is then steamed with superheated steam at atmospheric pressure and at temperatures greater than 100.degree. C., e.g., 100.degree. to 160.degree. C., for a time sufficient to fix the dye to the fabric, usually up to 3 minutes. Following steaming, the dyed fabric is washed to remove any unfixed dye, then dried.
摘要:
A method and apparatus for delivering electrical power to a semiconductor die is provided in which a metal frame (104) is applied to the top surface of a semiconductor die. The metal frame include two voltages leads (106, 108), each adjacent to each series of bond pads (116) formed on the top surface of the semiconductor die. Each voltage lead includes a longitudinal portion (122) adjacent bond pads (116) in the center of the semiconductor die and corner portions (124) or arm portions (125) adjacent bond pads (116) located in the quadrants (114) of the semiconductor die.
摘要:
The invention discloses a high density semiconductor package. Two semiconductor chips are each affixed on a corresponding one of two lead frames. The semiconductor chips and the lead frames are encapsulated, wherein only a portion of the leads of the lead frames protrudes and extends from the package.