公开(公告)号：US06784367B2

公开(公告)日：2004-08-31

申请号：US10374449

申请日：2003-02-25

申请人： Ernest J. Russell ,  Bharath Nagabhushanam ,  Terry Lee ,  Roger Norwood

发明人： Ernest J. Russell ,  Bharath Nagabhushanam ,  Terry Lee ,  Roger Norwood

IPC分类号： H01L2302

CPC分类号： H01L24/06 ,  H01L23/4951 ,  H01L23/49541 ,  H01L23/50 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/06136 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/49171 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/3025 ,  H01L2224/45099 ,  H01L2924/00

摘要： Microelectronic devices having a protected input and methods for manufacturing such microelectronic devices. A microelectronic device has a microelectronic die and a support structure for coupling the die to voltage and signal sources. The microelectronic die can have integrated circuitry and a plurality of bond-pads coupled to the integrated circuitry. The bond-pads, for example, can include a reference voltage (Vref) bond-pad and a signal bond-pad adjacent to the Vref bond-pad. The signal bond-pad can be for a clock signal, a data signal, a strobe signal, an address signal, or another type signal for operating the integrated circuitry. The support structure can be a lead frame or a interposing substrate having a plurality of conductive members coupled to the bond-pads of the die. The conductive members can accordingly be metal pins in the case of lead frames or traces and solder ball-pads in the case of interposing substrates. Each conductive member can have a first end with a bond-site proximate to a corresponding bond-pad of the die, a second end defining an external connector, and an elongated conductive section connecting the bond-site to the external connector. The conductive members are generally arranged so that at least some of the bond-sites are arranged in a first row in which the bond-sites and a portion of the elongated sections are spaced apart from one other by a first gap width. The support structure can more specifically include a first conductive member having a first bond-site coupled to the Vref bond-pad by a first wire-bond line and a second conductive member having a second bond-site coupled to the signal bond-pad by a second wire-bond line. The first bond-site of the first conductive member can be spaced apart from the second bond-site of the second conductive member by a second gap width greater than the first gap width.

公开(公告)号：US06548757B1

公开(公告)日：2003-04-15

申请号：US09649765

申请日：2000-08-28

申请人： Ernest J. Russell ,  Bharath Nagabhushanam ,  Terry Lee ,  Roger Norwood

发明人： Ernest J. Russell ,  Bharath Nagabhushanam ,  Terry Lee ,  Roger Norwood

IPC分类号： H01L2302

CPC分类号： H01L24/06 ,  H01L23/4951 ,  H01L23/49541 ,  H01L23/50 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/06136 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/49171 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/3025 ,  H01L2224/45099 ,  H01L2924/00

摘要： Microelectronic devices having a protected input and methods for manufacturing such microelectronic devices. A microelectronic device has a microelectronic die and a support structure for coupling the die to voltage and signal sources. The microelectronic die can have integrated circuitry and a plurality of bond-pads coupled to the integrated circuitry. The bond-pads, for example, can include a reference voltage (Vref) bond-pad and a signal bond-pad adjacent to the Vref bond-pad. The signal bond-pad can be for a clock signal, a data signal, a strobe signal, an address signal, or another type signal for operating the integrated circuitry. The support structure can be a lead frame or a interposing substrate having a plurality of conductive members coupled to the bond-pads of the die. The conductive members can accordingly be metal pins in the case of lead frames or traces and solder ball-pads in the case of interposing substrates. Each conductive member can have a first end with a bond-site proximate to a corresponding bond-pad of the die, a second end defining an external connector, and an elongated conductive section connecting the bond-site to the external connector. The conductive members are generally arranged so that at least some of the bond-sites are arranged in a first row in which the bond-sites and a portion of the elongated sections are spaced apart from one other by a first gap width. The support structure can more specifically include a first conductive member having a first bond-site coupled to the Vref bond-pad by a first wire-bond line and a second conductive member having a second bond-site coupled to the signal bond-pad by a second wire-bond line. The first bond-site of the first conductive member can be spaced apart from the second bond-site of the second conductive member by a second gap width greater than the first gap width.

公开(公告)号：US07976779B2

公开(公告)日：2011-07-12

申请号：US11177505

申请日：2005-07-11

申请人： Yu-Chong Tai ,  Jun Xie ,  Jason Shih ,  Terry Lee ,  Yunan Miao

发明人： Yu-Chong Tai ,  Jun Xie ,  Jason Shih ,  Terry Lee ,  Yunan Miao

IPC分类号： B01L3/00 ,  G01N30/02 ,  F04F99/00 ,  C02F11/00 ,  C02F1/469

CPC分类号： G01N30/34 ,  G01N30/16 ,  G01N30/6095 ,  G01N30/7266

摘要： A microfluidic system with on-chip pumping which can be used for liquid chromatography and also electrospray ionization mass spectrometry and which provides improved efficiency, better integration with sensors, improved portability, reduced power consumption, and reduced cost. The system can include (A) a main chip comprising: a substrate having a front face and a back face; a chromatography column on the front face of said substrate, wherein said column has an inlet and an outlet; an electrospray ionization (ESI) nozzle on the front face of said substrate, wherein said nozzle has an inlet and an outlet, and wherein the inlet of the nozzle is microfluidically coupled to the outlet of the column; one or more pump systems on the front face of said substrate comprising a pump chamber, one or more electrodes, and an outlet microfluidically coupled to the inlet of said column; and (B) a reservoir chip comprising a front surface and a back surface, wherein the reservoir chip has one or more cavities in the back surface which when disposed next to the front surface of the main chip extends the volume of the pump chamber of one of the pump system. Microfabrication can be used to prepare the chips, which can be assembled with a cover and inserted into a testing jig for electronic control and mass spectral analysis. Peptide separations are demonstrated which compete with present commercial systems.

摘要翻译： 具有片上泵浦的微流体系统，其可用于液相色谱和电喷雾离子化质谱，并且其提供更高的效率，更好地与传感器的集成，改进的便携性，降低的功率消耗和降低的成本。 该系统可以包括（A）主芯片，其包括：具有正面和背面的基板; 所述基板前表面上的色谱柱，其中所述色谱柱具有入口和出口; 在所述基板的前表面上的电喷雾离子化（ESI）喷嘴，其中所述喷嘴具有入口和出口，并且其中所述喷嘴的入口微流体耦合到所述塔的出口; 所述衬底的前表面上的一个或多个泵系统包括泵室，一个或多个电极和微流体耦合到所述塔的入口的出口; 和（B）包括前表面和后表面的储存器芯片，其中所述储存器芯片在所述后表面中具有一个或多个空腔，当所述储存器芯片靠近所述主芯片的前表面设置时，所述泵室的体积将一个 的泵系统。 可以使用微加工来制备芯片，其可以与盖组装并插入用于电子控制和质谱分析的测试夹具中。 展示了与现有商业系统竞争的肽分离。

公开(公告)号：US07305508B2

公开(公告)日：2007-12-04

申请号：US10692038

申请日：2003-10-22

申请人： Shiraz Ali Qureshi ,  Dong Wei ,  Terry Lee

发明人： Shiraz Ali Qureshi ,  Dong Wei ,  Terry Lee

IPC分类号： G06F12/00 ,  G06F12/14

CPC分类号： G06F9/52

摘要： In one embodiment of the invention, a method of semaphoring between a system firmware and ACPI subsystem, includes: prior to entering a critical section by a first entity, checking a turn flag to determine if a second entity has a turn to access a critical section; if the second entity has the turn, then checking an In flag of the second entity to determine if the second entity is in the critical section; if the second entity is in the critical section, then waiting for the second entity to exit the critical section; and entering the critical section by the first entity. The method may further include: if the second entity is not in the critical section, then entering the critical section by the first entity.

摘要翻译： 在本发明的一个实施例中，一种在系统固件和ACPI子系统之间进行信号的方法包括：在由第一实体进入关键部分之前，检查转弯标志以确定第二实体是否具有接近临界部分的转弯 ; 如果第二实体具有转弯，则检查第二实体的In标志以确定第二实体是否在临界区; 如果第二个实体处于临界区，那么等待第二个实体退出临界区; 并由第一实体进入关键部分。 该方法还可以包括：如果第二实体不在临界区，则由第一实体进入临界区。

公开(公告)号：US07225427B2

公开(公告)日：2007-05-29

申请号：US10173221

申请日：2002-06-14

申请人： Shiraz Ali Qureshi ,  Terry Lee ,  Martin O. Nicholes

发明人： Shiraz Ali Qureshi ,  Terry Lee ,  Martin O. Nicholes

IPC分类号： G06F9/44

CPC分类号： G06F9/4411

摘要： An interface for handing off computer system information. The interface has a data structure stored on a computer readable medium. The data structure has fields for component data pertaining to components of a computer system. The data structure is available to be populated by a first program filling in component data using identifiers for locating the component data in the data structure. The first program is able to discover components. The component data is accessible by a second program indexing the data structure with the identifiers. The second computer program is for assisting an operating system gain the component data.

摘要翻译： 用于移交计算机系统信息的界面。 该接口具有存储在计算机可读介质上的数据结构。 数据结构具有与计算机系统的组件相关的组件数据的字段。 数据结构可以由填充组件数据的第一程序填充，使用用于在数据结构中定位组件数据的标识符。 第一个程序能够发现组件。 组件数据可由第二个程序访问，该程序用标识符对数据结构进行索引。 第二计算机程序用于辅助操作系统获得组件数据。

公开(公告)号：US20060215434A1

公开(公告)日：2006-09-28

申请号：US11311948

申请日：2005-12-19

申请人： Terry Lee ,  Joseph Jeddeloh

发明人： Terry Lee ,  Joseph Jeddeloh

IPC分类号： G11C5/06 ,  G06F12/00

CPC分类号： G11C5/02 ,  H05K1/0298 ,  H05K1/181 ,  H05K2201/09972 ,  Y02P70/611

摘要： A layout for simultaneously sub-accessible memory modules is disclosed. In one embodiment, a memory module includes a printed circuit board having a plurality of sectors, each sector being electrically isolated from the other sectors and having a multi-layer structure. At least one memory device is attached to each sector, the memory devices being organized into a plurality of memory ranks. A driver is attached to the printed circuit board and is operatively coupled to the memory ranks. The driver is adapted to be coupled to a memory interface of the computer system. Because the sectors are electrically-isolated from adjacent sectors, the memory ranks are either individually or simultaneously, or both individually and simultaneously accessible by the driver so that one or more memory devices on a particular sector may be accessed at one time. In an alternate embodiment, the printed circuit board includes a driver sector electrically isolated from the other sectors and having a multi-layer structure, the driver being attached to the driver sector.

公开(公告)号：US20060212655A1

公开(公告)日：2006-09-21

申请号：US11433201

申请日：2006-05-11

申请人： Joseph Jeddeloh ,  Terry Lee

发明人： Joseph Jeddeloh ,  Terry Lee

IPC分类号： G06F12/00

CPC分类号： G11C7/1006 ,  G11C7/1051 ,  G11C7/1069 ,  G11C7/1078 ,  G11C7/1096 ,  G11C11/4093 ,  G11C11/4096

摘要： A memory module includes a memory hub coupled to several memory devices. The memory hub includes a posted write buffer that stores write requests so that subsequently issued read requests can first be coupled to the memory devices. The write request addresses are also posted in the buffer and compared to subsequent read request addresses. In the event of a positive comparison indicating that a read request is directed to an address to which an earlier write request was directed, the read data are provided from the buffer. When the memory devices are not busy servicing read request, the write requests can be transferred from the posted write buffer to the memory devices. The write requests may also be accumulated in the posted write buffer until either a predetermined number of write requests have been accumulated or the write requests have been posted for a predetermined duration.

摘要翻译： 存储器模块包括耦合到多个存储器件的存储器集线器。 存储器集线器包括存储写入请求的已发布的写入缓冲器，以便随后发出的读取请求可以首先耦合到存储器件。 写请求地址也被发布在缓冲区中，并与随后的读请求地址进行比较。 在正面比较的情况下，指示读请求被引导到较早写请求所针对的地址，从缓冲器提供读数据。 当存储器件不忙于读取请求时，写入请求可以从发布的写入缓冲区传送到存储器件。 写入请求也可以被累积在发布的写入缓冲器中，直到预定数量的写入请求已经被累积或写入请求已经被发布了预定的持续时间。

公开(公告)号：US06988664B1

公开(公告)日：2006-01-24

申请号：US10955625

申请日：2004-09-30

申请人： Roland Lee ,  Terry Lee ,  Quintin Morris ,  Jorge Schlieffers ,  Katrika Woodlock

发明人： Roland Lee ,  Terry Lee ,  Quintin Morris ,  Jorge Schlieffers ,  Katrika Woodlock

IPC分类号： G06K7/10

CPC分类号： G06K7/10881

摘要： Described is an electronic device which includes a body, an optical opening in the body and a removable cover. The body contains an optical scanner and a slot for a removable integrated circuit (“IC”) card. The optical opening provides an optical path from an external environment to the optical scanner. The removable cover which, when in a closed position coupled to the body, covers the slot and the optical opening. The cover includes a cover opening extending therethrough and, when the cover is in the closed position, the cover opening is aligned with the optical opening to permit light to enter and exit therethrough.

摘要翻译： 描述了一种电子设备，其包括主体，身体中的光学开口和可移除的盖。 主体包含一个光学扫描仪和一个可拆卸集成电路（“IC”）卡的插槽。 光学开口提供从外部环境到光学扫描仪的光路。 当处于关闭位置的可拆卸的盖子，其与主体相连，覆盖狭槽和光学开口。 所述盖包括延伸穿过其的盖开口，并且当所述盖处于关闭位置时，所述盖开口与所述光开口对准以允许光进入和离开。

公开(公告)号：US20050243589A1

公开(公告)日：2005-11-03

申请号：US11152979

申请日：2005-06-14

申请人： Terry Lee ,  Kevin Ryan

发明人： Terry Lee ,  Kevin Ryan

IPC分类号： G02B6/255 ,  G11C5/06 ,  G11C7/10 ,  G11C8/02 ,  H01L29/22 ,  H01L31/109

CPC分类号： G11C7/1054 ,  G11C7/1051 ,  G11C7/1078 ,  G11C7/1081

摘要： Optically-coupled memory systems are disclosed. In one embodiment, a system memory includes a carrier substrate, and a controller attached to the carrier substrate and operable to transmit and receive optical signals, and first and second memory modules. The module substrate of the first memory module has an aperture formed therein, the aperture being operable to provide an optical path for optical signals between the controller and an optical transmitter/receiver unit of the second memory module. Thus, the system memory provides the advantages of “free space” optical connection in a compact arrangement of memory modules. In an alternate embodiment, the first memory module includes a beam splitter attached to the module substrate proximate the aperture. In another embodiment, the first and second memory modules are staged on the carrier substrate to provide an unobstructed path for optical signals. In another embodiment, the optical transmitter/receiver unit projects outwardly from the module substrate to provide an unobstructed path for optical signals.

摘要翻译： 公开了光耦合存储器系统。 在一个实施例中，系统存储器包括载体衬底和附接到载体衬底并可操作以发射和接收光信号的控制器以及第一和第二存储器模块。 第一存储器模块的模块衬底具有形成在其中的孔，该孔可操作以为控制器和第二存储器模块的光发射器/接收器单元之间的光信号提供光路。 因此，系统存储器在紧凑的存储器模块布置中提供了“自由空间”光学连接的优点。 在替代实施例中，第一存储器模块包括在孔附近附接到模块衬底的分束器。 在另一个实施例中，第一和第二存储器模块分段在载体衬底上，以为光信号提供无阻碍的路径。 在另一个实施例中，光发射器/接收器单元从模块衬底向外突出，以提供用于光信号的无障碍路径。

公开(公告)号：US20050235090A1

公开(公告)日：2005-10-20

申请号：US11085270

申请日：2005-03-22

申请人： Terry Lee ,  Roy Greeff ,  David Ovard

发明人： Terry Lee ,  Roy Greeff ,  David Ovard

IPC分类号： G06F13/16 ,  G06F13/40 ,  G06F13/42 ,  G06F13/00

CPC分类号： G06F13/4265 ,  G06F13/1684 ,  G06F13/4086 ,  G06F13/4247 ,  Y02D10/14 ,  Y02D10/151

摘要： A method and associated apparatus is provided for improving the performance of a high speed memory bus by substantially eliminating bus reflections caused by electrical stubs. The stubs are substantially eliminated by connecting system components in a substantially stubless configuration using a looping bus for continuing the looping bus through each device. The invention also provides an interface circuit that enables data communications between devices of different technologies. The interface circuit connects to the looping data bus and includes a circuit for providing voltage level, encoding type, and data rate conversions for data received from the looping data bus and intended for use on a second data bus connected to the interface circuit.