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    Semiconductor device with a planar junction and self-passivating termination
    4.
    发明授权
    Semiconductor device with a planar junction and self-passivating termination 失效
    具有平面结和自钝化终端的半导体器件

    公开(公告)号：US4805004A

    公开(公告)日：1989-02-14

    申请号：US941622

    申请日：1986-12-11

    申请人： Luciano Gandolfi ,  Salvatore Musumeci

    发明人： Luciano Gandolfi ,  Salvatore Musumeci

    IPC分类号： H01L29/73 ,  H01L21/331 ,  H01L29/06 ,  H01L29/08 ,  H01L29/732 ,  H01L29/36 ,  H01L29/70

    CPC分类号： H01L29/0661 ,  H01L29/0611 ,  H01L29/0615 ,  H01L29/0821 ,  H01L29/7325

    摘要： A semiconductor device with a planar junction and self-passivating termination includes: a silicon substrate of one type of conductivity; an epitaxial layer of a second type of conductivity which is opposite to the first type of conductivity, lying on the substrate, so as to form with it a planar PN junction; a first region, of the first type of conductivity, that delimits, in its interior, an active portion of the device and extends transversely, from the surface of the epitaxial layer to the substrate with a portion having a high concentration of impurities and, on the surface, in the epitaxial layer, with a portion having a low concentration of impurities; and another region immersed in the epitaxial layer and of the same type of conductivity, but with a higher concentration of impurities. The latter region and the top portion of the first region extend toward each other with progressively decreasing concentrations of impurities. The first region may consist of a thin surface zone diffused on the walls and on the bottom of a deep groove of the type normally made in mesa devices. However, unlike mesa devices of the prior art the device according to the present invention does not require a thick layer of dielectric material in contact with the junction and its electrical properties are therefore improved and more reliable.

    摘要翻译： 具有平面结和自钝化终端的半导体器件包括：一种导电性的硅衬底; 与第一导电类型相反的第二类导电性的外延层位于衬底上，以便与其形成平面PN结; 第一类型的导电性的第一区域，其在其内部限定了器件的有源部分并且从外延层的表面横向延伸到具有高浓度杂质的部分，并且在 在外延层中的具有低浓度杂质的部分的表面; 和浸入外延层中并具有相同类型导电性的另一区域，但杂质浓度较高。 后一区域和第一区域的顶部部分随着杂质浓度逐渐降低而相互延伸。 第一区域可以由通常在台面装置中形成的类型的深沟槽的壁上和底部扩散的薄表面区域组成。 然而，与现有技术的台面装置不同，根据本发明的装置不需要与接合部接触的厚的介电材料层，因此其电性能得到改善并且更可靠。

    Modular semiconductor power device
    7.
    再颁专利
    Modular semiconductor power device 失效
    模块化半导体功率器件

    公开(公告)号：USRE38037E1

    公开(公告)日：2003-03-18

    申请号：US08184783

    申请日：1994-01-21

    申请人： Antonio Perniciaro Spatrisano ,  Luciano Gandolfi ,  Carlo Minotti ,  Natale Di Cristina

    发明人： Antonio Perniciaro Spatrisano ,  Luciano Gandolfi ,  Carlo Minotti ,  Natale Di Cristina

    IPC分类号： H01L23495

    CPC分类号： H01L23/49575 ,  H01L21/50 ,  H01L25/0655 ,  H01L2924/0002 ,  Y10T29/4913 ,  Y10T29/49146 ,  H01L2924/00

    摘要： A modular semiconductor power device has a conductive member consisting of an alumina plate to which copper layers are soldered on opposite sides. A chip is soldered to one of these layers and the other of these layers is soldered in turn to a metal heat sink. The chip is connected to respective copper strips which, in turn, are soldered to thermal strips originally forming part of a frame so that, after the device is encapsulated in a synthetic resin, the connecting members of the frame can be cut away to leave free ends of the latter strips exposed.

    摘要翻译： 模块化半导体功率器件具有由氧化铝板构成的导电部件，铜层在相对侧被焊接。 将芯片焊接到这些层中的一个，并且这些层中的另一个依次被焊接到金属散热器。 芯片连接到相应的铜带上，铜条又被焊接到最初形成框架的一部分的热条上，使得在该装置被封装在合成树脂中之后，框架的连接构件可以被切除以免去 后者条的端部暴露。

    Method of passivating high-voltage power semiconductor devices
    9.
    发明授权
    Method of passivating high-voltage power semiconductor devices 失效
    钝化高压功率半导体器件的方法

    公开(公告)号：US4126931A

    公开(公告)日：1978-11-28

    申请号：US786385

    申请日：1977-04-11

    申请人： Luciano Gandolfi ,  Rudolf Rocak

    发明人： Luciano Gandolfi ,  Rudolf Rocak

    IPC分类号： H01L21/304 ,  H01L21/312 ,  H01L21/56 ,  H01L23/31 ,  H01L29/06 ,  B01J17/00

    CPC分类号： H01L29/0607 ,  H01L21/56 ,  H01L23/3178 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/3025

    摘要： Several junction-type semiconductor chips, specifically NPN transistors, are simultaneously produced by mesa technique from a semiconductor wafer by adhering to one major surface thereo a supporting structure including a bonding layer of wax, similarly adhering a protective layer of a relatively soft material -- likewise a wax -- to the opposite major wafer surface, and dividing the wafer into chips temporarily held together by the supporting structure. The last-mentioned step involves a splitting of the protective layer into isolated sections by making incisions in that layer cutting into the underlying wafer body, followed by an erosion of the semiconductor material of that body by an etching solution to form channels which extend completely across the wafer and terminate at the supporting structure, these channels being widened in the immediate vicinity of the protective layer to form undercuts. A continuous passivating film is applied, e.g. by vapor deposition, to the channel walls and to the several isolated sections of the protective wax layer adhering to the exposed chip faces, the film enveloping projecting edge portions of these sections which extend partly across the channel entrances. After these edge portions are mechanically cut off, film segments adhering to the isolated wax-layer sections can be removed by dissolving the wax; concurrent dissolution of the bonding layer of the supporting structure removes that structure from the chips which then remain interconnected only by parts of the passivating film bridging the lateral channel walls.

    摘要翻译： 几个结型半导体芯片，特别是NPN晶体管，通过台式技术从半导体晶片通过粘附在其一个主表面上同时由包括蜡的粘结层的支撑结构产生，类似地粘附相对柔软材料的保护层 - 同样地 蜡 - 到相对的主要晶片表面，并且将晶片分成由支撑结构暂时保持在一起的芯片。 最后提到的步骤涉及通过在该层切割入下面的晶片体中的切口将保护层分离成隔离部分，然后通过蚀刻溶液侵蚀该主体的半导体材料，以形成完全延伸的通道 晶片并且终止于支撑结构，这些通道在保护层附近被加宽以形成底切。 连续钝化膜，例如， 通过气相沉积到粘附到暴露的芯片表面的保护性蜡层的通道壁和几个隔离部分，这些部分的薄膜包围突出边缘部分部分延伸穿过通道入口。 在这些边缘部分被机械切割之后，粘附到隔离的蜡层部分的膜段可以通过溶解蜡来除去; 支撑结构的粘合层的同时溶解从芯片中去除了这种结构，然后这些结构仅通过桥接横向通道壁的部分钝化膜保持互连。