Microstructure processing method and microstructure processing apparatus

    公开(公告)号:US10336609B2

    公开(公告)日:2019-07-02

    申请号:US15610987

    申请日:2017-06-01

    申请人: HITACHI, LTD.

    IPC分类号: B81C1/00 B05D3/06 B81C99/00

    摘要: First, an ion beam is applied to a workpiece to form a tapered hole the side wall of which is inclined. Next, the application of the ion beam is stopped, and then a material gas is introduced from the gas source to the upper surface of the workpiece from an oblique direction to cause gas molecules to be adsorbed to the upper surface of the workpiece and to the upper portion of the side wall of the hole. Next, introduction of the material gas is stopped, and then the ion beam is applied again to the region of the workpiece where the hole is formed. As a result, at the upper portion of the side wall of the hole, film formation occurs using the gas molecules as the material adsorbed to the side wall of the hole, and, at the bottom portion of the hole, etching of the workpiece occurs.

    Capacitive device and piezoelectric device

    公开(公告)号:US11376628B2

    公开(公告)日:2022-07-05

    申请号:US16534012

    申请日:2019-08-07

    申请人: Hitachi, Ltd.

    摘要: A capacitive device includes a unit cell including a CMUT, and a transmission/reception plate for impedance matching which is provided above the unit cell via a connection portion, in which a membrane of the CMUT constituting the unit cell is connected to the transmission/reception plate via the connection portion having an area smaller than that of the transmission/reception plate. The area of the transmission/reception plate is desirably larger than the area of a hollow portion of the CMUT.

    ULTRASONIC PROBE AND ULTRASONIC MEASUREMENT APPARATUS USING THE SAME

    公开(公告)号:US20210162462A1

    公开(公告)日:2021-06-03

    申请号:US16768863

    申请日:2018-08-23

    申请人: Hitachi, Ltd.

    摘要: An ultrasonic probe includes a semiconductor chip 101 in which a CMUT 102 is formed and an electrode pad 101a electrically connected to an upper electrode or a lower electrode of the CMUT 102 is provided and a flexible substrate 100 in which a bump 100b electrically connected to the electrode pad 101a is provided and the bump 100b is disposed in a portion overlapping with a stepped portion 101e of the semiconductor chip 101. Further, a height of a connection surface 101aa of the electrode pad 101a of the semiconductor chip 101 connected to the bump 100b is lower than a height of a lower surface of the lower electrode.

    Semiconductor chip
    10.
    发明授权

    公开(公告)号:US11502046B2

    公开(公告)日:2022-11-15

    申请号:US16928909

    申请日:2020-07-14

    申请人: Hitachi, Ltd.

    发明人: Shuntaro Machida

    摘要: Provided is a semiconductor chip, including: a semiconductor substrate; a thin film formed on the semiconductor substrate, the thin film having internal stress; and a semiconductor device formed on the semiconductor substrate that has the thin film formed thereon, wherein the semiconductor chip warps due to the internal stress of the thin film.