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公开(公告)号:US10603689B2
公开(公告)日:2020-03-31
申请号:US15513588
申请日:2015-04-21
申请人: Hitachi, Ltd.
发明人: Shuntaro Machida , Daisuke Ryuzaki , Tatsuya Nagata , Naoaki Yamashita , Yuko Hanaoka , Yasuhiro Yoshimura
摘要: A structure that prevents a substrate from being warped is provided on a region or a location other than a membrane that determines the characteristics of a CMUT. In a CMUT in a structure in which a first conductive layer and a second conductive layer are provided sandwiching a cavity on a substrate, for example, as a warpage prevention structure, a warpage prevention layer that prevents the substrate from being warped is provided between the substrate and the first conductive film. When the insulating film disposed between the cavity and the first conductive film and the insulating film disposed between the cavity and the second conductive film are silicon oxide films, the warpage prevention layer includes a silicon nitride film.
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公开(公告)号:US10410826B2
公开(公告)日:2019-09-10
申请号:US16069796
申请日:2016-03-18
申请人: HITACHI, LTD.
发明人: Tetsufumi Kawamura , Misuzu Sagawa , Kazuki Watanabe , Keiji Watanabe , Shuntaro Machida , Nobuyuki Sugii , Daisuke Ryuzaki
IPC分类号: H01J37/28 , H01J37/302 , H01J37/305 , H01L21/3065 , H01L21/66 , B81C1/00
摘要: The invention is directed to a technique for reducing the time from the start of fabrication of a prototype structure to the completion of fabrication of a real structure. A device processing method includes steps of: fabricating a first structure using an ion beam under a first condition in a first region on a substrate; measuring a size of the first structure which is fabricated; comparing the measurement result with design data; determining a second condition from the comparison result; and fabricating a second structure using the ion beam under the second condition in a second region on the substrate.
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公开(公告)号:US09873137B2
公开(公告)日:2018-01-23
申请号:US14799632
申请日:2015-07-15
申请人: HITACHI, LTD.
CPC分类号: B06B1/0292 , B81C1/00158 , B81C1/00182 , B81C1/00214 , B81C1/00476 , B81C1/00531 , B81C1/00611 , B81C2201/0104 , B81C2201/0107 , B81C2201/0109 , C09K13/00 , C23F4/00 , H01L21/30604 , H01L29/84 , Y10T29/49156
摘要: Disclosed is an ultrasonic transducer that is provided with: a bottom electrode; an electric connection part which is connected to the bottom electrode from the bottom of the bottom electrode; a first insulating film which is formed so as to cover the bottom electrode; a cavity which is formed on the first insulating film so as to overlap the bottom electrode when seen from above; a second insulating film which is formed so as to cover the cavity; and a top electrode which is formed on the second insulating film so as to overlap the cavity when seen from above. The electric connection part to the bottom electrode is positioned so as to not overlap the cavity when seen from above.
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公开(公告)号:US10336609B2
公开(公告)日:2019-07-02
申请号:US15610987
申请日:2017-06-01
申请人: HITACHI, LTD.
发明人: Keiji Watanabe , Shuntaro Machida , Katsuya Miura , Aki Takei , Tetsufumi Kawamura , Nobuyuki Sugii , Daisuke Ryuzaki
摘要: First, an ion beam is applied to a workpiece to form a tapered hole the side wall of which is inclined. Next, the application of the ion beam is stopped, and then a material gas is introduced from the gas source to the upper surface of the workpiece from an oblique direction to cause gas molecules to be adsorbed to the upper surface of the workpiece and to the upper portion of the side wall of the hole. Next, introduction of the material gas is stopped, and then the ion beam is applied again to the region of the workpiece where the hole is formed. As a result, at the upper portion of the side wall of the hole, film formation occurs using the gas molecules as the material adsorbed to the side wall of the hole, and, at the bottom portion of the hole, etching of the workpiece occurs.
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公开(公告)号:US11642695B2
公开(公告)日:2023-05-09
申请号:US16768863
申请日:2018-08-23
申请人: Hitachi, Ltd.
IPC分类号: B06B1/02 , A61B8/00 , H01L23/498 , H01L23/00
CPC分类号: B06B1/0292 , A61B8/4444 , A61B8/54 , H01L23/4985 , H01L24/08 , B06B2201/76 , H01L2224/16227
摘要: An ultrasonic probe includes a semiconductor chip in which an ultrasonic transducer is formed and an electrode pad electrically connected to an upper electrode or a lower electrode of the ultrasonic transducer is provided and a flexible substrate in which a bump electrically connected to the electrode pad is provided and the bump is disposed in a portion overlapping with a stepped portion of the semiconductor chip. Further, a height of a connection surface of the electrode pad of the semiconductor chip connected to the bump is lower than a height of a lower surface of the lower electrode.
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公开(公告)号:US11376628B2
公开(公告)日:2022-07-05
申请号:US16534012
申请日:2019-08-07
申请人: Hitachi, Ltd.
摘要: A capacitive device includes a unit cell including a CMUT, and a transmission/reception plate for impedance matching which is provided above the unit cell via a connection portion, in which a membrane of the CMUT constituting the unit cell is connected to the transmission/reception plate via the connection portion having an area smaller than that of the transmission/reception plate. The area of the transmission/reception plate is desirably larger than the area of a hollow portion of the CMUT.
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公开(公告)号:US20210162462A1
公开(公告)日:2021-06-03
申请号:US16768863
申请日:2018-08-23
申请人: Hitachi, Ltd.
IPC分类号: B06B1/02 , H01L23/00 , H01L23/498 , A61B8/00
摘要: An ultrasonic probe includes a semiconductor chip 101 in which a CMUT 102 is formed and an electrode pad 101a electrically connected to an upper electrode or a lower electrode of the CMUT 102 is provided and a flexible substrate 100 in which a bump 100b electrically connected to the electrode pad 101a is provided and the bump 100b is disposed in a portion overlapping with a stepped portion 101e of the semiconductor chip 101. Further, a height of a connection surface 101aa of the electrode pad 101a of the semiconductor chip 101 connected to the bump 100b is lower than a height of a lower surface of the lower electrode.
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8.
公开(公告)号:US09964635B2
公开(公告)日:2018-05-08
申请号:US14652039
申请日:2013-11-29
申请人: HITACHI, LTD.
发明人: Shuntaro Machida , Akifumi Sako , Taiichi Takezaki , Yasuhiro Yoshimura , Tatsuya Nagata , Naoaki Yamashita , Hiroki Tanaka
CPC分类号: G01S7/52079 , A61B8/4444 , A61B8/4494 , A61B8/54 , B06B1/0292 , B81C1/00301 , G01S15/8915
摘要: Both controlling damage when assembling an ultrasonic probe using a chip formed with a capacitive ultrasonic transducer and securing operational reliability are achieved. In a semiconductor substrate on which the capacitive ultrasonic transducer (CMUT) is formed on a first primary surface, a protective film is formed on the surface of the ultrasonic transducer which is formed on the first primary surface of the semiconductor substrate which is then thinned by polishing a second primary surface opposite to the first primary surface of the semiconductor substrate, an ultrasonic transducer chip is cutout of the semiconductor substrate, a sound absorbing material is provided on the surface opposite to the surface formed with the ultrasonic transducer, and the protective film formed on the surface of the ultrasonic transducer is removed.
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公开(公告)号:US11904356B2
公开(公告)日:2024-02-20
申请号:US16699185
申请日:2019-11-29
申请人: Hitachi, Ltd.
CPC分类号: B06B1/0292 , A61B5/0095 , A61B8/12 , A61B8/4494 , B81B3/0021 , B81C1/00158 , G01N29/2406 , B81B2201/0271 , B81B2203/0127 , B81B2203/0315 , B81B2203/04 , B81C2201/0105 , G01N2291/101
摘要: A highly-sensitive ultrasonic transducer with good yield is provided. The ultrasonic transducer includes a cavity layer, a pair of electrodes positioned above and below the cavity layer, insulating layers disposed above and below each of the pair of electrodes, and a filled hole that penetrates, in a vertical direction, at least a portion of the insulating layers positioned above the cavity layer. When the ultrasonic transducer is viewed from above, each electrode of the pair of electrodes includes, at a position that overlaps the embedded hole, a non-electrode region where the electrodes are not formed.
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公开(公告)号:US11502046B2
公开(公告)日:2022-11-15
申请号:US16928909
申请日:2020-07-14
申请人: Hitachi, Ltd.
发明人: Shuntaro Machida
摘要: Provided is a semiconductor chip, including: a semiconductor substrate; a thin film formed on the semiconductor substrate, the thin film having internal stress; and a semiconductor device formed on the semiconductor substrate that has the thin film formed thereon, wherein the semiconductor chip warps due to the internal stress of the thin film.
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