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1.发明申请METHOD AND APPARATUS FOR SUPPORTING PROGRAMMABLE SOFTWARE CONTEXT STATE EXECUTION DURING HARDWARE CONTEXT RESTORE FLOW 有权在硬件上下文恢复流程期间支持可编程软件上下文执行的方法和装置公开(公告)号：US20150123980A1
公开(公告)日：2015-05-07
申请号：US14072622
申请日：2013-11-05
摘要： A method and apparatus for supporting programmable software context state execution during hardware context restore flow is described. In one example, a context ID is assigned to graphics applications including a unique context memory buffer, a unique indirect context pointer and a corresponding size to each context ID, an indirect context offset, and an indirect context buffer address range. When execution of the first context workload is indirected, the state of the first context workload is saved to the assigned context memory buffer. The indirect context pointer, the indirect context offset and a size of the indirect context buffer address range are saved to registers that are independent of the saved context state. The context is restored by accessing the saved indirect context pointer, the indirect context offset and the buffer size.
摘要翻译： 描述了用于在硬件上下文恢复流程期间支持可编程软件上下文状态执行的方法和装置。 在一个示例中，上下文ID被分配给包括唯一上下文存储器缓冲器，唯一间接上下文指针和对每个上下文ID，间接上下文偏移以及间接上下文缓冲器地址范围的对应大小的图形应用。 当第一上下文工作负载的执行被间接时，第一上下文工作负载的状态被保存到所分配的上下文存储器缓冲器中。 间接上下文指针，间接上下文偏移量和间接上下文缓冲区地址范围的大小保存到独立于保存的上下文状态的寄存器中。 通过访问保存的间接上下文指针，间接上下文偏移量和缓冲区大小来恢复上下文。
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2.发明授权Method and apparatus for supporting programmable software context state execution during hardware context restore flow 有权用于在硬件上下文恢复流程期间支持可编程软件上下文状态执行的方法和装置公开(公告)号：US09563466B2
公开(公告)日：2017-02-07
申请号：US14072622
申请日：2013-11-05
摘要： A method and apparatus for supporting programmable software context state execution during hardware context restore flow is described. In one example, a context ID is assigned to graphics applications including a unique context memory buffer, a unique indirect context pointer and a corresponding size to each context ID, an indirect context offset, and an indirect context buffer address range. When execution of the first context workload is indirected, the state of the first context workload is saved to the assigned context memory buffer. The indirect context pointer, the indirect context offset and a size of the indirect context buffer address range are saved to registers that are independent of the saved context state. The context is restored by accessing the saved indirect context pointer, the indirect context offset and the buffer size.
摘要翻译： 描述了用于在硬件上下文恢复流程期间支持可编程软件上下文状态执行的方法和装置。 在一个示例中，上下文ID被分配给包括唯一上下文存储器缓冲器，唯一间接上下文指针和对每个上下文ID，间接上下文偏移以及间接上下文缓冲器地址范围的对应大小的图形应用。 当第一上下文工作负载的执行被间接时，第一上下文工作负载的状态被保存到所分配的上下文存储器缓冲器中。 间接上下文指针，间接上下文偏移量和间接上下文缓冲区地址范围的大小保存到独立于保存的上下文状态的寄存器中。 通过访问保存的间接上下文指针，间接上下文偏移量和缓冲区大小来恢复上下文。
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公开(公告)号：US20150002522A1
公开(公告)日：2015-01-01
申请号：US13931915
申请日：2013-06-29
IPC分类号： G06T1/20
摘要： Mid-command buffer preemption is described for graphics workloads in a graphics processing environment. In one example, instructions of a first context are executed at a graphics processor, the first context has a sequence of instructions in an addressable buffer and at least one of the instructions is a preemption instruction. Upon executing the preemption instruction, execution of the first context is stopped before the sequence of instructions is completed. An address is stored for an instruction with which the first context will be resumed. The second context is executed, and upon completion of the execution of the second context, the execution of the first context is resumed at the stored address.
摘要翻译： 描述图形处理环境中图形工作负载的中间命令缓冲区抢占。 在一个示例中，在图形处理器处执行第一上下文的指令，第一上下文在可寻址缓冲器中具有指令序列，并且指令中的至少一个是抢占指令。 在执行抢占指令之后，在指令序列完成之前停止第一上下文的执行。 存储用于第一上下文将被恢复的指令的地址。 执行第二上下文，并且在完成第二上下文的执行时，在存储的地址处恢复执行第一上下文。
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公开(公告)号：US09659342B2
公开(公告)日：2017-05-23
申请号：US13931915
申请日：2013-06-29
摘要： Mid-command buffer preemption is described for graphics workloads in a graphics processing environment. In one example, instructions of a first context are executed at a graphics processor, the first context has a sequence of instructions in an addressable buffer and at least one of the instructions is a preemption instruction. Upon executing the preemption instruction, execution of the first context is stopped before the sequence of instructions is completed. An address is stored for an instruction with which the first context will be resumed. The second context is executed, and upon completion of the execution of the second context, the execution of the first context is resumed at the stored address.
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公开(公告)号：US20150277981A1
公开(公告)日：2015-10-01
申请号：US14227692
申请日：2014-03-27
申请人： Hema C. Nalluri , Aditya Navale , Peter L. Doyle , Murali Ramadoss , Balaji Vembu , Jeffery S. Boles
发明人： Hema C. Nalluri , Aditya Navale , Peter L. Doyle , Murali Ramadoss , Balaji Vembu , Jeffery S. Boles
CPC分类号： G06F9/5038 , G06T1/20
摘要： Methods and apparatuses may prioritize the processing of high priority and low priority contexts submitted to a processing unit through separate high priority and low priority context submission ports. According to one embodiment, submission of a context to the low priority port causes contexts in progress to be preempted, whereas submission of a context to the high priority port causes contexts in progress to be paused.
摘要翻译： 方法和设备可以优先处理通过单独的高优先级和低优先级上下文提交端口提交给处理单元的高优先级和低优先权上下文。 根据一个实施例，向低优先级端口提交上下文导致正在进行的上下文被抢占，而向高优先级端口提交上下文导致正在进行的上下文被暂停。
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公开(公告)号：US09619855B2
公开(公告)日：2017-04-11
申请号：US13976843
申请日：2011-11-18
CPC分类号： G06T1/20 , G06T15/005 , G06T15/10 , G06T2200/28 , G06T2210/52
摘要： Systems, apparatus and methods are described including distributing batches of geometric objects to a multi-core system, at each processor core, performing vertex processing and geometry setup processing on the corresponding batch of geometric objects, storing the vertex processing results shared memory accessible to all of the cores, and storing the geometry setup processing results in local storage. Each particular core may then perform rasterization using geometry setup results obtained from local storage within the particular core and from local storage of at least one of the other processor cores.
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7.发明申请公开(公告)号：US20140306949A1
公开(公告)日：2014-10-16
申请号：US13976843
申请日：2011-11-18
CPC分类号： G06T1/20 , G06T15/005 , G06T15/10 , G06T2200/28 , G06T2210/52
摘要： Systems, apparatus and methods are described including distributing batches of geometric objects to a multi-core system, at each processor core, performing vertex processing and geometry setup processing on the corresponding batch of geometric objects, storing the vertex processing results shared memory accessible to all of the cores, and storing the geometry setup processing results in local storage. Each particular core may then perform rasterization using geometry setup results obtained from local storage within the particular core and from local storage of at least one of the other processor cores.
摘要翻译： 描述了系统，装置和方法，包括将批量的几何对象分发到多核系统，在每个处理器核心处，对相应批次的几何对象执行顶点处理和几何设置处理，将顶点处理结果存储到所有可访问的共享存储器 的核心，并将几何设置处理结果存储在本地存储中。 然后，每个特定核心可以使用从特定核心内的本地存储器获得的几何设置结果以及至少一个其他处理器核心的本地存储来执行光栅化。
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公开(公告)号：US20170091989A1
公开(公告)日：2017-03-30
申请号：US14865933
申请日：2015-09-25
CPC分类号： G06T15/80 , G06F9/48 , G06F9/4881 , G06T1/20
摘要： By scheduling/managing workload submission to a POSH pipe one can exploit parallelism with minimum impact to the software scheduler in some embodiments.
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公开(公告)号：US20180308206A1
公开(公告)日：2018-10-25
申请号：US15698217
申请日：2017-09-07
申请人： Prasoonkumar Surti , Narayan Srinivasa , Feng Chen , Joydeep Ray , Ben J. Ashbaugh , Nicolas C. Galoppo Von Borries , Eriko Nurvitadhi , Balaji Vembu , Tsung-Han Lin , Kamal Sinha , Rajkishore Barik , Sara S. Baghsorkhi , Justin E. Gottschlich , Altug Koker , Nadathur Rajagopalan Satish , Farshad Akhbari , Dukhwan Kim , Wenyin Fu , Travis T. Schluessler , Josh B. Mastronarde , Linda L. Hurd , John H. Feit , Jeffery S. Boles , Adam T. Lake , Karthik Vaidyanathan , Devan Burke , Subramaniam Maiyuran , Abhishek R. Appu
发明人： Prasoonkumar Surti , Narayan Srinivasa , Feng Chen , Joydeep Ray , Ben J. Ashbaugh , Nicolas C. Galoppo Von Borries , Eriko Nurvitadhi , Balaji Vembu , Tsung-Han Lin , Kamal Sinha , Rajkishore Barik , Sara S. Baghsorkhi , Justin E. Gottschlich , Altug Koker , Nadathur Rajagopalan Satish , Farshad Akhbari , Dukhwan Kim , Wenyin Fu , Travis T. Schluessler , Josh B. Mastronarde , Linda L. Hurd , John H. Feit , Jeffery S. Boles , Adam T. Lake , Karthik Vaidyanathan , Devan Burke , Subramaniam Maiyuran , Abhishek R. Appu
CPC分类号： G06T1/20 , G06F3/0613 , G06F3/0659 , G06F3/0679 , G06F3/1438 , G06N3/0445 , G06N3/0454 , G06N3/063 , G06N3/08 , G06N3/084 , G06T1/60 , G09G5/001 , G09G5/363 , G09G2352/00 , G09G2360/06 , G09G2360/08 , G09G2360/121 , G09G2360/123 , G09G2370/08
摘要： An apparatus to facilitate compute optimization is disclosed. The apparatus includes a memory device including a first integrated circuit (IC) including a plurality of memory channels and a second IC including a plurality of processing units, each coupled to a memory channel in the plurality of memory channels.
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10.发明申请公开(公告)号：US20190261122A1
公开(公告)日：2019-08-22
申请号：US16269778
申请日：2019-02-07
申请人： Joydeep Ray , Travis T. Schluessler , Prasoonkumar Surti , John H. Feit , Nikos Kaburlasos , Jacek Kwiatkowski , Abhishek R. Appu , James M. Holland , Jeffery S. Boles , Jonathan Kennedy , Louis Feng , Atsuo Kuwahara , Barnan Das , Narayan Biswal , Stanley J. Baran , Gokcen Cilingir , Nilesh V. Shah , Archie Sharma , Mayuresh M. Varerkar
发明人： Joydeep Ray , Travis T. Schluessler , Prasoonkumar Surti , John H. Feit , Nikos Kaburlasos , Jacek Kwiatkowski , Abhishek R. Appu , James M. Holland , Jeffery S. Boles , Jonathan Kennedy , Louis Feng , Atsuo Kuwahara , Barnan Das , Narayan Biswal , Stanley J. Baran , Gokcen Cilingir , Nilesh V. Shah , Archie Sharma , Mayuresh M. Varerkar
摘要： Systems, apparatuses and methods may provide away to render augmented reality (AR) and/or virtual reality (VR) sensory enhancements using ray tracing. More particularly, systems, apparatuses and methods may provide a way to normalize environment information captured by multiple capture devices, and calculate, for an observer, the sound sources or sensed events vector paths. The systems, apparatuses and methods may detect and/or manage one or more capture devices and assign one or more the capture devices based on one or more conditions to provide observer an immersive VR/AR experience.
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