公开(公告)号：US6031288A

公开(公告)日：2000-02-29

申请号：US747392

申请日：1996-11-12

申请人： Hiromi Todorobaru ,  Hideo Miura ,  Masayuki Suzuki ,  Shinji Nishihara ,  Shuji Ikeda ,  Masashi Sahara ,  Shinichi Ishida ,  Hiromi Abe ,  Atushi Ogishima ,  Hiroyuki Uchiyama ,  Sonoko Abe

发明人： Hiromi Todorobaru ,  Hideo Miura ,  Masayuki Suzuki ,  Shinji Nishihara ,  Shuji Ikeda ,  Masashi Sahara ,  Shinichi Ishida ,  Hiromi Abe ,  Atushi Ogishima ,  Hiroyuki Uchiyama ,  Sonoko Abe

IPC分类号： H01L21/28 ,  H01L21/768 ,  H01L21/8242 ,  H01L23/485 ,  H01L23/522 ,  H01L27/108 ,  H01L23/48

CPC分类号： H01L29/7845 ,  H01L23/485 ,  H01L23/5226 ,  H01L2924/0002

摘要： A semiconductor device comprises a silicon substrate, an electrical wiring metal, an insulating film formed on the silicon substrate, a plurality of contact holes formed in the insulating film for connecting the silicon substrate and the electrical wiring metal to each other, and a titanium silicide film formed in the contact holes. The thickness of the titanium silicide film is 10 nm to 120 nm or, preferably, 20 nm to 84 nm. Semiconductor regions and the electrical wiring metal are connected to each other through the titanium silicide film.

摘要翻译： 半导体器件包括硅衬底，电布线金属，形成在硅衬底上的绝缘膜，形成在用于将硅衬底和电布线金属彼此连接的绝缘膜中的多个接触孔，以及硅化钛 膜在接触孔中形成。 硅化钛膜的厚度为10nm〜120nm，优选为20nm〜84nm。 半导体区域和电布线金属通过硅化钛膜彼此连接。

公开(公告)号：US06503803B2

公开(公告)日：2003-01-07

申请号：US09766645

申请日：2001-01-23

申请人： Hiromi Todorobaru ,  Hideo Miura ,  Masayuki Suzuki ,  Shinji Nishihara ,  Shuji Ikeda ,  Masashi Sahara ,  Shinichi Ishida ,  Hiromi Abe ,  Atushi Ogishima ,  Hiroyuki Uchiyama ,  Sonoko Abe

发明人： Hiromi Todorobaru ,  Hideo Miura ,  Masayuki Suzuki ,  Shinji Nishihara ,  Shuji Ikeda ,  Masashi Sahara ,  Shinichi Ishida ,  Hiromi Abe ,  Atushi Ogishima ,  Hiroyuki Uchiyama ,  Sonoko Abe

IPC分类号： H01L21336

CPC分类号： H01L29/7845 ,  H01L23/485 ,  H01L23/5226 ,  H01L2924/0002 ,  H01L2924/00

摘要： Disclosed is a method of fabricating a semiconductor device including forming an insulating film on a silicon substrate; forming a contact hole in the insulating film; depositing a titanium film to be in contact with the silicon substrate in the contact hole; and causing a heat reaction between the titanium film and the silicon substrate such that the titanium film is subjected to silicide reaction with the thickness 4 nm to 48 nm or, more preferably, with the thickness of 8 nm to 34 nm. In the instance where the contact hole is filled with doped polycrystal silicon material, the titanium film is deposited to be in contact with the polycrystal silicon in the contact hole. The silicon substrate/silicon body may have at least a MISFET formed thereon in which case the contact hole is formed to expose an active region of the MISFET, as one example.

摘要翻译： 公开了一种制造半导体器件的方法，包括在硅衬底上形成绝缘膜; 在绝缘膜上形成接触孔; 在接触孔中沉积与硅衬底接触的钛膜; 并且在钛膜和硅衬底之间引起热反应，使得钛膜以4nm至48nm的厚度进行硅化物反应，更优选地，以8nm至34nm的厚度进行硅化物反应。 在接触孔填充掺杂的多晶硅材料的情况下，沉积钛膜以与接触孔中的多晶硅接触。 作为一个示例，硅衬底/硅体可以具有至少形成在其上的MISFET，在这种情况下，形成接触孔以暴露MISFET的有源区。

公开(公告)号：US06268658B1

公开(公告)日：2001-07-31

申请号：US09500242

申请日：2000-02-08

申请人： Hiromi Todorobaru ,  Hideo Miura ,  Masayuki Suzuki ,  Shinji Nishihara ,  Shuji Ikeda ,  Masashi Sahara ,  Shinichi Ishida ,  Hiromi Abe ,  Atushi Ogishima ,  Hiroyuki Uchiyama ,  Sonoko Abe

发明人： Hiromi Todorobaru ,  Hideo Miura ,  Masayuki Suzuki ,  Shinji Nishihara ,  Shuji Ikeda ,  Masashi Sahara ,  Shinichi Ishida ,  Hiromi Abe ,  Atushi Ogishima ,  Hiroyuki Uchiyama ,  Sonoko Abe

IPC分类号： H01L2348

CPC分类号： H01L29/7845 ,  H01L23/485 ,  H01L23/5226 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device comprises a silicon substrate, an electrical wiring metal, an insulating film formed on the silicon substrate, a plurality of contact holes formed in the insulating film for connecting the silicon substrate and the electrical wiring metal to each other, and a titanium silicide film formed in the contact holes. The thickness of the titanium silicide film is 10 nm to 120 nm or, preferably, 20 nm to 84 nm. Semiconductor regions and the electrical wiring metal are connected to each other through the titanium silicide film.

摘要翻译： 半导体器件包括硅衬底，电布线金属，形成在硅衬底上的绝缘膜，形成在用于将硅衬底和电布线金属彼此连接的绝缘膜中的多个接触孔，以及硅化钛 膜在接触孔中形成。 硅化钛膜的厚度为10nm〜120nm，优选为20nm〜84nm。 半导体区域和电布线金属通过硅化钛膜彼此连接。

公开(公告)号：US06583049B2

公开(公告)日：2003-06-24

申请号：US09998644

申请日：2001-12-03

申请人： Masayuki Suzuki ,  Shinji Nishihara ,  Masashi Sahara ,  Shinichi Ishida ,  Hiromi Abe ,  Sonoko Tohda ,  Hiroyuki Uchiyama ,  Hideaki Tsugane ,  Yoshiaki Yoshiura

发明人： Masayuki Suzuki ,  Shinji Nishihara ,  Masashi Sahara ,  Shinichi Ishida ,  Hiromi Abe ,  Sonoko Tohda ,  Hiroyuki Uchiyama ,  Hideaki Tsugane ,  Yoshiaki Yoshiura

IPC分类号： H01L214763

CPC分类号： H01L21/76862 ,  H01L21/32051 ,  H01L21/7684 ,  H01L21/76841 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/7685 ,  H01L23/53223 ,  H01L23/53266 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05124 ,  H01L2224/05166 ,  H01L2224/05184 ,  H01L2224/05187 ,  H01L2224/05624 ,  H01L2224/13099 ,  H01L2224/45144 ,  H01L2224/48463 ,  H01L2224/48624 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/0104 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/04941 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/01007 ,  H01L2924/04953 ,  H01L2924/00

摘要： A method for making a semiconductor integrated circuit device comprises the steps of: (a) depositing a first underlying film made of titanium nitride, on an insulating film having a plurality of through-holes; (b) depositing a tungsten film on the first underlying film, and etching the tungsten film back by means of a fluorine-containing plasma thereby leaving the tungsten film only in the connection holes; (c) sputter etching the surface of the first underlying film to remove the fluorine from the surface of the first underlying film; and (d) forming an aluminum film on the first underlying film. The semiconductor integrated circuit device obtained by the method is also described.

公开(公告)号：US06300237B1

公开(公告)日：2001-10-09

申请号：US09245743

申请日：1999-02-08

申请人： Masayuki Suzuki ,  Shinji Nishihara ,  Masashi Sahara ,  Shinichi Ishida ,  Hiromi Abe ,  Sonoko Tohda ,  Hiroyuki Uchiyama ,  Hideaki Tsugane ,  Yoshiaki Yoshiura

发明人： Masayuki Suzuki ,  Shinji Nishihara ,  Masashi Sahara ,  Shinichi Ishida ,  Hiromi Abe ,  Sonoko Tohda ,  Hiroyuki Uchiyama ,  Hideaki Tsugane ,  Yoshiaki Yoshiura

IPC分类号： H01L214763

CPC分类号： H01L21/76862 ,  H01L21/32051 ,  H01L21/7684 ,  H01L21/76841 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/7685 ,  H01L23/53223 ,  H01L23/53266 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05124 ,  H01L2224/05166 ,  H01L2224/05184 ,  H01L2224/05187 ,  H01L2224/05624 ,  H01L2224/13099 ,  H01L2224/45144 ,  H01L2224/48463 ,  H01L2224/48624 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/0104 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/04941 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/01007 ,  H01L2924/04953 ,  H01L2924/00

摘要： A method for making a semiconductor integrated circuit device comprises the steps of: (a) depositing a first underlying film made of titanium nitride, on an insulating film having a plurality of through-holes; (b) depositing a tungsten film on the first underlying film, and etching the tungsten film back by means of a fluorine-containing plasma thereby leaving the tungsten film only in the connection holes; (c) sputter etching the surface of the first underlying film to remove the fluorine from the surface of the first underlying film; and (d) forming an aluminium film on the first underlying film. The semiconductor integrated circuit device obtained by the method is also described.

摘要翻译： 一种制造半导体集成电路器件的方法包括以下步骤：（a）在具有多个通孔的绝缘膜上沉积由氮化钛制成的第一底层膜; （b）在第一底层膜上沉积钨膜，并通过含氟等离子体将钨膜回蚀刻，从而将钨膜留在连接孔中; （c）溅射蚀刻第一底层膜的表面以从第一底层膜的表面除去氟; 和（d）在第一底层膜上形成铝膜。 还描述了通过该方法获得的半导体集成电路器件。

公开(公告)号：US5904556A

公开(公告)日：1999-05-18

申请号：US584065

申请日：1996-01-11

申请人： Masayuki Suzuki ,  Shinji Nishihara ,  Masashi Sahara ,  Shinichi Ishida ,  Hiromi Abe ,  Sonoko Tohda ,  Hiroyuki Uchiyama ,  Hideaki Tsugane ,  Yoshiaki Yoshiura

发明人： Masayuki Suzuki ,  Shinji Nishihara ,  Masashi Sahara ,  Shinichi Ishida ,  Hiromi Abe ,  Sonoko Tohda ,  Hiroyuki Uchiyama ,  Hideaki Tsugane ,  Yoshiaki Yoshiura

IPC分类号： H01L23/52 ,  H01L21/3205 ,  H01L21/60 ,  H01L21/768 ,  H01L23/522 ,  H01L21/4763 ,  H01L21/44

CPC分类号： H01L21/76862 ,  H01L21/32051 ,  H01L21/7684 ,  H01L21/76841 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/7685 ,  H01L23/53223 ,  H01L23/53266 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/48 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05124 ,  H01L2224/05166 ,  H01L2224/05184 ,  H01L2224/05187 ,  H01L2224/05624 ,  H01L2224/13099 ,  H01L2224/45144 ,  H01L2224/48463 ,  H01L2224/48624 ,  H01L24/45 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/04941 ,  H01L2924/05042 ,  H01L2924/14

摘要： A method for making a semiconductor integrated circuit device comprises the steps of: (a) depositing a first underlying film made of titanium nitride, on an insulating film having a plurality of through-holes; (b) depositing a tungsten film on the first underlying film, and etching the tungsten film back by means of a fluorine-containing plasma thereby leaving the tungsten film only in the connection holes; (c) sputter etching the surface of the first underlying film to remove the fluorine from the surface of the first underlying film; and (d) forming an aluminium film on the first underlying film. The semiconductor integrated circuit device obtained by the method is also described.

摘要翻译： 一种制造半导体集成电路器件的方法包括以下步骤：（a）在具有多个通孔的绝缘膜上沉积由氮化钛制成的第一底层膜; （b）在第一底层膜上沉积钨膜，并通过含氟等离子体将钨膜回蚀刻，从而将钨膜留在连接孔中; （c）溅射蚀刻第一底层膜的表面以从第一底层膜的表面除去氟; 和（d）在第一底层膜上形成铝膜。 还描述了通过该方法获得的半导体集成电路器件。

公开(公告)号：US06780757B2

公开(公告)日：2004-08-24

申请号：US10430402

申请日：2003-05-07

申请人： Masayuki Suzuki ,  Shinji Nishihara ,  Masashi Sahara ,  Shinichi Ishida ,  Hiromi Abe ,  Sonoko Tohda ,  Hiroyuki Uchiyama ,  Hideaki Tsugane ,  Yoshiaki Yoshiura

发明人： Masayuki Suzuki ,  Shinji Nishihara ,  Masashi Sahara ,  Shinichi Ishida ,  Hiromi Abe ,  Sonoko Tohda ,  Hiroyuki Uchiyama ,  Hideaki Tsugane ,  Yoshiaki Yoshiura

IPC分类号： H01L214763

CPC分类号： H01L21/76862 ,  H01L21/32051 ,  H01L21/7684 ,  H01L21/76841 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/7685 ,  H01L23/53223 ,  H01L23/53266 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05124 ,  H01L2224/05166 ,  H01L2224/05184 ,  H01L2224/05187 ,  H01L2224/05624 ,  H01L2224/13099 ,  H01L2224/45144 ,  H01L2224/48463 ,  H01L2224/48624 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/0104 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/04941 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/01007 ,  H01L2924/04953 ,  H01L2924/00

摘要： A method for making a semiconductor integrated circuit device comprises the steps of: (a) depositing a first underlying film made of titanium nitride, on an insulating film having a plurality of through-holes; (b) depositing a tungsten film on the first underlying film, and etching the tungsten film back by means of a fluorine-containing plasma thereby leaving the tungsten film only in the connection holes; (c) sputter etching the surface of the first underlying film to remove the fluorine from the surface of the first underlying film; and (d) forming an aluminum film on the first underlying film. The semiconductor integrated circuit device obtained by the method is also described.

摘要翻译： 一种制造半导体集成电路器件的方法包括以下步骤：（a）在具有多个通孔的绝缘膜上沉积由氮化钛制成的第一底层膜; （b）在第一底层膜上沉积钨膜，并通过含氟等离子体将钨膜回蚀刻，从而将钨膜留在连接孔中; （c）溅射蚀刻第一底层膜的表面以从第一底层膜的表面除去氟; 和（d）在第一底层膜上形成铝膜。 还描述了通过该方法获得的半导体集成电路器件。

公开(公告)号：US06538329B2

公开(公告)日：2003-03-25

申请号：US09933163

申请日：2001-08-21

申请人： Masayuki Suzuki ,  Shinji Nishihara ,  Masashi Sahara ,  Shinichi Ishida ,  Hiromi Abe ,  Sonoko Tohda ,  Hiroyuki Uchiyama ,  Hideaki Tsugane ,  Yoshiaki Yoshiura

发明人： Masayuki Suzuki ,  Shinji Nishihara ,  Masashi Sahara ,  Shinichi Ishida ,  Hiromi Abe ,  Sonoko Tohda ,  Hiroyuki Uchiyama ,  Hideaki Tsugane ,  Yoshiaki Yoshiura

IPC分类号： H01L2348

CPC分类号： H01L21/76862 ,  H01L21/32051 ,  H01L21/7684 ,  H01L21/76841 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/7685 ,  H01L23/53223 ,  H01L23/53266 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05124 ,  H01L2224/05166 ,  H01L2224/05184 ,  H01L2224/05187 ,  H01L2224/05624 ,  H01L2224/13099 ,  H01L2224/45144 ,  H01L2224/48463 ,  H01L2224/48624 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/0104 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/04941 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/01007 ,  H01L2924/04953 ,  H01L2924/00

摘要： A method for making a semiconductor integrated circuit device comprises the steps of: (a) depositing a first underlying film made of titanium nitride, on an insulating film having a plurality of through-holes; (b) depositing a tungsten film on the first underlying film, and etching the tungsten film back by means of a fluorine-containing plasma thereby leaving the tungsten film only in the connection holes; (c) sputter etching the surface of the first underlying film to remove the fluorine from the surface of the first underlying film; and (d) forming an aluminum film on the first underlying film. The semiconductor integrated circuit device obtained by the method is also described.

公开(公告)号：US5237187A

公开(公告)日：1993-08-17

申请号：US799541

申请日：1991-11-27

申请人： Naokatsu Suwanai ,  Hiroyuki Miyazawa ,  Atushi Ogishima ,  Masaki Nagao ,  Kyoichiro Asayama ,  Hiroyuki Uchiyama ,  Yoshiyuki Kaneko ,  Takashi Yoneoka ,  Kozo Watanabe ,  Kazuya Endo ,  Hiroki Soeda

发明人： Naokatsu Suwanai ,  Hiroyuki Miyazawa ,  Atushi Ogishima ,  Masaki Nagao ,  Kyoichiro Asayama ,  Hiroyuki Uchiyama ,  Yoshiyuki Kaneko ,  Takashi Yoneoka ,  Kozo Watanabe ,  Kazuya Endo ,  Hiroki Soeda

IPC分类号： H01L21/8242 ,  H01L27/108

CPC分类号： H01L27/10844 ,  H01L27/10805 ,  H01L27/10808

摘要： In a semiconductor memory circuit device wherein each memory cell is constituted by a series circuit of a memory cell selecting MISFET and an information storing capacitor of a stacked structure, there are present in a first region, which is a memory cell array region, a first MISFET having a gate electrode and source and drain regions; first and second capacitor electrodes and a dielectric film extended over a first insulating film and over the gate electrode; a second insulating film disposed on the second capacitor electrode; a third insulating film interposed between the first insulating film and first capacitor electrode; and a first wiring positioned on the second insulating film. In a second region of the device, which is a peripheral circuit region, there are present a second MISFET having a gate electrode and source and drain regions; a first insulating film on the gate electrode; a second insulating film on a third insulating film, the third insulating film being interposed between the first and second insulating films; and a second wiring on the second insulating film. The second wiring is formed by the same level conductor layer as that forming the first wiring. Similarly, the first through third insulating films of the first region are correspondingly associated with the first through third insulating films of the second region, respectively.

摘要翻译： 在其中每个存储单元由存储单元选择MISFET的串联电路和层叠结构的信息存储电容器构成的半导体存储器电路器件中，存在作为存储单元阵列区域的第一区域，第一 MISFET具有栅极电极和源极和漏极区域; 第一和第二电容器电极以及在第一绝缘膜上并在栅电极上方延伸的电介质膜; 设置在所述第二电容器电极上的第二绝缘膜; 介于所述第一绝缘膜和所述第一电容器电极之间的第三绝缘膜; 以及位于第二绝缘膜上的第一布线。 在作为外围电路区域的器件的第二区域中，存在具有栅极电极和源极和漏极区域的第二MISFET， 栅电极上的第一绝缘膜; 在第三绝缘膜上的第二绝缘膜，所述第三绝缘膜介于所述第一和第二绝缘膜之间; 以及在第二绝缘膜上的第二布线。 第二布线由与形成第一布线的层相同的导体层形成。 类似地，第一区域的第一至第三绝缘膜分别与第二区域的第一至第三绝缘膜相关联。

公开(公告)号：US5631182A

公开(公告)日：1997-05-20

申请号：US327861

申请日：1994-10-18

申请人： Naokatsu Suwanai ,  Hiroyuki Miyazawa ,  Atushi Ogishima ,  Masaki Nagao ,  Kyoichiro Asayama ,  Hiroyuki Uchiyama ,  Yoshiyuki Kaneko ,  Takashi Yoneoka ,  Kozo Watanabe ,  Kazuya Endo ,  Hiroki Soeda

发明人： Naokatsu Suwanai ,  Hiroyuki Miyazawa ,  Atushi Ogishima ,  Masaki Nagao ,  Kyoichiro Asayama ,  Hiroyuki Uchiyama ,  Yoshiyuki Kaneko ,  Takashi Yoneoka ,  Kozo Watanabe ,  Kazuya Endo ,  Hiroki Soeda

IPC分类号： H01L21/8242 ,  H01L27/108

CPC分类号： H01L27/10844 ,  H01L27/10805 ,  H01L27/10808

摘要： In a semiconductor memory circuit device wherein each memory cell is constituted by a series circuit of a memory cell selecting MISFET and an information storing capacitor of a stacked structure, there are present in a first region as a memory cell array region a first MISFET having a gate electrode and source and drain regions; first and second capacity electrodes and a dielectric film extending onto a first insulating film on the gate electrode; a second insulating film positioned on the second capacity electrode; and a first wiring positioned on the second insulating film, while in a second region as a peripheral circuit region there are present a second MISFET having a gate electrode and source and drain regions; a first insulating film on the gate electrode; a third insulating film on the first insulating film; a second insulating film on the third insulating film; and a second wiring on the second insulating film.

摘要翻译： 在其中每个存储单元由存储单元选择MISFET的串联电路和层叠结构的信息存储电容器构成的半导体存储器电路器件中，在第一区域中存在作为存储单元阵列区域的第一MISFET，其具有 栅极电极和源极和漏极区域; 第一和第二电容电极和延伸到栅电极上的第一绝缘膜上的电介质膜; 位于所述第二容量电极上的第二绝缘膜; 以及位于所述第二绝缘膜上的第一布线，而在作为外围电路区域的第二区域中存在具有栅极电极和源极和漏极区域的第二MISFET; 栅电极上的第一绝缘膜; 第一绝缘膜上的第三绝缘膜; 第三绝缘膜上的第二绝缘膜; 以及在第二绝缘膜上的第二布线。