公开(公告)号：US07781830B2

公开(公告)日：2010-08-24

申请号：US12174110

申请日：2008-07-16

申请人： Hsiao Che Wu ,  Ming Yen Li ,  Wen Li Tsai ,  Bin Siang Tsai

发明人： Hsiao Che Wu ,  Ming Yen Li ,  Wen Li Tsai ,  Bin Siang Tsai

IPC分类号： H01L29/78

CPC分类号： H01L29/7834 ,  H01L21/28061 ,  H01L29/1037 ,  H01L29/6659 ,  H01L29/66621

摘要： A recessed channel transistor comprises a semiconductor substrate having a trench isolation structure, a gate structure having a lower block in the semiconductor substrate and an upper block on the semiconductor substrate, two doped regions positioned at two sides of the upper block and above the lower block, and an insulation spacer positioned at a sidewall of the upper block and having a bottom end sandwiched between the upper block and the doped regions. In particular, the two doped regions serves as the source and drain regions, respectively, and the lower block of the gate structure serves as the recessed gate of the recessed channel transistor.

摘要翻译： 凹陷沟道晶体管包括具有沟槽隔离结构的半导体衬底，在半导体衬底中具有下部块的栅极结构和位于半导体衬底上的上部块，位于上部块的两侧和下部块上方的两个掺杂区域 以及位于上块的侧壁处并且具有夹在上块和掺杂区之间的底端的绝缘垫片。 特别地，两个掺杂区域分别用作源极和漏极区，并且栅极结构的下部块用作凹陷沟道晶体管的凹入栅极。

公开(公告)号：US20090317982A1

公开(公告)日：2009-12-24

申请号：US12142414

申请日：2008-06-19

申请人： Ming Yen Li ,  Hsiao Che Wu ,  De Long Chen ,  Wen Li Tsai

发明人： Ming Yen Li ,  Hsiao Che Wu ,  De Long Chen ,  Wen Li Tsai

IPC分类号： H01L21/31 ,  C23C16/00

CPC分类号： H01L21/0228 ,  C23C16/403 ,  C23C16/405 ,  C23C16/45544 ,  H01L21/02142 ,  H01L21/02164 ,  H01L21/022 ,  H01L21/02205 ,  H01L21/3141 ,  H01L21/31604

摘要： An atomic layer deposition apparatus comprises a reaction chamber, a heater configured to heat a semiconductor wafer positioned on the heater, an oxidant supply configured to deliver oxidant-containing precursors having different oxidant concentrations to the reaction chamber, and a metal supply configured to deliver a metal-containing precursor to the reaction chamber. The present application also discloses a method for preparing a dielectric structure comprising the steps of placing a substrate in a reaction chamber, performing a first atomic layer deposition process including feeding an oxidant-containing precursor having a relatively lower oxidant concentration and a metal-containing precursor to form an thinner interfacial layer on the substrate, and performing a second atomic layer deposition process including feeding the oxidant-containing precursor having an oxidant concentration higher than that used to grow the first metal oxide layer and the metal-containing precursor into the reaction chamber.

摘要翻译： 原子层沉积装置包括反应室，被配置为加热位于加热器上的半导体晶片的加热器，被配置为将具有不同氧化剂浓度的含氧化剂的前体输送到反应室的氧化剂供应源，以及被配置为输送 含金属的前体到反应室。 本申请还公开了一种制备电介质结构的方法，包括以下步骤：将基底放置在反应室中，执行第一原子层沉积工艺，包括进料含氧化剂浓度较低的含氧化剂的前体和含金属的前体 在衬底上形成较薄的界面层，并且执行第二原子层沉积工艺，包括将氧化剂浓度高于用于将第一金属氧化物层和含金属的前体生长的氧化剂浓度进料到反应室中 。

公开(公告)号：US07932565B2

公开(公告)日：2011-04-26

申请号：US12193502

申请日：2008-08-18

申请人： Hsiao Che Wu ,  Wen Li Tsai

发明人： Hsiao Che Wu ,  Wen Li Tsai

IPC分类号： H01L21/70

CPC分类号： H01L21/76232 ,  H01L21/7624 ,  H01L21/76264 ,  H01L2924/0002 ,  H01L2924/00

摘要： An integrated circuit structure comprises a semiconductor substrate, a device region positioned in the semiconductor substrate, an insulating region adjacent to the device region, an isolation structure positioned in the insulating region and including a bottle portion and a neck portion filled with a dielectric material, and a dielectric layer sandwiched between the device region and the insulation region.

摘要翻译： 集成电路结构包括半导体衬底，位于半导体衬底中的器件区域，与器件区域相邻的绝缘区域，位于绝缘区域中的隔离结构，其包括瓶部分和填充有电介质材料的颈部， 以及夹在器件区域和绝缘区域之间的电介质层。

公开(公告)号：US20080132053A1

公开(公告)日：2008-06-05

申请号：US11566166

申请日：2006-12-01

申请人： Hsiao Che Wu ,  Yu Min Tsai ,  Wen Li Tsai

发明人： Hsiao Che Wu ,  Yu Min Tsai ,  Wen Li Tsai

IPC分类号： H01L21/44

CPC分类号： H01L24/11 ,  H01L21/561 ,  H01L23/3128 ,  H01L23/522 ,  H01L24/13 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/0517 ,  H01L2224/05176 ,  H01L2224/05178 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05186 ,  H01L2224/05548 ,  H01L2224/05569 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05669 ,  H01L2224/0567 ,  H01L2224/05676 ,  H01L2224/05678 ,  H01L2224/05681 ,  H01L2224/05684 ,  H01L2224/05686 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2924/0001 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/0104 ,  H01L2924/01044 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/14 ,  H01L2924/0476 ,  H01L2924/0479 ,  H01L2924/0475 ,  H01L2924/0474 ,  H01L2924/0483 ,  H01L2924/0496 ,  H01L2924/01014 ,  H01L2924/013 ,  H01L2924/00014 ,  H01L2924/048

摘要： An integrated circuit device comprises a substrate, a stack structure including circuit structure having conductive lines positioned on the substrate, a reinforcement structure including at least one supporting member positioned on the substrate and a roof covering the circuit structure and the supporting member and at least one bonding pad positioned on the roof and electrically connected to the conductive lines. A method for preparing an integrated circuit device comprises forming a stack structure including circuit structure having conductive lines on a substrate, forming a reinforcement structure including at least one supporting member on the substrate and a roof covering the supporting member and the circuit structure and forming at least one bonding pad on the roof and electrically connecting to the conductive lines.

摘要翻译： 集成电路装置包括基板，包括具有位于基板上的导线的电路结构的堆叠结构，包括位于基板上的至少一个支撑构件和覆盖电路结构和支撑构件的顶板的加强结构以及至少一个 接合垫定位在屋顶上并电连接到导电线。 一种集成电路器件的制造方法，其特征在于，在基板上形成具有导线的电路结构的堆叠结构，形成包括所述基板上的至少一个支撑部件的加强结构以及覆盖所述支撑部件和所述电路结构的屋顶， 至少一个焊盘在屋顶上并且电连接到导电线。

公开(公告)号：US20080128892A1

公开(公告)日：2008-06-05

申请号：US11566160

申请日：2006-12-01

申请人： Hsiao Che Wu ,  Yu Min Tsai ,  Wen Li Tsai

发明人： Hsiao Che Wu ,  Yu Min Tsai ,  Wen Li Tsai

IPC分类号： H01L23/48

CPC分类号： H01L24/11 ,  H01L23/522 ,  H01L23/5329 ,  H01L23/53295 ,  H01L23/562 ,  H01L23/585 ,  H01L24/03 ,  H01L24/10 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/0104 ,  H01L2924/01044 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/00

摘要： An integrated circuit device comprises a substrate, a stack structure including circuit structure having conductive lines positioned on the substrate, a reinforcement structure including at least one supporting member positioned on the substrate and a roof covering the circuit structure and the supporting member and at least one bonding pad positioned on the roof and electrically connected to the conductive lines. A method for preparing an integrated circuit device comprises forming a stack structure including circuit structure having conductive lines on a substrate, forming a reinforcement structure including at least one supporting member on the substrate and a roof covering the supporting member and the circuit structure and forming at least one bonding pad on the roof and electrically connecting to the conductive lines.

摘要翻译： 集成电路装置包括基板，包括具有位于基板上的导线的电路结构的堆叠结构，包括位于基板上的至少一个支撑构件和覆盖电路结构和支撑构件的顶板的加强结构以及至少一个 接合垫定位在屋顶上并电连接到导电线。 一种集成电路器件的制造方法，其特征在于，在基板上形成具有导线的电路结构的堆叠结构，形成包括所述基板上的至少一个支撑部件的加强结构以及覆盖所述支撑部件和所述电路结构的屋顶， 至少一个焊盘在屋顶上并且电连接到导电线。