Mask carrier treatment to prevent haze and ESD damage
    3.
    发明申请
    Mask carrier treatment to prevent haze and ESD damage 审中-公开
    面罩载体处理,以防止雾霾和ESD损伤

    公开(公告)号:US20080060974A1

    公开(公告)日:2008-03-13

    申请号:US11358306

    申请日:2006-02-21

    IPC分类号: B65D85/00

    CPC分类号: G03F7/70741 G03F1/66

    摘要: A reticle carrier including a base portion and a cover portion at least partially detachable from the base portion. The base portion and the cover portion are configured to collectively house a reticle in a region collectively defined by the base portion and the cover portion when the base portion and the cover portion are fully attached. At least a portion of an interior surface of at least one of the base portion and the cover portion is treated with a sulfide-absorbing composition, such as silver or a silver-containing alloy.

    摘要翻译: 一种标线载体,其包括基部和至少部分地可从基部分离的盖部。 底座部分和盖部分构造成当底座部分和盖部分完全安装时,共同地将掩模版容纳在由基部和盖部共同限定的区域中。 基体部分和盖部分中的至少一个的内表面的至少一部分用硫化物吸收组合物如银或含银合金进行处理。

    PHOTOMASK STORAGE APPARATUS
    6.
    发明申请
    PHOTOMASK STORAGE APPARATUS 有权
    照片存储设备

    公开(公告)号:US20090239010A1

    公开(公告)日:2009-09-24

    申请号:US12053859

    申请日:2008-03-24

    IPC分类号: B32B1/02

    摘要: A photomask storage apparatus including a bottom plate and top lid is provided. The photomask storage apparatus includes poly-ether ketone (PEEK). A fastening element is configured to couple the lid to the bottom plate. A retaining element is secured to the lid to prevent vibrations of a photomask. A vent structure is also provided. The vent structure is configured such that airflow through the vent is purged in approximately 360 degrees into a chamber including the photomask. The vent structure may include a particulate filter. A seal liner is disposed on the bottom component.

    摘要翻译: 提供一种包括底板和顶盖的光掩模存储装置。 光掩模存储装置包括聚醚酮(PEEK)。 紧固元件构造成将盖连接到底板。 保持元件固定到盖子上以防止光掩模的振动。 还提供排气结构。 排气结构被配置成使得通过排气口的气流以大约360度吹扫到包括光掩模的室中。 排气结构可以包括颗粒过滤器。 密封衬套设置在底部部件上。

    Smart overlay control
    7.
    发明授权
    Smart overlay control 失效
    智能覆盖控制

    公开(公告)号:US07031794B2

    公开(公告)日:2006-04-18

    申请号:US10672394

    申请日:2003-09-26

    IPC分类号: G06F19/00

    CPC分类号: G03F7/70633 G03F7/70525

    摘要: An automatic method to maintain and correct overlay in the fabrication of integrated circuits is described. An overlay control table is automatically generated for lots run through a process tool. An overlay correction is calculated from the overlay control table and sent to the process tool for real-time or manual overlay correction.

    摘要翻译: 描述了在集成电路的制造中维护和校正覆盖的自动方法。 自动生成覆盖控制表,用于批处理工具。 从覆盖控制表计算覆盖校正,并发送到过程工具进行实时或手动叠加校正。

    Smart overlay control
    9.
    发明申请
    Smart overlay control 失效
    智能覆盖控制

    公开(公告)号:US20050071033A1

    公开(公告)日:2005-03-31

    申请号:US10672394

    申请日:2003-09-26

    IPC分类号: G06F19/00

    CPC分类号: G03F7/70633 G03F7/70525

    摘要: An automatic method to maintain and correct overlay in the fabrication of integrated circuits is described. An overlay control table is automatically generated for lots run through a process tool. An overlay correction is calculated from the overlay control table and sent to the process tool for real-time or manual overlay correction.

    摘要翻译: 描述了在集成电路的制造中维护和校正覆盖的自动方法。 自动生成覆盖控制表,用于批处理工具。 从覆盖控制表计算覆盖校正,并发送到过程工具进行实时或手动叠加校正。

    Photoresist removal from alignment marks through wafer edge exposure
    10.
    发明授权
    Photoresist removal from alignment marks through wafer edge exposure 失效
    通过晶片边缘曝光从对准标记去除光致抗蚀剂

    公开(公告)号:US06743735B2

    公开(公告)日:2004-06-01

    申请号:US10102288

    申请日:2002-03-19

    IPC分类号: H01L21302

    摘要: Removing photoresist from alignment marks on a semiconductor wafer using a wafer edge exposure process is disclosed. The alignment marks on the wafer are covered by photoresist used in conjunction with semiconductor processing of one or more layers deposited on the semiconductor wafer. One or more parts of the edge of the wafer are exposed to remove the photoresist from these parts and thus reveal alignment marks on the wafer. The exposure of the one or more parts of the wafer is accomplished without performing a photolithographic clear out process. Rather, a wafer edge exposure (WEE) process is inventively utilized. Once the WEE process is performed, subsequent layers may be deposited by aligning them using the revealed alignment marks.

    摘要翻译: 公开了使用晶片边缘曝光工艺从半导体晶片上的对准标记去除光致抗蚀剂。 晶片上的对准标记由与沉积在半导体晶片上的一个或多个层的半导体处理结合使用的光致抗蚀剂覆盖。 暴露晶片边缘的一个或多个部分以从这些部分去除光致抗蚀剂,从而在晶片上露出对准标记。 晶片的一个或多个部分的曝光是在不执行光刻清除工艺的情况下实现的。 相反,本发明利用晶片边缘曝光(WEE)工艺。 一旦执行了WEE过程,可以使用所显示的对准标记对准它们来沉积后续层。