公开(公告)号：US09984915B2

公开(公告)日：2018-05-29

申请号：US14291107

申请日：2014-05-30

Applicant: Infineon Technologies AG

Inventor： Matthias Kuenle ,  Gerhard Schmidt ,  Martin Sporn ,  Markus Kahn ,  Juergen Steinbrenner ,  Ravi Joshi

IPC: H01L21/762 ,  H01L29/06 ,  C23C14/06 ,  C23C14/34 ,  H01L29/40 ,  C23C14/58 ,  C23C14/35 ,  H01L29/16 ,  H01L21/02 ,  H01L29/73

CPC classification number: H01L21/762 ,  C23C14/0605 ,  C23C14/345 ,  C23C14/35 ,  C23C14/5806 ,  H01L21/02527 ,  H01L21/02631 ,  H01L29/0649 ,  H01L29/0657 ,  H01L29/16 ,  H01L29/408 ,  H01L29/73

Abstract: According to various embodiments, a semiconductor wafer may include: a semiconductor body including an integrated circuit structure; and at least one tetrahedral amorphous carbon layer formed at least one of over or in the integrated circuit structure, the at least one tetrahedral amorphous carbon layer may include a substance amount fraction of sp3-hybridized carbon of larger than approximately 0.4 and a substance amount fraction of hydrogen smaller than approximately 0.1.

公开(公告)号：US10325803B2

公开(公告)日：2019-06-18

申请号：US15969868

申请日：2018-05-03

Applicant: Infineon Technologies AG

Inventor： Matthias Kuenle ,  Gerhard Schmidt ,  Martin Sporn ,  Markus Kahn ,  Juergen Steinbrenner ,  Ravi Joshi

IPC: C23C14/06 ,  H01L21/02 ,  H01L21/762 ,  H01L29/16 ,  H01L29/06 ,  H01L29/40 ,  C23C14/58 ,  C23C14/34 ,  C23C14/35 ,  H01L29/73

Abstract: According to various embodiments, a semiconductor wafer may include: a semiconductor body including an integrated circuit structure; and at least one tetrahedral amorphous carbon layer formed at least one of over or in the integrated circuit structure, the at least one tetrahedral amorphous carbon layer may include a substance amount fraction of sp3-hybridized carbon of larger than approximately 0.4 and a substance amount fraction of hydrogen smaller than approximately 0.1.

公开(公告)号：US20150348824A1

公开(公告)日：2015-12-03

申请号：US14291107

申请日：2014-05-30

Applicant: Infineon Technologies AG

Inventor： Matthias Kuenle ,  Gerhard Schmidt ,  Martin Sporn ,  Markus Kahn ,  Juergen Steinbrenner ,  Ravi Joshi

IPC: H01L21/762 ,  H01L29/40 ,  C23C14/06 ,  C23C14/35 ,  C23C14/58 ,  H01L29/06 ,  C23C14/34

CPC classification number: H01L21/762 ,  C23C14/0605 ,  C23C14/345 ,  C23C14/35 ,  C23C14/5806 ,  H01L21/02527 ,  H01L21/02631 ,  H01L29/0649 ,  H01L29/0657 ,  H01L29/16 ,  H01L29/408 ,  H01L29/73

Abstract: According to various embodiments, a semiconductor wafer may include: a semiconductor body including an integrated circuit structure; and at least one tetrahedral amorphous carbon layer formed at least one of over or in the integrated circuit structure, the at least one tetrahedral amorphous carbon layer may include a substance amount fraction of sp3-hybridized carbon of larger than approximately 0.4 and a substance amount fraction of hydrogen smaller than approximately 0.1.

Abstract translation: 根据各种实施例，半导体晶片可以包括：包括集成电路结构的半导体本体; 以及至少一个四面体无定形碳层，形成在所述集成电路结构中的至少一个或所述集成电路结构中的至少一个，所述至少一个四面体非晶碳层可以包括大于约0.4的sp3-杂化碳的物质量分数和大于约0.4的物质量分数 的氢小于约0.1。

公开(公告)号：US09824972B2

公开(公告)日：2017-11-21

申请号：US15383731

申请日：2016-12-19

Applicant: Infineon Technologies AG

Inventor： Mark James Harrison ,  Martin Sporn

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/532 ,  H01L23/522 ,  H01L21/768 ,  H01L21/3065 ,  H01L21/285

CPC classification number: H01L23/53266 ,  H01L21/28518 ,  H01L21/2855 ,  H01L21/3065 ,  H01L21/6836 ,  H01L21/76841 ,  H01L23/4827 ,  H01L23/5226 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2924/0002 ,  H01L2924/00 ,  H01L2924/0001

Abstract: A method for a method of forming a semiconductor device includes providing a semiconductor substrate having a bottom surface opposite a top surface with circuitry disposed at the top surface. The method further includes forming a first metal layer having a first metal over the bottom surface of the semiconductor substrate. The first metal layer is formed by depositing an adhesion promoter followed by depositing the first metal.

公开(公告)号：US09006899B2

公开(公告)日：2015-04-14

申请号：US13716017

申请日：2012-12-14

Applicant: Infineon Technologies AG

Inventor： Paul Ganitzer ,  Kurt Matoy ,  Martin Sporn ,  Mark Harrison

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/498 ,  H01L21/02

CPC classification number: H01L23/49866 ,  H01L21/02697 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/29 ,  H01L2224/0347 ,  H01L2224/03848 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/05083 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05172 ,  H01L2224/05639 ,  H01L2224/13111 ,  H01L2224/29111 ,  H01L2924/0002 ,  H01L2924/10253 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/01023

Abstract: In one embodiment method, a first Ti based layer is deposited on the substrate. An intermediate Al based layer is deposited on the first layer, a second NiV based layer is deposited on the intermediate layer, and a third Ag based layer is deposited on the second layer. The layer stack is tempered in such a way that at least one inter-metallic phase is formed between at least two metals of the group containing Ti, Al, Ni and V.

Abstract translation: 在一个实施方案中，在衬底上沉积第一Ti基层。 中间Al基层沉积在第一层上，第二NiV基层沉积在中间层上，第三Ag基层沉积在第二层上。 层叠体以这样一种方式进行回火，使得在至少两种含Ti，Al，Ni和V的金属之间形成至少一个金属间相。

公开(公告)号：US09553016B2

公开(公告)日：2017-01-24

申请号：US14324890

申请日：2014-07-07

Applicant: Infineon Technologies AG

Inventor： Mark James Harrison ,  Martin Sporn

IPC: H01L21/44 ,  H01L21/768 ,  H01L21/285 ,  H01L23/482 ,  H01L21/683 ,  H01L23/532

CPC classification number: H01L23/53266 ,  H01L21/28518 ,  H01L21/2855 ,  H01L21/3065 ,  H01L21/6836 ,  H01L21/76841 ,  H01L23/4827 ,  H01L23/5226 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2924/0002 ,  H01L2924/00 ,  H01L2924/0001

Abstract: A method for a method of forming a semiconductor device includes providing a semiconductor substrate having a bottom surface opposite a top surface with circuitry disposed at the top surface. The method further includes forming a first metal layer having a first metal over the bottom surface of the semiconductor substrate. The first metal layer is formed by depositing an adhesion promoter followed by depositing the first metal.

Abstract translation: 一种形成半导体器件的方法的方法包括提供具有与顶表面相对的底表面的半导体衬底以及设置在顶表面处的电路。 该方法还包括在半导体衬底的底表面上形成具有第一金属的第一金属层。 第一金属层通过沉积粘合促进剂然后沉积第一金属而形成。

公开(公告)号：US09496193B1

公开(公告)日：2016-11-15

申请号：US14858633

申请日：2015-09-18

Applicant: Infineon Technologies AG

Inventor： Michael Roesner ,  Gudrun Stranzl ,  Martin Zgaga ,  Martin Sporn ,  Tobias Schmidt

IPC: H01L23/04 ,  H01L21/48 ,  H01L21/78 ,  H01L21/56 ,  H01L23/31 ,  H01L23/12 ,  H01L23/00

CPC classification number: H01L24/32 ,  H01L21/4803 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/12 ,  H01L23/3185 ,  H01L23/4827 ,  H01L24/05 ,  H01L24/26 ,  H01L24/29 ,  H01L24/83 ,  H01L24/94 ,  H01L29/0657 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2224/04026 ,  H01L2224/05144 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05558 ,  H01L2224/0556 ,  H01L2224/05644 ,  H01L2224/05687 ,  H01L2224/26145 ,  H01L2224/26175 ,  H01L2224/291 ,  H01L2224/32105 ,  H01L2224/32106 ,  H01L2224/32245 ,  H01L2224/83192 ,  H01L2224/83447 ,  H01L2224/94 ,  H01L2924/10156 ,  H01L2224/03 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/01023 ,  H01L2924/0105 ,  H01L2924/053 ,  H01L2924/049

Abstract: A semiconductor chip includes a body having a frontside, a backside opposite the frontside, and sidewalls extending between the backside and frontside, at least a portion of each sidewall having a defined surface structure with hydrophobic characteristics to inhibit travel of a bonding material along the sidewalls during attachment of the semiconductor chip to a carrier with the bonding material.

Abstract translation: 半导体芯片包括具有前侧的主体，与前侧相对的后侧，以及在后侧和前侧之间延伸的侧壁，每个侧壁的至少一部分具有限定的具有疏水特性的表面结构，以阻止接合材料沿着侧壁移动 在使用所述接合材料将半导体芯片附接到载体的过程中。

公开(公告)号：US20160005647A1

公开(公告)日：2016-01-07

申请号：US14324890

申请日：2014-07-07

Applicant: Infineon Technologies AG

Inventor： Mark James Harrison ,  Martin Sporn

IPC: H01L21/768 ,  H01L23/532 ,  H01L21/285

CPC classification number: H01L23/53266 ,  H01L21/28518 ,  H01L21/2855 ,  H01L21/3065 ,  H01L21/6836 ,  H01L21/76841 ,  H01L23/4827 ,  H01L23/5226 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2924/0002 ,  H01L2924/00 ,  H01L2924/0001

Abstract: A method for a method of forming a semiconductor device includes providing a semiconductor substrate having a bottom surface opposite a top surface with circuitry disposed at the top surface. The method further includes forming a first metal layer having a first metal over the bottom surface of the semiconductor substrate. The first metal layer is formed by depositing an adhesion promoter followed by depositing the first metal.

Abstract translation: 一种形成半导体器件的方法的方法包括提供具有与顶表面相对的底表面的半导体衬底以及设置在顶表面处的电路。 该方法还包括在半导体衬底的底表面上形成具有第一金属的第一金属层。 第一金属层通过沉积粘合促进剂然后沉积第一金属而形成。

公开(公告)号：US20140167270A1

公开(公告)日：2014-06-19

申请号：US13716017

申请日：2012-12-14

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Paul Ganitzer ,  Kurt Matoy ,  Martin Sporn ,  Mark Harrison

IPC: H01L23/498 ,  H01L21/02

CPC classification number: H01L23/49866 ,  H01L21/02697 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/29 ,  H01L2224/0347 ,  H01L2224/03848 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/05083 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05172 ,  H01L2224/05639 ,  H01L2224/13111 ,  H01L2224/29111 ,  H01L2924/0002 ,  H01L2924/10253 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/01023

Abstract: In one embodiment method, a first Ti based layer is deposited on the substrate. An intermediate Al based layer is deposited on the first layer, a second NiV based layer is deposited on the intermediate layer, and a third Ag based layer is deposited on the second layer. The layer stack is tempered in such a way that at least one inter-metallic phase is formed between at least two metals of the group containing Ti, Al, Ni and V.

Abstract translation: 在一个实施方案中，在衬底上沉积第一Ti基层。 中间Al基层沉积在第一层上，第二NiV基层沉积在中间层上，第三Ag基层沉积在第二层上。 层叠体以这样一种方式进行回火，使得在至少两种含Ti，Al，Ni和V的金属之间形成至少一个金属间相。