中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

16 records (took 0.016 seconds)

    Providing a peripheral component interconnect (PCI)-compatible transaction level protocol for a system on a chip (SoC)
    2.
    发明授权
    Providing a peripheral component interconnect (PCI)-compatible transaction level protocol for a system on a chip (SoC) 有权
    为芯片上的系统（SoC）提供外围组件互连（PCI）兼容的事务级别协议，

    公开(公告)号：US09547618B2

    公开(公告)日：2017-01-17

    申请号：US14262158

    申请日：2014-04-25

    Applicant: INTEL CORPORATION

    Inventor： Ken Shoemaker ,  Mahesh Wagh ,  Woojong Han ,  Madhu Athreya ,  Arvind Mandhani ,  Shreekant S. Thakkar

    IPC: G06F13/20 ,  G06F13/42 ,  G06F13/36 ,  G06F13/40 ,  G06F13/38

    CPC classification number: G06F13/404 ,  G06F13/385 ,  G06F13/4022 ,  G06F13/4027 ,  G06F13/4045

    Abstract: In one embodiment, the present invention includes an apparatus having an adapter to communicate according to a personal computer (PC) protocol and a second protocol. A first interface coupled to the adapter is to perform address translation and ordering of transactions received from upstream of the adapter. The first interface is coupled in turn via one or more physical units to heterogeneous resources, each of which includes an intellectual property (IP) core and a shim, where the shim is to implement a header of the PC protocol for the IP core to enable its incorporation into the apparatus without modification. Other embodiments are described and claimed.

    Abstract translation: 在一个实施例中，本发明包括具有根据个人计算机（PC）协议和第二协议进行通信的适配器的装置。 耦合到适配器的第一接口是对从适配器的上游接收的事务执行地址转换和排序。 第一接口依次通过一个或多个物理单元耦合到异构资源，每个资源包括知识产权（IP）核心和垫片，其中垫片将实现用于IP核的PC协议的报头以使能 无需修改即可并入设备。 描述和要求保护其他实施例。

    Method and apparatus for multi-mode mobile computing devices and peripherals
    3.
    发明申请
    Method and apparatus for multi-mode mobile computing devices and peripherals 审中-公开
    多模式移动计算设备和外设的方法和装置

    公开(公告)号：US20160139936A1

    公开(公告)日：2016-05-19

    申请号：US14998156

    申请日：2015-12-24

    Applicant: INTEL CORPORATION

    Inventor： Uttam K. Sengupta ,  Shreekant S. Thakkar ,  Bruce L. Fleming ,  Uma M. Gadamsetty ,  Arvind Mandhani ,  Shane D. Wall

    IPC: G06F9/44 ,  H04B1/3877 ,  G06F13/40 ,  H04B1/3883

    CPC classification number: G06F9/4408 ,  G06F9/441 ,  G06F13/4081 ,  H04B1/3877 ,  H04B1/3883 ,  Y02D10/14 ,  Y02D10/151

    Abstract: Embodiments of a method and apparatus are described for operating a mobile computing device in different modes using different operating systems. An apparatus may comprise, for example, a memory operative to store multiple operating systems, a processor operative to execute the multiple operating systems, an operating system management module operative to select a first operating system when the mobile computing device is in a first mode or a second operating system when the mobile computing device is in a second mode and the mobile computing device is coupled to one or more external devices. Other embodiments are described and claimed.

    Abstract translation: 描述了用于使用不同操作系统以不同模式操作移动计算设备的方法和装置的实施例。 设备可以包括例如可操作地存储多个操作系统的存储器，可操作以执行多个操作系统的处理器，当移动计算设备处于第一模式时操作以选择第一操作系统的操作系统管理模块，或者 当移动计算设备处于第二模式并且移动计算设备耦合到一个或多个外部设备时，第二操作系统。 描述和要求保护其他实施例。

    Emulation of an input/output advanced programmable interrupt controller
    4.
    发明授权
    Emulation of an input/output advanced programmable interrupt controller 有权
    模拟输入/输出高级可编程中断控制器

    公开(公告)号：US08966149B2

    公开(公告)日：2015-02-24

    申请号：US13738483

    申请日：2013-01-10

    Applicant: Intel Corporation

    Inventor： Bruce Fleming ,  Arvind Mandhani

    IPC: G06F13/24 ,  G06F13/10

    CPC classification number: G06F13/24 ,  G06F13/105

    Abstract: Embodiments of systems, apparatuses, and methods for emulating an input/output Advanced Programmable Interrupt Controller are disclosed. In one embodiment, an apparatus includes a first interrupt controller having a first programming model, and emulation logic to emulate a second interrupt controller having a second programming model that is different from the first programming model. The emulation logic is also to mask one of a plurality of interrupt requests to the first interrupt controller for each of the plurality of interrupt requests handled by the emulation logic.

    Abstract translation: 公开了用于仿真输入/输出高级可编程中断控制器的系统，装置和方法的实施例。 在一个实施例中，装置包括具有第一编程模型的第一中断控制器和用于模拟具有不同于第一编程模型的第二编程模型的第二中断控制器的仿真逻辑。 所述仿真逻辑还将由所述仿真逻辑处理的所述多个中断请求中的每一个屏蔽所述第一中断控制器的多个中断请求之一。

    Integrating non-peripheral component interconnect (PCI) resources into a computer system
    5.
    发明授权
    Integrating non-peripheral component interconnect (PCI) resources into a computer system 有权
    将非外围组件互连（PCI）资源集成到计算机系统中

    公开(公告)号：US08745303B2

    公开(公告)日：2014-06-03

    申请号：US13891501

    申请日：2013-05-10

    Applicant: Intel Corporation

    Inventor： Arvind Mandhani ,  Woojong Han ,  Ken Shoemaker ,  Madhu Athreya ,  Mahesh Wagh ,  Shreekant S. Thakkar

    IPC: G06F13/42 ,  G06F13/20 ,  G06F13/40 ,  G06F13/36

    CPC classification number: G06F13/4022 ,  G06F13/4027 ,  G06F13/404 ,  G06F13/4045 ,  G06F13/42

    Abstract: In one embodiment, the present invention includes an apparatus having an adapter to communicate according to a personal computer (PC) protocol and a second protocol. A first interface coupled to the adapter is to perform address translation and ordering of transactions received from upstream of the adapter. The first interface is coupled in turn to heterogeneous resources, each of which includes an intellectual property (IP) core and a shim, where the shim is to implement a header of the PC protocol for the IP core to enable its incorporation into the apparatus without modification. Other embodiments are described and claimed.

    Abstract translation: 在一个实施例中，本发明包括具有根据个人计算机（PC）协议和第二协议进行通信的适配器的装置。 耦合到适配器的第一接口是对从适配器的上游接收的事务执行地址转换和排序。 第一个接口依次耦合到异构资源，每个资源包括知识产权（IP）核心和垫片，其中垫片将为IP核实现PC协议的头部，以使其能够并入设备中而无需 修改。 描述和要求保护其他实施例。

    Power management for a system on a chip (SoC)
    8.
    发明授权
    Power management for a system on a chip (SoC) 有权
    芯片系统的电源管理（SoC）

    公开(公告)号：US08850247B2

    公开(公告)日：2014-09-30

    申请号：US13925999

    申请日：2013-06-25

    Applicant: Intel Corporation

    Inventor： Woojong Han ,  Madhu Athreya ,  Ken Shoemaker ,  Arvind Mandhani ,  Mahesh Wagh ,  Ticky Thakkar

    IPC: G06F1/32

    CPC classification number: G06F1/3234 ,  G06F1/3203 ,  G06F1/3243 ,  Y02D10/152

    Abstract: In one embodiment, the present invention includes a method for sending a first link handshake signal between a first subsystem and a power management unit (PMU) of a system on a chip (SoC) to request entry into a power saving state for the first subsystem, sending a second link handshake signal between the first subsystem and the PMU to acknowledge the request, and placing the first subsystem into the power saving state without further signaling between the PMU and the first subsystem. Other embodiments are described and claimed.

    Abstract translation: 在一个实施例中，本发明包括一种用于在芯片上的系统（SoC）的第一子系统和功率管理单元（PMU）之间发送第一链路握手信号以请求进入第一子系统的省电状态的方法 在所述第一子系统和所述PMU之间发送第二链路握手信号以确认所述请求，以及将所述第一子系统置于省电状态，而不在所述PMU与所述第一子系统之间进一步发信号。 描述和要求保护其他实施例。

Patent Agency Ranking