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公开(公告)号:US20180350709A1
公开(公告)日:2018-12-06
申请号:US15778042
申请日:2015-11-24
Applicant: INTEL CORPORATION
Inventor: Pramod Malatkar , Kyle Yazzie , Naga Sivakumar Yagnamurthy , Richard J. Harries , Dilan Seneviratne , Praneeth Akkinepally , Xuefei Wan , Yonggang Li , Robert L. Sankman
IPC: H01L23/31 , H01L23/00 , H01L23/498 , H01L25/10
CPC classification number: H01L23/34 , H01L23/3128 , H01L23/48 , H01L23/49582 , H01L23/49816 , H01L23/562 , H01L25/105 , H01L2224/16225 , H01L2224/73204 , H01L2224/81203 , H01L2924/15311 , H01L2924/181 , H01L2924/351 , H01L2924/00012 , H01L2924/00014
Abstract: An electronic package that includes a substrate and an electronic component attached to the substrate. A laminated layer is attached to an upper surface of the substrate such that the laminated layer covers the electronic component. The electronic package may further include a stiffener mounted on the laminated layer where the stiffener is over the electronic component.
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公开(公告)号:US09793225B2
公开(公告)日:2017-10-17
申请号:US15204303
申请日:2016-07-07
Applicant: Intel Corporation
Inventor: Pramod Malatkar , Richard J. Harries
CPC classification number: H01L23/562 , H01L21/485 , H01L21/4857 , H01L21/565 , H01L23/3114 , H01L23/3128 , H01L23/49816 , H01L23/49822 , H01L23/49838 , H01L2224/16225 , H05K1/0271
Abstract: The present description relates to the field of fabricating microelectronic packages, wherein a microelectronic device may be attached to a microelectronic substrate with a compensator to control package warpage. The warpage compensator may be a low coefficient of thermal expansion material, including but not limited to silicon or a ceramic material, which is positioned on a land-side of the microelectronic device to counteract the thermal expansion effects of the microelectronic device.
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公开(公告)号:US10985080B2
公开(公告)日:2021-04-20
申请号:US15778042
申请日:2015-11-24
Applicant: Intel Corporation
Inventor: Pramod Malatkar , Kyle Yazzie , Naga Sivakumar Yagnamurthy , Richard J. Harries , Dilan Seneviratne , Praneeth Akkinepally , Xuefei Wan , Yonggang Li , Robert L. Sankman
IPC: H01L23/31 , H01L23/34 , H01L23/48 , H01L25/10 , H01L23/00 , H01L23/498 , H01L23/538
Abstract: An electronic package that includes a substrate and an electronic component attached to the substrate. A laminated layer is attached to an upper surface of the substrate such that the laminated layer covers the electronic component. The electronic package may further include a stiffener mounted on the laminated layer where the stiffener is over the electronic component.
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公开(公告)号:US10002814B2
公开(公告)日:2018-06-19
申请号:US14195422
申请日:2014-03-03
Applicant: Intel Corporation
Inventor: Richard J. Harries , Sudarashan V. Rangaraj , Robert L. Sankman
CPC classification number: H01L23/3128 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/81 , H01L2224/0401 , H01L2224/05567 , H01L2224/05599 , H01L2224/10126 , H01L2224/1191 , H01L2224/13022 , H01L2224/13099 , H01L2224/13111 , H01L2224/13139 , H01L2224/13147 , H01L2224/16 , H01L2224/73204 , H01L2224/81193 , H01L2224/812 , H01L2224/81801 , H01L2924/00014 , H01L2924/0002 , H01L2924/01014 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01082 , H01L2924/014 , H01L2924/19043 , H01L2224/05552
Abstract: Some embodiments of the present invention include apparatuses and methods relating to processing and packaging microelectronic devices that reduce stresses on and limit or eliminate crack propagation in the devices.
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公开(公告)号:US20160322311A1
公开(公告)日:2016-11-03
申请号:US15204303
申请日:2016-07-07
Applicant: Intel Corporation
Inventor: Pramod Malatkar , Richard J. Harries
IPC: H01L23/00 , H01L21/56 , H01L21/48 , H01L23/498 , H01L23/31
CPC classification number: H01L23/562 , H01L21/485 , H01L21/4857 , H01L21/565 , H01L23/3114 , H01L23/3128 , H01L23/49816 , H01L23/49822 , H01L23/49838 , H01L2224/16225 , H05K1/0271
Abstract: The present description relates to the field of fabricating microelectronic packages, wherein a microelectronic device may be attached to a microelectronic substrate with a compensator to control package warpage. The warpage compensator may be a low coefficient of thermal expansion material, including but not limited to silicon or a ceramic material, which is positioned on a land-side of the microelectronic device to counteract the thermal expansion effects of the microelectronic device.
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