公开(公告)号：US20150380478A1

公开(公告)日：2015-12-31

申请号：US14314223

申请日：2014-06-25

Applicant: International Business Machines Corporation

Inventor： Max G. Levy ,  Gary L. Milo ,  David C. Thomas

IPC: H01L49/02

CPC classification number: H01L28/87 ,  H01L21/31144 ,  H01L21/32139 ,  H01L21/76895

Abstract: Embodiments disclose a method of fabrication and a semiconductor structure comprising a Metal-insulator-metal (MIM) capacitor. The method of fabrication includes depositing a first conductive material on a semiconductor substrate. A first dielectric material is deposited on the first conductive material. A second conductive material is deposited on the first dielectric material. The top plate is formed by etching the second conductive material. The bottom plate is formed by etching a portion of the first conductive material. At least one opening is formed in the first dielectric layer down to the first conductive material.

Abstract translation: 实施例公开了一种制造方法和包括金属 - 绝缘体 - 金属（MIM）电容器的半导体结构。 制造方法包括在半导体衬底上沉积第一导电材料。 第一介电材料沉积在第一导电材料上。 第二导电材料沉积在第一电介质材料上。 通过蚀刻第二导电材料形成顶板。 通过蚀刻第一导电材料的一部分来形成底板。 在第一电介质层中形成至少一个开口至第一导电材料。

公开(公告)号：US20150255395A1

公开(公告)日：2015-09-10

申请号：US14718466

申请日：2015-05-21

Applicant: International Business Machines Corporation

Inventor： Max G. Levy ,  Gary L. Milo ,  Matthew D. Moon ,  Anthony C. Speranza ,  Timothy D. Sullivan ,  David C. Thomas ,  Steven S. Williams

IPC: H01L23/528 ,  H01L49/02 ,  H01L23/532

CPC classification number: H01L23/5283 ,  H01L21/76883 ,  H01L23/5223 ,  H01L23/528 ,  H01L23/53214 ,  H01L23/53223 ,  H01L28/60 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Aspects of the present invention relate to a controlled metal extrusion opening in a semiconductor structure. Various embodiments include a semiconductor structure. The structure includes an aluminum layer. The aluminum layer includes an aluminum island within the aluminum layer, and a lateral extrusion receiving opening extending through the aluminum layer adjacent the aluminum island. The opening includes a lateral extrusion of the aluminum layer of the semiconductor structure. Additional embodiments include a method of forming a semiconductor structure. The method can include forming an aluminum layer over a titanium layer. The aluminum layer includes an aluminum island within the aluminum layer. The method can also include forming an opening extending through the aluminum layer adjacent the aluminum island within the aluminum layer. The opening includes a lateral extrusion of the aluminum layer of the semiconductor layer.

Abstract translation: 本发明的方面涉及半导体结构中的受控金属挤压开口。 各种实施例包括半导体结构。 该结构包括铝层。 铝层包括在铝层内的铝岛，以及横向挤压接收开口，其延伸穿过靠近铝岛的铝层。 该开口包括半导体结构的铝层的横向挤压。 另外的实施例包括形成半导体结构的方法。 该方法可以包括在钛层上形成铝层。 铝层包括铝层内的铝岛。 该方法还可以包括在铝层内形成延伸穿过邻近铝岛的铝层的开口。 该开口包括半导体层的铝层的侧向挤压。

公开(公告)号：US20150235881A1

公开(公告)日：2015-08-20

申请号：US14183631

申请日：2014-02-19

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Shawn A. Adderly ,  Samantha D. DiStefano ,  Jeffrey P. Gambino ,  Max G. Levy ,  Max L. Lifson ,  Matthew D. Moon ,  Timothy D. Sullivan

IPC: H01L21/67 ,  H01L21/68 ,  H01L21/683

CPC classification number: H01L21/67259 ,  G01B17/00 ,  G01S15/42 ,  H01L21/68 ,  Y10T29/49764 ,  Y10T279/21

Abstract: An apparatus and method for centering substrates determining on a chuck. The apparatus includes a chuck in a process chamber, the chuck configured to removeably hold a substrate for processing; an array of two or more ultrasonic sensors arranged in the process chamber, each ultrasonic sensor arranged relative to the chuck so as to send a respective ultrasonic sound wave to a respective preselected region of the substrate and receive a respective return ultrasonic sound wave from the preselected region of the substrate; and a controller connected to each ultrasonic sensor and configured to compare a measured position of the substrate on the chuck to a specified placement of the substrate on the chuck based on a measured elapsed time between sending the ultrasonic sound wave and receiving the return ultrasonic sound wave from each ultrasonic sensor.

Abstract translation: 一种用于使确定在卡盘上的基板居中的装置和方法。 该装置包括处理室中的卡盘，卡盘构造成可移除地保持用于处理的基板; 布置在处理室中的两个或更多个超声波传感器的阵列，每个超声波传感器相对于卡盘布置，以便将相应的超声波发送到基板的各个预选区域，并从预选的接收相应的返回超声波 基底区域; 以及控制器，其连接到每个超声波传感器，并且被配置为基于在发送所述超声波和接收所述返回超声波之间的测量的经过时间来比较所述卡盘上的所述基板的测量位置与所述基板在所述卡盘上的指定布置 从每个超声波传感器。

公开(公告)号：US20150219479A1

公开(公告)日：2015-08-06

申请号：US14171874

申请日：2014-02-04

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Shawn A. Adderly ,  Samantha D. DiStefano ,  Jeffrey P. Gambino ,  Max G. Levy ,  Max L. Lifson ,  Jed H. Rankin ,  Timothy D. Sullivan

IPC: G01F1/00 ,  G01F15/06 ,  H01L21/683

CPC classification number: H01L21/67288 ,  G01F1/76 ,  H01L21/00 ,  H01L21/67109

Abstract: An apparatus and method for leak detection of coolant gas from a chuck. The apparatus includes a chuck having a top surface and configured to clamp a substrate to the top surface, the chuck having one or more recessed regions in the top surface, the recessed regions configured to allow a cooling gas to contact a backside of the substrate; a cooling gas inlet and a cooling gas outlet connected to the one or more recessed regions; a first measurement device connected to the cooling gas inlet and configured to measure a first amount of cooling gas entering the cooling gas inlet and a second measurement device connected to the cooling gas outlet and configured to measure a second amount of cooling gas exiting from the cooling gas outlet; and a controller configured to determine a difference between the first amount of cooling gas and the second amount of cooling gas.

Abstract translation: 一种用于从卡盘泄漏检测冷却剂气体的设备和方法。 该装置包括具有顶表面并被配置为将基板夹持到顶表面的卡盘，卡盘在顶表面中具有一个或多个凹陷区域，凹陷区域被配置为允许冷却气体接触基板的背面; 连接到所述一个或多个凹陷区域的冷却气体入口和冷却气体出口; 连接到冷却气体入口并被配置成测量进入冷却气体入口的第一量的冷却气体的第一测量装置和连接到冷却气体出口的第二测量装置，其被配置成测量从冷却出口排出的第二量的冷却气体 气体出口; 以及控制器，被配置为确定所述第一冷却气体量与所述第二冷却气体量之间的差。

公开(公告)号：US09548349B2

公开(公告)日：2017-01-17

申请号：US14314223

申请日：2014-06-25

Applicant: International Business Machines Corporation

Inventor： Max G. Levy ,  Gary L. Milo ,  David C. Thomas

IPC: H01L27/00 ,  H01L49/02

CPC classification number: H01L28/87 ,  H01L21/31144 ,  H01L21/32139 ,  H01L21/76895

Abstract: Embodiments disclose a method of fabrication and a semiconductor structure comprising a Metal-insulator-metal (MIM) capacitor. The method of fabrication includes depositing a first conductive material on a semiconductor substrate. A first dielectric material is deposited on the first conductive material. A second conductive material is deposited on the first dielectric material. The top plate is formed by etching the second conductive material. The bottom plate is formed by etching a portion of the first conductive material. At least one opening is formed in the first dielectric layer down to the first conductive material.

Abstract translation: 实施例公开了一种制造方法和包括金属 - 绝缘体 - 金属（MIM）电容器的半导体结构。 制造方法包括在半导体衬底上沉积第一导电材料。 第一介电材料沉积在第一导电材料上。 第二导电材料沉积在第一电介质材料上。 通过蚀刻第二导电材料形成顶板。 通过蚀刻第一导电材料的一部分来形成底板。 在第一电介质层中形成至少一个开口至第一导电材料。

公开(公告)号：US20160343798A1

公开(公告)日：2016-11-24

申请号：US15226186

申请日：2016-08-02

Applicant: International Business Machines Corporation

Inventor： Max G. Levy ,  Gary L. Milo ,  David C. Thomas

IPC: H01L49/02

CPC classification number: H01L28/87 ,  H01L21/31144 ,  H01L21/32139 ,  H01L21/76895

Abstract: Embodiments disclose a method of fabrication and a semiconductor structure comprising a Metal-insulator-metal (MIM) capacitor. The method of fabrication includes depositing a first conductive material on a semiconductor substrate. A first dielectric material is deposited on the first conductive material. A second conductive material is deposited on the first dielectric material. The top plate is formed by etching the second conductive material. The bottom plate is formed by etching a portion of the first conductive material. At least one opening is formed in the first dielectric layer down to the first conductive material.

公开(公告)号：US09337310B2

公开(公告)日：2016-05-10

申请号：US14269599

申请日：2014-05-05

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Theodore J. Letavic ,  Max G. Levy ,  Santosh Sharma ,  Yun Shi

IPC: H01L29/66 ,  H01L21/265 ,  H01L29/78

CPC classification number: H01L29/66681 ,  H01L21/26586 ,  H01L29/0692 ,  H01L29/1083 ,  H01L29/42368 ,  H01L29/66 ,  H01L29/66659 ,  H01L29/78 ,  H01L29/7816 ,  H01L29/7835

Abstract: Low leakage, high frequency devices and methods of manufacture are disclosed. The method of forming a device includes implanting a lateral diffusion drain implant in a substrate by a blanket implantation process. The method further includes forming a self-aligned tapered gate structure on the lateral diffusion drain implant. The method further includes forming a halo implant in the lateral diffusion drain implant, adjacent to the self-aligned tapered gate structure and at least partially under a source region of the self-aligned tapered gate structure.

Abstract translation: 公开了低泄漏，高频器件和制造方法。 形成器件的方法包括通过覆盖注入工艺将侧向扩散漏极注入植入衬底中。 该方法还包括在横向扩散漏极植入物上形成自对准锥形栅极结构。 该方法还包括在横向扩散漏极注入中形成与自对准的锥形栅极结构相邻并且至少部分地在自对准锥形栅极结构的源极区域下方的卤素注入。

公开(公告)号：US08564067B2

公开(公告)日：2013-10-22

申请号：US13772402

申请日：2013-02-21

Applicant: International Business Machines Corporation

Inventor： Alan B. Botula ,  John J. Ellis-Monaghan ,  Alvin J. Joseph ,  Max G. Levy ,  Richard A. Phelps ,  James A. Slinkman ,  Randy L. Wolf

IPC: H01L21/70

CPC classification number: H01L21/02488 ,  H01L21/2652 ,  H01L21/7624 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/78603

Abstract: Disclosed is semiconductor structure with an insulator layer on a semiconductor substrate and a device layer is on the insulator layer. The substrate is doped with a relatively low dose of a dopant having a given conductivity type such that it has a relatively high resistivity. Additionally, a portion of the semiconductor substrate immediately adjacent to the insulator layer can be doped with a slightly higher dose of the same dopant, a different dopant having the same conductivity type or a combination thereof. Optionally, micro-cavities are created within this same portion so as to balance out any increase in conductivity due to increased doping with a corresponding increase in resistivity. Increasing the dopant concentration at the semiconductor substrate-insulator layer interface raises the threshold voltage (Vt) of any resulting parasitic capacitors and, thereby reduces harmonic behavior. Also disclosed herein are embodiments of a method for forming such a semiconductor structure.

Abstract translation: 公开了在半导体衬底上具有绝缘体层并且器件层位于绝缘体层上的半导体结构。 衬底掺杂有相对低剂量的具有给定导电类型的掺杂剂，使得其具有相对高的电阻率。 此外，与绝缘体层紧密相邻的半导体衬底的一部分可掺杂略高的相同掺杂剂剂量，具有相同导电类型的不同掺杂剂或其组合。 可选地，在该相同部分内形成微腔，以便平衡由于掺杂增加导致的电导率的增加，同时具有相应的电阻率增加。 增加半导体衬底 - 绝缘体层界面处的掺杂剂浓度会提高任何结果的寄生电容器的阈值电压（Vt），从而降低谐波行为。 本文还公开了用于形成这种半导体结构的方法的实施例。

公开(公告)号：US10050115B2

公开(公告)日：2018-08-14

申请号：US14585933

申请日：2014-12-30

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Brennan J. Brown ,  Natalie B. Feilchenfeld ,  Max G. Levy ,  Santosh Sharma ,  Yun Shi ,  Michael J. Zierak

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/06 ,  H01L29/423

Abstract: Approaches for LDMOS devices are provided. A method of forming a semiconductor structure includes forming a gate dielectric including a first portion having a first uniform thickness, a second portion having a second uniform thickness different than the first uniform thickness, and a transition portion having tapered surface extending from the first portion to the second portion. The gate dielectric is formed on a planar upper surface of a substrate. The tapered surface is at an acute angle relative to the upper surface of the substrate.

公开(公告)号：US09825120B2

公开(公告)日：2017-11-21

申请号：US15226186

申请日：2016-08-02

Applicant: International Business Machines Corporation

Inventor： Max G. Levy ,  Gary L. Milo ,  David C. Thomas

IPC: H01L21/31 ,  H01L49/02 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/768

CPC classification number: H01L28/87 ,  H01L21/31144 ,  H01L21/32139 ,  H01L21/76895

Abstract: Embodiments disclose a method of fabrication and a semiconductor structure comprising a Metal-insulator-metal (MIM) capacitor. The method of fabrication includes depositing a first conductive material on a semiconductor substrate. A first dielectric material is deposited on the first conductive material. A second conductive material is deposited on the first dielectric material. The top plate is formed by etching the second conductive material. The bottom plate is formed by etching a portion of the first conductive material. At least one opening is formed in the first dielectric layer down to the first conductive material.