公开(公告)号：US10249714B2

公开(公告)日：2019-04-02

申请号：US15634411

申请日：2017-06-27

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION ,  RENESAS ELECTRONICS CORPORATION

发明人： Dechao Guo ,  Shogo Mochizuki ,  Andreas Scholze ,  Chun-Chen Yeh

IPC分类号： H01L29/08 ,  H01L21/8234 ,  H01L29/66 ,  H01L29/78 ,  H01L29/165 ,  H01L21/225 ,  H01L21/324 ,  H01L27/088 ,  H01L29/267

摘要： A semiconductor device including a gate structure on a channel region portion of a fin structure, and at least one of an epitaxial source region and an epitaxial drain region on a source region portion and a drain region portion of the fin structure. At least one of the epitaxial source region portion and the epitaxial drain region portion include a first concentration doped portion adjacent to the fin structure, and a second concentration doped portion on the first concentration doped portion. The second concentration portion has a greater dopant concentration than the first concentration doped portion. An extension dopant region extending into the channel portion of the fin structure having an abrupt dopant concentration gradient of n-type or p-type dopants of 7 nm per decade or greater.

公开(公告)号：US09390976B2

公开(公告)日：2016-07-12

申请号：US14610653

申请日：2015-01-30

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION ,  Renesas Electronics Corporation

发明人： Dechao Guo ,  Shogo Mochizuki ,  Andreas Scholze ,  Chun-Chen Yeh

IPC分类号： H01L21/8238 ,  H01L21/8234 ,  H01L29/66 ,  H01L29/78 ,  H01L29/08 ,  H01L29/267 ,  H01L29/165

CPC分类号： H01L29/0847 ,  H01L21/2252 ,  H01L21/324 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823437 ,  H01L27/0886 ,  H01L29/08 ,  H01L29/0843 ,  H01L29/086 ,  H01L29/0869 ,  H01L29/0878 ,  H01L29/0886 ,  H01L29/165 ,  H01L29/267 ,  H01L29/66 ,  H01L29/66545 ,  H01L29/66636 ,  H01L29/66681 ,  H01L29/66795 ,  H01L29/7816 ,  H01L29/7833 ,  H01L29/7848 ,  H01L29/7851

摘要： A method of forming a semiconductor device that includes forming a fin structure, and forming an undoped epitaxial semiconductor material on the fin structure. A first portion of undoped epitaxial semiconductor material is formed on the sidewall of at least one of a source region portion and a drain region portion of the fin structure. A second portion of the undoped epitaxial semiconductor material is formed on the recessed surface of a bulk semiconductor substrate that is present at the base of the fin structure. The method further includes forming a doped epitaxial semiconductor material on the undoped epitaxial semiconductor material. The undoped epitaxial semiconductor material and the doped epitaxial semiconductor material provide a source region and drain region.

摘要翻译： 一种形成半导体器件的方法，包括形成鳍结构，并在鳍结构上形成未掺杂的外延半导体材料。 未掺杂的外延半导体材料的第一部分形成在翅片结构的源区域部分和漏极区域部分中的至少一个的侧壁上。 未掺杂的外延半导体材料的第二部分形成在存在于鳍结构的基部的体半导体衬底的凹陷表面上。 该方法还包括在未掺杂的外延半导体材料上形成掺杂的外延半导体材料。 未掺杂的外延半导体材料和掺杂的外延半导体材料提供源极区和漏极区。

公开(公告)号：US09793272B2

公开(公告)日：2017-10-17

申请号：US15170299

申请日：2016-06-01

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION ,  RENESAS ELECTRONICS CORPORATION

发明人： Dechao Guo ,  Shogo Mochizuki ,  Andreas Scholze ,  Chun-Chen Yeh

IPC分类号： H01L27/088 ,  H01L21/8234 ,  H01L29/66 ,  H01L29/78 ,  H01L29/08 ,  H01L29/165 ,  H01L21/225 ,  H01L21/324 ,  H01L29/267

CPC分类号： H01L29/0847 ,  H01L21/2252 ,  H01L21/324 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823437 ,  H01L27/0886 ,  H01L29/08 ,  H01L29/0843 ,  H01L29/086 ,  H01L29/0869 ,  H01L29/0878 ,  H01L29/0886 ,  H01L29/165 ,  H01L29/267 ,  H01L29/66 ,  H01L29/66545 ,  H01L29/66636 ,  H01L29/66681 ,  H01L29/66795 ,  H01L29/7816 ,  H01L29/7833 ,  H01L29/7848 ,  H01L29/7851

摘要： A semiconductor device including a gate structure on a channel region portion of a fin structure, and at least one of an epitaxial source region and an epitaxial drain region on a source region portion and a drain region portion of the fin structure. At least one of the epitaxial source region portion and the epitaxial drain region portion include a first concentration doped portion adjacent to the fin structure, and a second concentration doped portion on the first concentration doped portion. The second concentration portion has a greater dopant concentration than the first concentration doped portion. An extension dopant region extending into the channel portion of the fin structure having an abrupt dopant concentration gradient of n-type or p-type dopants of 7 nm per decade or greater.

公开(公告)号：US09786661B2

公开(公告)日：2017-10-10

申请号：US15170273

申请日：2016-06-01

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION ,  RENESAS ELECTRONICS CORPORATION

发明人： Dechao Guo ,  Shogo Mochizuki ,  Andreas Scholze ,  Chun-Chen Yeh

IPC分类号： H01L27/088 ,  H01L21/8234 ,  H01L29/66 ,  H01L29/78 ,  H01L29/08 ,  H01L29/165 ,  H01L21/225 ,  H01L21/324 ,  H01L29/267

CPC分类号： H01L29/0847 ,  H01L21/2252 ,  H01L21/324 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823437 ,  H01L27/0886 ,  H01L29/08 ,  H01L29/0843 ,  H01L29/086 ,  H01L29/0869 ,  H01L29/0878 ,  H01L29/0886 ,  H01L29/165 ,  H01L29/267 ,  H01L29/66 ,  H01L29/66545 ,  H01L29/66636 ,  H01L29/66681 ,  H01L29/66795 ,  H01L29/7816 ,  H01L29/7833 ,  H01L29/7848 ,  H01L29/7851

摘要： A semiconductor device including a gate structure on a channel region portion of a fin structure, and at least one of an epitaxial source region and an epitaxial drain region on a source region portion and a drain region portion of the fin structure. At least one of the epitaxial source region portion and the epitaxial drain region portion include a first concentration doped portion adjacent to the fin structure, and a second concentration doped portion on the first concentration doped portion. The second concentration portion has a greater dopant concentration than the first concentration doped portion. An extension dopant region extending into the channel portion of the fin structure having an abrupt dopant concentration gradient of n-type or p-type dopants of 7 nm per decade or greater.

公开(公告)号：US09391065B1

公开(公告)日：2016-07-12

申请号：US14753628

申请日：2015-06-29

申请人： International Business Machines Corporation

发明人： Robert J. Gauthier, Jr. ,  Tom C. Lee ,  You Li ,  Rahul Mishra ,  Souvick Mitra ,  Andreas Scholze

IPC分类号： H01L29/66 ,  H01L27/12 ,  H01L23/495 ,  H01L27/02 ,  H01L27/06 ,  H01L29/78

CPC分类号： H01L27/0255 ,  H01L27/0266 ,  H01L27/027 ,  H01L27/0288 ,  H01L27/0629 ,  H01L29/0649 ,  H01L29/0684 ,  H01L29/42372 ,  H01L29/7827 ,  H01L29/785 ,  H01L29/7855 ,  H01L2029/7858

摘要： Field effect diode structures utilize a junction structure that has an L-shape in cross-section (a fin extending from a planar portion). An anode is positioned at the top surface of the fin, and a cathode is positioned at the end surface of the planar portion. The perpendicularity of the fin and the planar portion cause the anode and cathode to be perpendicular to one another. A first gate insulator contacts the fin between the top surface and the planar portion. A first gate conductor contacts the first gate insulator, and the first gate insulator is between the first gate conductor and the surface of the fin. Additionally, a second gate insulator contacts the planar portion between the end surface and the fin. A second gate conductor contacts the second gate insulator, and the second gate insulator is between the second gate conductor and the surface of the planar portion.

摘要翻译： 场效应二极管结构使用横截面为L形的接合结构（从平面部分延伸的翅片）。 阳极位于翅片的顶面，阴极位于平面部分的端面。 翅片和平面部分的垂直度导致阳极和阴极彼此垂直。 第一栅极绝缘体在顶表面和平面部分之间接触翅片。 第一栅极导体接触第一栅极绝缘体，并且第一栅极绝缘体位于第一栅极导体与鳍的表面之间。 另外，第二栅极绝缘体接触端面和鳍之间的平面部分。 第二栅极导体与第二栅极绝缘体接触，第二栅极绝缘体位于第二栅极导体与平面部分的表面之间。

公开(公告)号：US20160181247A1

公开(公告)日：2016-06-23

申请号：US14574504

申请日：2014-12-18

申请人： International Business Machines Corporation

发明人： Brent A. Anderson ,  Edward J. Nowak ,  Robert R. Robison ,  Andreas Scholze

IPC分类号： H01L27/092 ,  H01L29/10 ,  H01L21/321 ,  H01L29/06 ,  H01L21/3213 ,  H01L21/8238 ,  H01L29/16

CPC分类号： H01L27/0924 ,  H01L21/32115 ,  H01L21/32133 ,  H01L21/823821 ,  H01L21/823871 ,  H01L21/823892 ,  H01L27/0928 ,  H01L29/1087

摘要： Disclosed are isolation techniques for bulk FinFETs. A semiconductor device includes a semiconductor substrate with a fin structure on the semiconductor substrate. The fin structure is perpendicular to the semiconductor substrate and has an upper portion and a lower portion. Source and drain regions are adjacent to the fin structure. A gate structure surrounds the upper portion of the fin structure. A well contact point is provided in the semiconductor substrate. The lower portion of the fin structure includes a sub-fin between the region surrounded by the gate structure and the semiconductor substrate. The sub-fin directly contacts the semiconductor substrate. The upper portion of the fin structure and an upper portion of the sub-fin are undoped. A lower portion of the sub-fin may be doped. Electrical potential applied from the well contact point to the lower portion of the sub-fin reduces leakage currents from the upper portion of the fin structure.

摘要翻译： 公开了用于散装FinFET的隔离技术。 半导体器件包括在半导体衬底上具有翅片结构的半导体衬底。 翅片结构垂直于半导体衬底并具有上部和下部。 源极和漏极区域与翅片结构相邻。 栅极结构围绕鳍结构的上部。 在半导体衬底中提供良好的接触点。 翅片结构的下部包括在被栅极结构包围的区域和半导体衬底之间的子鳍。 子鳍直接接触半导体衬底。 翅片结构的上部和副翅片的上部是未掺杂的。 子鳍片的下部可以被掺杂。 从阱接触点施加到副散热片的下部的电势减小了从翅片结构的上部的泄漏电流。

公开(公告)号：US11101367B2

公开(公告)日：2021-08-24

申请号：US16670894

申请日：2019-10-31

申请人： International Business Machines Corporation

发明人： Terence B. Hook ,  Myung-Hee Na ,  Balasubramanian Pranatharthiharan ,  Andreas Scholze

IPC分类号： H01L21/225 ,  H01L29/66 ,  H01L29/417 ,  H01L29/08 ,  H01L29/423 ,  H01L29/78

摘要： A method for forming a device structure provides for forming a fin of a semiconductor material. A first contact is formed on the fin. A second contact is formed on the fin and spaced along a length of the fin from the first contact. A self-aligned gate electrode is formed on the fin that is positioned along the length of the fin between the first contact and the second contact.

公开(公告)号：US20200066871A1

公开(公告)日：2020-02-27

申请号：US16670894

申请日：2019-10-31

申请人： International Business Machines Corporation

发明人： Terence P. Hook ,  Myung-Hee Na ,  Balasubramanian Pranatharthiharan ,  Andreas Scholze

IPC分类号： H01L29/66 ,  H01L29/423 ,  H01L29/08 ,  H01L21/225 ,  H01L29/417 ,  H01L29/78

摘要： A method for forming a device structure provides for forming a fin of a semiconductor material. A first contact is formed on the fin. A second contact is formed on the fin and spaced along a length of the fin from the first contact. A self-aligned gate electrode is formed on the fin that is positioned along the length of the fin between the first contact and the second contact.

公开(公告)号：US20160372600A1

公开(公告)日：2016-12-22

申请号：US14744147

申请日：2015-06-19

申请人： International Business Machines Corporation

发明人： Terence B. Hook ,  Myung-Hee Na ,  Balasubramanian Pranatharthiharan ,  Andreas Scholze

IPC分类号： H01L29/78 ,  H01L29/423 ,  H01L21/225 ,  H01L29/08 ,  H01L29/66 ,  H01L29/417

CPC分类号： H01L29/6656 ,  H01L21/2254 ,  H01L21/2255 ,  H01L29/0847 ,  H01L29/41791 ,  H01L29/4238 ,  H01L29/6653 ,  H01L29/66795 ,  H01L29/785

摘要： Device structures and fabrication methods for a fin-type field-effect transistor. A first contact, a second contact, and a gate electrode are formed on a fin comprised of a semiconductor material. The second contact is spaced along a length of the fin from the first contact. The gate electrode is positioned along the length of the fin between the first contact and the second contact.

摘要翻译： 鳍式场效应晶体管的器件结构和制造方法。 第一触点，第二触点和栅电极形成在由半导体材料构成的鳍上。 第二接触件沿着鳍片的长度与第一接触件间隔开。 栅电极沿第一触点和第二触点之间的鳍片的长度定位。