公开(公告)号：US20230170286A1

公开(公告)日：2023-06-01

申请号：US18070092

申请日：2022-11-28

Applicant: Infineon Technologies AG

Inventor： Arthur Unrau ,  Florian Dreps ,  Christoph Koch ,  Till Neddermann ,  Christian Steininger

IPC: H01L23/498 ,  H01L23/538 ,  H01L25/07 ,  H01L25/18 ,  H01L23/053 ,  H01L21/48

CPC classification number: H01L23/49811 ,  H01L23/5383 ,  H01L25/072 ,  H01L25/18 ,  H01L23/053 ,  H01L21/4842 ,  H01L24/73

Abstract: A terminal element or bus bar for a power semiconductor module arrangement includes a first end configured to be arranged inside a housing of the power semiconductor module arrangement, a second end configured to be arranged outside of the housing of the power semiconductor module arrangement, and at least a first section and a second section arranged successively between the first end and the second end along a length of the terminal element or bus bar, wherein either the first section includes a first material, the second section includes a second material, and the first material differs from the second material, or the first section has a first thickness, the second section has a second thickness, and the first thickness differs from the second thickness, or both.

公开(公告)号：US09000580B2

公开(公告)日：2015-04-07

申请号：US13749884

申请日：2013-01-25

Applicant: Infineon Technologies AG

Inventor： Torsten Groening ,  Mark Essert ,  Christian Steininger ,  Roman Lennart Tschirbs

IPC: H01L29/24 ,  H01L23/40 ,  H01L21/50 ,  H01L23/36 ,  H01L23/373 ,  H01L21/48 ,  H01L23/31

CPC classification number: H01L23/40 ,  H01L21/4878 ,  H01L21/50 ,  H01L23/3121 ,  H01L23/36 ,  H01L23/3735 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A power semiconductor module includes a baseplate having a top side, an underside, and a depression formed in the baseplate. The depression extends into the baseplate proceeding from the top side. A thickness of the baseplate is locally reduced in a region of the depression. The power semiconductor module further includes a circuit carrier arranged above the depression on the top side of the baseplate such that the depression is interposed between the circuit carrier and the underside of the baseplate.

Abstract translation: 功率半导体模块包括具有顶面，下侧和形成在基板中的凹陷的基板。 凹陷延伸到从顶部进行的底板。 底板的厚度在凹陷区域局部减小。 功率半导体模块还包括布置在基板的顶侧上的凹陷上方的电路载体，使得凹陷插入电路载体和底板的下侧之间。

公开(公告)号：US20130193591A1

公开(公告)日：2013-08-01

申请号：US13749884

申请日：2013-01-25

Applicant: Infineon Technologies AG

Inventor： Torsten Groening ,  Mark Essert ,  Christian Steininger ,  Roman Lennart Tschirbs

IPC: H01L23/40 ,  H01L21/50

CPC classification number: H01L23/40 ,  H01L21/4878 ,  H01L21/50 ,  H01L23/3121 ,  H01L23/36 ,  H01L23/3735 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A power semiconductor module includes a baseplate having a top side, an underside, and a depression formed in the baseplate. The depression extends into the baseplate proceeding from the top side. A thickness of the baseplate is locally reduced in a region of the depression. The power semiconductor module further includes a circuit carrier arranged above the depression on the top side of the baseplate such that the depression is interposed between the circuit carrier and the underside of the baseplate.

Abstract translation: 功率半导体模块包括具有顶面，下侧和形成在基板中的凹陷的基板。 凹陷延伸到从顶部进行的底板。 底板的厚度在凹陷区域局部减小。 功率半导体模块还包括布置在基板的顶侧上的凹陷上方的电路载体，使得凹陷插入电路载体和底板的下侧之间。

公开(公告)号：US20230360982A1

公开(公告)日：2023-11-09

申请号：US18141634

申请日：2023-05-01

Applicant: Infineon Technologies AG

Inventor： Martin Goldammer ,  Ulrich Nolten ,  Christian Steininger ,  Carsten Ehlers

IPC: H01L23/10 ,  H01L23/04 ,  H01L23/12

CPC classification number: H01L23/10 ,  H01L23/04 ,  H01L23/12 ,  H01L23/06

Abstract: A method includes: pouring a liquid, semi-liquid or viscous material into a cavity formed by sidewalls of a housing, to cover a substrate that is arranged in the cavity formed by the sidewalls; arranging a lid on the sidewalls, to cover the cavity formed by the sidewalls, the lid including at least one functional element that extends from the lid into the liquid, semi-liquid or viscous material in a direction towards the substrate once the lid is in a final mounting position; and curing the liquid, semi-liquid or viscous material, to form a casting compound.

公开(公告)号：US09659793B2

公开(公告)日：2017-05-23

申请号：US14943511

申请日：2015-11-17

Applicant: Infineon Technologies AG

Inventor： Nicolas Heuck ,  Frederik Otto ,  Christian Steininger

IPC: H01L21/00 ,  H01L21/48 ,  H01L23/00

CPC classification number: H01L21/4825 ,  H01L21/4842 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/75 ,  H01L24/83 ,  H01L2224/27003 ,  H01L2224/27005 ,  H01L2224/2732 ,  H01L2224/2744 ,  H01L2224/27442 ,  H01L2224/27848 ,  H01L2224/29294 ,  H01L2224/29295 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/29364 ,  H01L2224/29369 ,  H01L2224/29373 ,  H01L2224/2939 ,  H01L2224/32227 ,  H01L2224/32245 ,  H01L2224/75252 ,  H01L2224/75315 ,  H01L2224/75343 ,  H01L2224/75745 ,  H01L2224/83048 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/832 ,  H01L2224/83203 ,  H01L2224/83207 ,  H01L2224/83208 ,  H01L2224/8322 ,  H01L2224/83424 ,  H01L2224/83447 ,  H01L2224/8384 ,  H01L2224/83986 ,  H01L2924/3512 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: A method for producing a material-bonding connection between a semiconductor chip and a metal layer is disclosed. For this purpose, a semiconductor chip, a metal layer, which has a chip mounting portion, and also a bonding medium containing a metal powder are provided. The metal powder is sintered in a sintering process. In this case, throughout a prescribed sintering time, the prescribed requirements are met, that the bonding medium is arranged between the semiconductor chip and the metal layer and extends right through from the semiconductor chip to the metal layer, that the semiconductor chip and the metal layer are pressed against one another in a pressing-pressure range that lies above a minimum pressing pressure, that the bonding medium is kept in a temperature range that lies above a minimum temperature and that a sound signal is introduced into the bonding medium.

公开(公告)号：US20160148819A1

公开(公告)日：2016-05-26

申请号：US14943511

申请日：2015-11-17

Applicant: Infineon Technologies AG

Inventor： Nicolas Heuck ,  Frederik Otto ,  Christian Steininger

IPC: H01L21/48

CPC classification number: H01L21/4825 ,  H01L21/4842 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/75 ,  H01L24/83 ,  H01L2224/27003 ,  H01L2224/27005 ,  H01L2224/2732 ,  H01L2224/2744 ,  H01L2224/27442 ,  H01L2224/27848 ,  H01L2224/29294 ,  H01L2224/29295 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/29364 ,  H01L2224/29369 ,  H01L2224/29373 ,  H01L2224/2939 ,  H01L2224/32227 ,  H01L2224/32245 ,  H01L2224/75252 ,  H01L2224/75315 ,  H01L2224/75343 ,  H01L2224/75745 ,  H01L2224/83048 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/832 ,  H01L2224/83203 ,  H01L2224/83207 ,  H01L2224/83208 ,  H01L2224/8322 ,  H01L2224/83424 ,  H01L2224/83447 ,  H01L2224/8384 ,  H01L2224/83986 ,  H01L2924/3512 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: A method for producing a material-bonding connection between a semiconductor chip and a metal layer is disclosed. For this purpose, a semiconductor chip, a metal layer, which has a chip mounting portion, and also a bonding medium containing a metal powder are provided. The metal powder is sintered in a sintering process. In this case, throughout a prescribed sintering time, the prescribed requirements are met, that the bonding medium is arranged between the semiconductor chip and the metal layer and extends right through from the semiconductor chip to the metal layer, that the semiconductor chip and the metal layer are pressed against one another in a pressing-pressure range that lies above a minimum pressing pressure, that the bonding medium is kept in a temperature range that lies above a minimum temperature and that a sound signal is introduced into the bonding medium.

Abstract translation: 公开了一种用于在半导体芯片和金属层之间制造材料接合连接的方法。 为此，提供了具有芯片安装部分的半导体芯片，金属层以及含有金属粉末的接合介质。 金属粉末在烧结过程中烧结。 在这种情况下，在规定的烧结时间内，满足规定的要求，接合介质配置在半导体芯片和金属层之间，从半导体芯片向右延伸到金属层，半导体芯片和金属 层压在超过最小压制压力的压制压力范围内，使粘合介质保持在高于最低温度的温度范围内并且声音信号被引入粘合介质中。