公开(公告)号：US10763246B2

公开(公告)日：2020-09-01

申请号：US15646189

申请日：2017-07-11

Applicant: Infineon Technologies AG

Inventor： Ralf Otremba ,  Klaus Schiess ,  Oliver Haeberlen ,  Matteo-Alessandro Kutschak

IPC: H01L23/495 ,  H01L25/11 ,  H01L25/10 ,  H01L23/31 ,  H01L23/00 ,  H01L23/14 ,  H01L21/48 ,  H01L23/538 ,  H01L25/00 ,  H01L25/065 ,  H01L25/16 ,  H01L27/088 ,  H01L21/56

Abstract: A device includes a driver circuit, a first semiconductor chip monolithically integrated with the driver circuit in a first semiconductor material, and a second semiconductor chip integrated in a second semiconductor material. The second semiconductor material is a compound semiconductor.

公开(公告)号：US20200091058A1

公开(公告)日：2020-03-19

申请号：US16568818

申请日：2019-09-12

Applicant: Infineon Technologies AG

Inventor： Andreas Riegler ,  Christian Fachmann ,  Matteo-Alessandro Kutschak ,  Carsten von Koblinski ,  Hans Weber

IPC: H01L23/498 ,  H01L23/15 ,  H01L23/00 ,  H01L23/13 ,  H01L21/48

Abstract: A connection body which comprises a base structure at least predominantly made of a semiconductor oxide material or glass material, and an electrically conductive wiring structure on and/or in the base structure, wherein the electrically conductive wiring structure comprises at least one vertical wiring section with a first lateral dimension on and/or in the base structure and at least one lateral wiring section connected with the at least one vertical wiring section, wherein the at least one lateral wiring section has a second lateral dimension on and/or in the base structure, which is different to the first lateral dimension.

公开(公告)号：US20170317001A1

公开(公告)日：2017-11-02

申请号：US15646189

申请日：2017-07-11

Applicant: Infineon Technologies AG

Inventor： Ralf Otremba ,  Klaus Schiess ,  Oliver Haeberlen ,  Matteo-Alessandro Kutschak

IPC: H01L23/31 ,  H01L23/14 ,  H01L23/495 ,  H01L25/10 ,  H01L23/00 ,  H01L23/538 ,  H01L21/48 ,  H01L21/56

Abstract: A device includes a driver circuit, a first semiconductor chip monolithically integrated with the driver circuit in a first semiconductor material, and a second semiconductor chip integrated in a second semiconductor material. The second semiconductor material is a compound semiconductor.

公开(公告)号：US09735078B2

公开(公告)日：2017-08-15

申请号：US14254139

申请日：2014-04-16

Applicant: Infineon Technologies AG

Inventor： Ralf Otremba ,  Klaus Schiess ,  Oliver Haeberlen ,  Matteo-Alessandro Kutschak

IPC: H01L23/495 ,  H01L23/48 ,  H01L23/52 ,  H01L23/31 ,  H01L25/10 ,  H01L23/00 ,  H01L23/14 ,  H01L21/48 ,  H01L23/538 ,  H01L21/56

CPC classification number: H01L23/3157 ,  H01L21/4842 ,  H01L21/568 ,  H01L23/142 ,  H01L23/3107 ,  H01L23/3121 ,  H01L23/49513 ,  H01L23/49537 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/48 ,  H01L24/83 ,  H01L25/105 ,  H01L2224/06181 ,  H01L2224/24175 ,  H01L2224/24246 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/40137 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48137 ,  H01L2224/73263 ,  H01L2224/73267 ,  H01L2224/8382 ,  H01L2224/92244 ,  H01L2225/1029 ,  H01L2225/1047 ,  H01L2924/00 ,  H01L2924/10253 ,  H01L2924/1033 ,  H01L2924/13055 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/00014 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2924/014

Abstract: A device includes a first semiconductor chip that is arranged over a first carrier and includes a first electrical contact. The device further includes a second semiconductor chip arranged over a second carrier and including a second electrical contact arranged over a surface of the second semiconductor chip facing the second carrier. The second carrier is electrically coupled to the first electrical contact and the second electrical contact.

公开(公告)号：US20150303128A1

公开(公告)日：2015-10-22

申请号：US14254139

申请日：2014-04-16

Applicant: Infineon Technologies AG

Inventor： Ralf Otremba ,  Klaus Schiess ,  Oliver Haeberlen ,  Matteo-Alessandro Kutschak

IPC: H01L23/373 ,  H01L23/522 ,  H01L23/31 ,  H01L25/10 ,  H01L23/495

CPC classification number: H01L23/3157 ,  H01L21/4842 ,  H01L21/568 ,  H01L23/142 ,  H01L23/3107 ,  H01L23/3121 ,  H01L23/49513 ,  H01L23/49537 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/48 ,  H01L24/83 ,  H01L25/105 ,  H01L2224/06181 ,  H01L2224/24175 ,  H01L2224/24246 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/40137 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48137 ,  H01L2224/73263 ,  H01L2224/73267 ,  H01L2224/8382 ,  H01L2224/92244 ,  H01L2225/1029 ,  H01L2225/1047 ,  H01L2924/00 ,  H01L2924/10253 ,  H01L2924/1033 ,  H01L2924/13055 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/00014 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2924/014

Abstract: A device includes a first semiconductor chip that is arranged over a first carrier and includes a first electrical contact. The device further includes a second semiconductor chip arranged over a second carrier and including a second electrical contact arranged over a surface of the second semiconductor chip facing the second carrier. The second carrier is electrically coupled to the first electrical contact and the second electrical contact.

Abstract translation: 一种器件包括布置在第一载体上并包括第一电触点的第一半导体芯片。 该装置还包括布置在第二载体上的第二半导体芯片，并且包括布置在面向第二载体的第二半导体芯片的表面上的第二电触点。 第二载体电耦合到第一电接触和第二电接触。

公开(公告)号：US11527468B2

公开(公告)日：2022-12-13

申请号：US16568818

申请日：2019-09-12

Applicant: Infineon Technologies AG

Inventor： Andreas Riegler ,  Christian Fachmann ,  Matteo-Alessandro Kutschak ,  Carsten von Koblinski ,  Hans Weber

IPC: H01L23/498 ,  H01L23/15 ,  H01L23/00 ,  H01L23/13 ,  H01L21/48

Abstract: A connection body which comprises a base structure at least predominantly made of a semiconductor oxide material or glass material, and an electrically conductive wiring structure on and/or in the base structure, wherein the electrically conductive wiring structure comprises at least one vertical wiring section with a first lateral dimension on and/or in the base structure and at least one lateral wiring section connected with the at least one vertical wiring section, wherein the at least one lateral wiring section has a second lateral dimension on and/or in the base structure, which is different to the first lateral dimension.