公开(公告)号：US10580717B2

公开(公告)日：2020-03-03

申请号：US15774990

申请日：2016-01-11

Applicant: Intel Corporation

Inventor： Boxi Liu ,  Hemanth K. Dhavaleswarapu ,  Syadwad Jain ,  James C. Matayabas, Jr.

IPC: H01L23/373 ,  H01L23/367 ,  H01L25/065 ,  H01L25/18 ,  H01L23/42 ,  H01L23/00 ,  H01L23/48 ,  H01L21/48 ,  H01L23/498 ,  H01L23/15 ,  H01L23/538

Abstract: A multiple chip package is described with multiple thermal interface materials. In one example, a package has a substrate, a first semiconductor die coupled to the substrate, a second semiconductor die coupled to the substrate, a heat spreader coupled to the die, wherein the first die has a first distance to the heat spreader and the second die has a second distance to the heat spreader, a first filled thermal interface material (TIM) between the first die and the heat spreader to mechanically and thermally couple the heat spreader to the die, and a second filled TIM between the second die and the heat spreader to mechanically and thermally couple the heat spreader to the second die.

公开(公告)号：US20170066088A1

公开(公告)日：2017-03-09

申请号：US14846489

申请日：2015-09-04

Applicant: Intel Corporation

Inventor： Mohit Sood ,  Boxi Liu ,  Wei Tan ,  Huili Xu ,  Kabir J. Mirpuri

IPC: B23K35/26 ,  B23K35/02 ,  H01L23/00 ,  H05K3/36 ,  H01L21/48 ,  H05K1/18 ,  H05K1/14 ,  H05K3/34 ,  B23K1/00 ,  H01L23/498

CPC classification number: B23K35/262 ,  B23K1/0016 ,  B23K35/0244 ,  H01L21/4853 ,  H01L23/49816 ,  H01L23/49833 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L2224/13014 ,  H01L2224/13016 ,  H01L2224/131 ,  H01L2224/13105 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13118 ,  H01L2224/13294 ,  H01L2224/133 ,  H01L2224/1339 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16502 ,  H01L2224/16505 ,  H01L2224/812 ,  H01L2224/81801 ,  H01L2224/81815 ,  H01L2224/8192 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/20104 ,  H01L2924/20105 ,  H01L2924/3511 ,  H01L2924/3841 ,  H05K1/141 ,  H05K1/144 ,  H05K1/181 ,  H05K3/3436 ,  H05K3/363 ,  H05K2201/042 ,  H05K2201/10234 ,  H05K2201/10378 ,  H05K2201/10734 ,  H05K2203/041 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/01323 ,  H01L2924/01324 ,  H01L2924/01079 ,  H01L2924/01029 ,  H01L2924/01049 ,  H01L2924/00014 ,  H01L2924/0665

Abstract: Embodiments herein may relate to an apparatus with a ball grid array (BGA) package that includes a plurality of solder balls of an off-eutectic material. In embodiments, the respective solder balls of the plurality of solder balls may form solder joints between a substrate of the BGA and a second substrate. In some embodiments the joints may be less than approximately 0.6 micrometers from one another. Other embodiments may be described and/or claimed.

Abstract translation: 本文的实施例可以涉及具有球栅阵列（BGA）封装的装置，其包括多个非共晶材料的焊球。 在实施例中，多个焊球的相应焊球可以在BGA的衬底和第二衬底之间形成焊接接头。 在一些实施例中，接头可以彼此小于约0.6微米。 可以描述和/或要求保护其他实施例。