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    Systems and methods for determining device-specific signal extension durations
    1.
    发明申请
    Systems and methods for determining device-specific signal extension durations 审中-公开
    用于确定特定于设备的信号延长持续时间的系统和方法

    公开(公告)号：US20160374017A1

    公开(公告)日：2016-12-22

    申请号：US14757828

    申请日：2015-12-26

    Applicant: Intel IP Corporation

    Inventor： Robert Stacey ,  Qinghua Li ,  Assaf Gurevitz ,  Ran Shimon ,  Chen Kojokaro

    IPC: H04W52/02 ,  H04L5/00

    CPC classification number: H04W52/0216 ,  H04L5/0007 ,  H04L5/0053 ,  H04W84/12 ,  Y02D70/142 ,  Y02D70/144 ,  Y02D70/26

    Abstract: Systems, apparatus, and methods for determining device-specific signal extension durations are disclosed. An example method includes determining a short interframe space (SIFS) time associated with the at least one processor; determining that a first processing time of the at least one processor exceeds a first predefined threshold, wherein the first processing time correspond to a time spent processing a symbol in a protocol data unit (PDU) exceeding a predetermined coded bit size threshold; determining that a second processing time of the at least one processor exceeds a second predetermined threshold, based at least in part on the first processing time; and determining that the second processing time exceeds the SIFS time.

    Abstract translation: 公开了用于确定特定于设备的信号延长持续时间的系统，装置和方法。 示例性方法包括确定与所述至少一个处理器相关联的短帧间间隔（SIFS）时间; 确定所述至少一个处理器的第一处理时间超过第一预定义阈值，其中所述第一处理时间对应于处理超过预定编码比特大小阈值的协议数据单元（PDU）中的符号的时间; 至少部分地基于所述第一处理时间确定所述至少一个处理器的第二处理时间超过第二预定阈值; 并确定第二处理时间超过SIFS时间。

    EARLY INDICATION FOR HIGH EFFICIENCY FIELDS
    5.
    发明申请
    EARLY INDICATION FOR HIGH EFFICIENCY FIELDS 有权
    早期指示用于高效率领域

    公开(公告)号：US20160373961A1

    公开(公告)日：2016-12-22

    申请号：US14979280

    申请日：2015-12-22

    Applicant: Intel IP Corporation

    Inventor： Qinghua Li ,  Xiaogang Chen ,  Ran Shimon ,  Robert Stacey ,  Assaf Gurevitz

    IPC: H04W28/06

    CPC classification number: H04W74/004 ,  H04W74/008 ,  H04W84/12

    Abstract: This disclosure describes methods, apparatus, and systems related to early indication system. A device may identify a high efficiency frame in accordance with a high efficiency communication standard, received from a first device, the high efficiency frame including, at least in part, one or more legacy signal fields and one or more high efficiency signal fields. The device may determine a length field included in one of the one or more legacy signal fields, wherein the length field includes an indication bit. The device may determine a position of a high efficiency short training field within the high efficiency frame based at least in part on the indication bit.

    Abstract translation: 本公开描述了与早期指示系统相关的方法，装置和系统。 设备可以根据从第一设备接收的高效率通信标准识别高效率帧，所述高效率帧至少部分地包括一个或多个传统信号字段和一个或多个高效率信号字段。 设备可以确定包括在一个或多个遗留信号字段之一中的长度字段，其中长度字段包括指示位。 设备可以至少部分地基于指示位来确定高效率帧内的高效率短训练场的位置。

    A-priori-probability-phase-estimation for digital phase-locked loops
    6.
    发明授权
    A-priori-probability-phase-estimation for digital phase-locked loops 有权
    数字锁相环的先验概率相位估计

    公开(公告)号：US09231602B1

    公开(公告)日：2016-01-05

    申请号：US14490115

    申请日：2014-09-18

    Applicant: Intel IP Corporation

    Inventor： Elan Banin ,  Rotem Banin ,  Ofir Degani ,  Ran Shimon ,  Ashoke Ravi

    IPC: H03L7/06 ,  H03L7/08 ,  G04F10/00

    CPC classification number: G04F10/005 ,  H03L7/085 ,  H03L2207/50

    Abstract: A digital phase locked loop operates with a time-to-digital converter and an a-priori-probability-phase-estimation component or estimator component that estimates the un-quantized phase associated with a quantization output of the time-to-digital converter. The time-to-digital converter generates a quantized value as the quantization output from a local oscillator signal of a local oscillator and a reference signal of a reference clock. The estimation component estimates a phase value from the quantized values as a function of a-priori data related to the time-to-digital converter and boundaries of the quantized value.

    Abstract translation: 数字锁相环用时间数字转换器和估计与时间数字转换器的量化输出相关联的未量化相位的先验概率相位估计分量或估计器分量进行操作。 时间 - 数字转换器产生量化值作为本地振荡器的本地振荡器信号和参考时钟的参考信号的量化输出。 估计分量从作为与时间 - 数字转换器相关的先验数据和量化值的边界的函数的量化值估计相位值。

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