公开(公告)号：US20140124817A1

公开(公告)日：2014-05-08

申请号：US13669171

申请日：2012-11-05

Applicant: INTERMOLECULAR, INC.

Inventor： Philip Kraus

IPC: H01L21/283 ,  H01L29/45 ,  H01L33/42

CPC classification number: H01L33/42 ,  H01L21/2258 ,  H01L21/28575 ,  H01L29/452 ,  H01L33/32 ,  H01L2933/0016

Abstract: An electrical contact is formed on a III-V semiconductor comprising gallium. The contact is formed by depositing a first layer comprising In, Au, and a dopant on the surface of a III-V semiconductor and a second layer comprising a conductive oxide on the first layer. The deposited layers are annealed in an inert atmosphere. The annealing causes the formation of a Ga—Au compound at the interface between the III-V semiconductor and the first layer. At least a portion of the dopant migrates into the III-V semiconductor such that the dopant provides n-type or p-type conductivity to the III-V semiconductor. The specific contact resistivity between the III-V semiconductor and the second layer is less than about 10−5 Ωcm2. The layers are further annealed in an oxidizing atmosphere such that the indium in the first layer is oxidized to form indium oxide.

Abstract translation: 在包含镓的III-V半导体上形成电接触。 该接触是通过在第一层上沉积包括In-Au和掺杂剂的第一层而形成在III-V族半导体的表面上的第二层和包含导电氧化物的第二层。 沉积的层在惰性气氛中退火。 退火导致在III-V半导体和第一层之间的界面处形成Ga-Au化合物。 掺杂剂的至少一部分迁移到III-V半导体中，使得掺杂剂向III-V半导体提供n型或p型导电性。 III-V半导体和第二层之间的比接触电阻小于约10-5＆OHgr·cm2。 这些层在氧化气氛中进一步退火，使得第一层中的铟被氧化形成氧化铟。

公开(公告)号：US20140191262A1

公开(公告)日：2014-07-10

申请号：US13738684

申请日：2013-01-10

Applicant: INTERMOLECULAR INC.

Inventor： Philip Kraus ,  Thai Cheng Chua ,  Yoga Saripalli

IPC: H01L31/0232 ,  H01L33/60

CPC classification number: H01L33/60 ,  H01L31/00 ,  H01L31/02165 ,  H01L31/022466 ,  H01L33/44 ,  H01S5/00 ,  H01S5/18361 ,  Y10S438/952

Abstract: Devices are described including a component comprising an alloy of AlN and AlSb. The component has an index of refraction substantially the same as that of a semiconductor in the optoelectronic device, and has high transparency at wavelengths of light used in the optoelectronic device. The component is in contact with the semiconductor in the optoelectronic device. The alloy comprises between 0% and 100% AlN by weight and between 0% and 100% AlSb by weight. The semiconductor can be a III-V semiconductor such as GaAs or AlGaInP. The component can be used as a transparent insulator. The alloy can also be doped to form either a p-type conductor or an n-type conductor, and the component can be used as a transparent conductor. Methods of making and devices utilizing the alloy are also disclosed.

Abstract translation: 描述了包括包含AlN和AlSb的合金的部件的装置。 该组件具有与光电子器件中的半导体基本上相同的折射率，并且在光电子器件中使用的光的波长处具有高透明度。 该元件与光电子器件中的半导体接触。 该合金包含0重量％至100重量％的AlN和按重量计在0％和100％之间的AlSb。 半导体可以是诸如GaAs或AlGaInP的III-V半导体。 该组件可用作透明绝缘体。 该合金也可以被掺杂以形成p型导体或n型导体，并且该组件可以用作透明导体。 还公开了制造方法和利用该合金的装置。

公开(公告)号：US20140299056A1

公开(公告)日：2014-10-09

申请号：US14308846

申请日：2014-06-19

Applicant: Intermolecular Inc.

Inventor： Philip Kraus ,  Boris Borisov ,  Dipankar Pramanik

IPC: C23C16/455 ,  C23C16/42 ,  C23C16/48

CPC classification number: C23C16/45551 ,  C23C16/42 ,  C23C16/4554 ,  C23C16/483 ,  C30B25/12 ,  C30B29/06 ,  C30B29/08 ,  H01L21/02532 ,  H01L21/0262

Abstract: Epitaxial films are grown by alternately exposed to precursor dosing regions, inert gas plasma regions, hydrogen-containing plasma regions, chlorine-containing plasma and metrology regions, or regions where an atomic hydrogen source is located. Alternately, laser irradiation techniques may be substituted for the plasma energy in some of the processing regions. The film growth process can be implemented at substrate temperatures between about 25 C and about 600 C, together with optional exposures to laser irradiation to cause the surface of the film to melt or to experience a near-melt condition.

Abstract translation: 外延膜通过交替地暴露于前体给料区域，惰性气体等离子体区域，含氢等离子体区域，含氯等离子体和计量区域或原子氢源所在的区域而生长。 或者，激光照射技术可以替代一些处理区域中的等离子体能量。 膜生长过程可以在约25℃至约600℃之间的衬底温度下进行，以及可选地暴露于激光照射以使膜的表面熔化或经历近熔融状态。

公开(公告)号：US08652861B1

公开(公告)日：2014-02-18

申请号：US13722744

申请日：2012-12-20

Applicant: Intermolecular, Inc.

Inventor： Philip Kraus ,  Sandeep Nijhawan

IPC: H01L21/00

CPC classification number: H01L33/005 ,  H01L33/405 ,  H01L2933/0016

Abstract: HPC techniques are applied to the screening and evaluating the materials, process parameters, process sequences, and post deposition treatment processes for the development of ohmic contact stacks for optoelectronic devices. Simple test structures are employed for initial screening of basic materials properties of candidate materials for each layer within the stack. The use of multiple site-isolated regions on a single substrate allows many material and/or process conditions to be evaluated in a timely and cost effective manner. Interactions between the layers as well as interactions with the substrate can be investigated in a straightforward manner.

Abstract translation: HPC技术应用于筛选和评估用于光电子器件的欧姆接触堆叠的材料，工艺参数，工艺顺序和后沉积处理工艺。 使用简单的测试结构来初步筛选堆叠内每层的候选材料的基本材料性质。 在单个基板上使用多个位置隔离区域允许以及时和成本有效的方式评估许多材料和/或工艺条件。 可以以直接的方式研究层之间的相互作用以及与基底的相互作用。

公开(公告)号：US08900897B2

公开(公告)日：2014-12-02

申请号：US13738684

申请日：2013-01-10

Applicant: Intermolecular Inc.

Inventor： Philip Kraus ,  Thai Cheng Chua ,  Yoga Saripalli

IPC: H01L21/00 ,  H01L33/00 ,  G02B1/10 ,  G02F1/15 ,  H01L33/60 ,  H01L31/00 ,  H01L33/44 ,  H01S5/00

CPC classification number: H01L33/60 ,  H01L31/00 ,  H01L31/02165 ,  H01L31/022466 ,  H01L33/44 ,  H01S5/00 ,  H01S5/18361 ,  Y10S438/952

Abstract: Devices are described including a component comprising an alloy of AlN and AlSb. The component has an index of refraction substantially the same as that of a semiconductor in the optoelectronic device, and has high transparency at wavelengths of light used in the optoelectronic device. The component is in contact with the semiconductor in the optoelectronic device. The alloy comprises between 0% and 100% AlN by weight and between 0% and 100% AlSb by weight. The semiconductor can be a III-V semiconductor such as GaAs or AlGaInP. The component can be used as a transparent insulator. The alloy can also be doped to form either a p-type conductor or an n-type conductor, and the component can be used as a transparent conductor. Methods of making and devices utilizing the alloy are also disclosed.

Abstract translation: 描述了包括包含AlN和AlSb的合金的部件的装置。 该组件具有与光电子器件中的半导体基本上相同的折射率，并且在光电子器件中使用的光的波长处具有高透明度。 该元件与光电子器件中的半导体接触。 该合金包含0重量％至100重量％的AlN和按重量计在0％和100％之间的AlSb。 半导体可以是诸如GaAs或AlGaInP的III-V半导体。 该组件可用作透明绝缘体。 该合金也可以被掺杂以形成p型导体或n型导体，并且该组件可以用作透明导体。 还公开了制造方法和利用该合金的装置。

公开(公告)号：US08835961B2

公开(公告)日：2014-09-16

申请号：US13648786

申请日：2012-10-10

Applicant: Intermolecular, Inc.

Inventor： Philip Kraus ,  Minh-Huu Le ,  Sandeep Nijhawan

IPC: H01L33/60

CPC classification number: H01L31/02167 ,  H01L31/02161 ,  H01L33/44 ,  Y02E10/50

Abstract: Devices are described including a first component and a second component, wherein the first component comprises a Group III-N semiconductor and the second component comprises a bimetallic oxide containing tin, having an index of refraction within 15% of the index of refraction of the Group III-N semiconductor, and having negligible extinction coefficient at wavelengths of light emitted or absorbed by the Group III-N semiconductor. The first component is in optical contact with the second component. Exemplary bimetallic oxides include Sn1-xBixO2 where x≅0.10, Zn2SnO2, Sn1-xAlxO2 where x≅0.18, and Sn1-xMgxO2 where x≅0.16. Methods of making and using the devices are also described.

Abstract translation: 描述了包括第一部件和第二部件的装置，其中第一部件包括III-N族半导体，第二部件包括含锡的双金属氧化物，折射率在该组折射率的15％以内 III-N半导体，并且在由III-N族半导体发射或吸收的光的波长处具有可忽略的消光系数。 第一部件与第二部件光学接触。 示例性双金属氧化物包括Sn1-xBixO2，其中x0.10，Zn2SnO2，Sn1-xAlxO2，其中x≅0.18，Sn1-xMgxO2，其中x≅0.16。 还描述了制造和使用装置的方法。

公开(公告)号：US20140127887A1

公开(公告)日：2014-05-08

申请号：US13837994

申请日：2013-03-15

Applicant: INTERMOLECULAR, INC.

Inventor： Philip Kraus ,  Boris Borisov ,  Thai Cheng Chua ,  Sandeep Nijhawan

IPC: H01L21/02

CPC classification number: H01L21/0254 ,  C23C16/0227 ,  C23C16/303 ,  C23C16/305 ,  C23C16/409 ,  C23C16/45527 ,  C23C16/45534 ,  C23C16/45542 ,  C23C16/45551

Abstract: Chemical vapor deposition (CVD) systems for forming layers on a substrate are disclosed. Embodiments of the system comprise at least two processing chambers that may be linked in a cluster tool. A first processing chamber provides a chamber having a controlled environmental temperature and pressure and containing a first environment for performing CVD on a substrate, and a second environment for contacting the substrate with a plasma; a substrate transport system capable of positioning a substrate for sequential processing in each environment, and a gas control system capable of maintaining isolation. A second processing chamber provides a CVD system. Methods of forming layers on a substrate comprise forming one or more layers in each processing chamber. The systems and methods are suitable for preparing Group III-V, Group II-VI or Group IV thin film devices.

Abstract translation: 公开了用于在衬底上形成层的化学气相沉积（CVD）系统。 该系统的实施例包括至少两个可以在集群工具中链接的处理室。 第一处理室提供具有受控的环境温度和压力的室，并且包含用于在衬底上进行CVD的第一环境和用于使衬底与等离子体接触的第二环境; 能够在每个环境中定位用于顺序处理的基板的基板输送系统，以及能够保持隔离的气体控制系统。 第二处理室提供CVD系统。 在衬底上形成层的方法包括在每个处理室中形成一个或多个层。 该系统和方法适用于制备III-V族，II-VI族或IV族薄膜器件。

公开(公告)号：US20140124788A1

公开(公告)日：2014-05-08

申请号：US13670269

申请日：2012-11-06

Applicant: INTERMOLECULAR, INC.

Inventor： Philip Kraus ,  Boris Borisov ,  Thai Cheng Chua ,  Sandeep Nijhawan

IPC: H01L21/205 ,  H01L29/205 ,  H01L33/32

CPC classification number: H01L21/0254 ,  C23C16/0227 ,  C23C16/303 ,  C23C16/305 ,  C23C16/409 ,  C23C16/45527 ,  C23C16/45534 ,  C23C16/45542 ,  C23C16/45551

Abstract: Chemical vapor deposition (CVD) systems for forming layers on a substrate are disclosed. Embodiments of the system comprise at least two processing chambers that may be linked in a cluster tool. A first processing chamber provides a chamber having a controlled environmental temperature and pressure and containing a first environment for performing CVD on a substrate, and a second environment for contacting the substrate with a plasma; a substrate transport system capable of positioning a substrate for sequential processing in each environment, and a gas control system capable of maintaining isolation. A second processing chamber provides a CVD system. Methods of forming layers on a substrate comprise forming one or more layers in each processing chamber. The systems and methods are suitable for preparing Group III-V, Group II-VI or Group IV thin film devices.