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    Elementary cell for constructing asynchronous superconducting logic circuits
    1.
    发明授权
    Elementary cell for constructing asynchronous superconducting logic circuits 失效
    用于构造异步超导逻辑电路的基本单元

    公开(公告)号：US5598105A

    公开(公告)日：1997-01-28

    申请号：US562746

    申请日：1995-11-27

    申请人： Itaru Kurosawa ,  Hiroshi Nakagawa ,  Masahiro Aoyagi ,  Masaaki Maezawa ,  Takashi Nanya ,  Yoshio Kameda

    发明人： Itaru Kurosawa ,  Hiroshi Nakagawa ,  Masahiro Aoyagi ,  Masaaki Maezawa ,  Takashi Nanya ,  Yoshio Kameda

    IPC分类号： H01L39/22 ,  H03K19/195

    CPC分类号： H03K19/1954

    摘要： An elementary cell uses single-flux-quanta as two-valued logic propagation signals and is effective for Constructing asynchronous superconducting logic circuits. The elementary cell comprises one OR circuit section and one AND circuit section. Input pulses applied to two input terminals of the elementary cell are split at signal splitting sections in the elementary cell and applied to both inputs of the OR circuit section and both inputs of the AND circuit section. The output of the OR circuit section is defined as the OR output of the elementary cell. A first arrival pulse memory section is provided in the AND circuit section and when one of two input pulses input to the two input terminals of the AND circuit section arrives before the other, this fact is recorded in the first arrival pulse memory section as logical "1". When the other input pulse arrives while logical "1" is recorded in the first arrival pulse memory section, the AND circuit section produces an AND output which is defined as the AND output of the elementary cell. When a reset signal pulse is applied to a reset terminal, the first arrival pulse memory section is reset.

    摘要翻译： 基本单元使用单通量量子作为二值逻辑传播信号，对于构造异步超导逻辑电路是有效的。 基本单元包括一个OR电路部分和一个AND电路部分。 施加到基本单元的两个输入端子的输入脉冲在基本单元中的信号分离部分处被分离，并且被施加到“或”电路部分的两个输入端和“与”电路部分的两个输入端。 OR电路部分的输出被定义为基本单元的OR输出。 在AND电路部分中设置第一到达脉冲存储器部分，并且当输入到AND电路部分的两个输入端子的两个输入脉冲之一到达另一个时，该事实被记录在第一到达脉冲存储器部分中作为逻辑“ 1“。 当在第一到达脉冲存储器部分中记录逻辑“1”时另一个输入脉冲到达时，与电路部分产生被定义为基本单元的与输出的“与”输出。 当将复位信号脉冲施加到复位端子时，第一到达脉冲存储器部分被复位。

    Josephson memory circuit
    2.
    发明授权
    Josephson memory circuit 失效
    约瑟夫森记忆电路

    公开(公告)号：US5260264A

    公开(公告)日：1993-11-09

    申请号：US663456

    申请日：1991-03-04

    申请人： Itaru Kurosawa ,  Hiroshi Nakagawa ,  Masahiro Aoyagi

    发明人： Itaru Kurosawa ,  Hiroshi Nakagawa ,  Masahiro Aoyagi

    IPC分类号： G11C11/44 ,  H01B12/00 ,  H01L39/12

    CPC分类号： G11C11/44 ,  Y10S505/702 ,  Y10S505/832 ,  Y10S505/874

    摘要： One or more superconducting memory cells capable of storing binary values as the presence or absence of a persisting loop current in their superconducting memory loops are connected in series by a circuit current line. This arrangement is provided with a set gate which switches to the voltage state and outputs circuit current from its output terminal to one end of the circuit current line when write command current is supplied to its control terminal and is further provided with a sense gate whose control terminal is series coupled though a capacitance element with the same one end of the circuit current line and whose ground side terminal is connected with the other end of the circuit control line thereby forming through the sense gate a read-out loop for receiving as differential current persisting loop current selectively discharged from the memory loop. The differential current causes the sense gate to switch itself to the voltage state and output a sense current. At least a part of the sense current is supplied to the control terminal of the set gate as rewrite command current. As a result, the read-out of binary values from the superconducting memory loop can be conducted in a manner that is equivalent to nondestructive read-out. As the differential current dissipates automatically over a period of time determined by a prescribed time constant, there remains no residual current which might cause an operational error.

    摘要翻译： 通过电路电流线将能够存储二进制值的一个或多个超导存储器单元串联连接在其超导存储器回路中的持续回路电流的存在或不存在。 该配置设置有一个设定门，当写命令电流被提供给其控制端时，其转换到电压状态并将电路电流从其输出端子输出到电路电流线的一端，并且还设置有控制门 端子通过电路电流线的同一端的电容元件串联耦合，并且其接地端与电路控制线的另一端相连，从而通过读出门形成用于接收作为差分电流的读出环 持续的回路电流从存储器回路中选择性地放电。 差分电流使感测门自身切换到电压状态并输出感测电流。 感测电流的至少一部分作为重写命令电流被提供给设定门的控制端。 结果，可以以等同于非破坏性读出的方式来读取来自超导存储器环路的二进制值。 由于差分电流在由规定时间常数决定的时间段内自动消耗，所以不存在可能导致操作错误的剩余电流。

    Method of making contact probe
    3.
    发明授权
    Method of making contact probe 有权
    制作接触探针的方法

    公开(公告)号：US09134346B2

    公开(公告)日：2015-09-15

    申请号：US13168136

    申请日：2011-06-24

    申请人： Masahiro Aoyagi ,  Katsuya Kikuchi ,  Hiroshi Nakagawa ,  Yoshikuni Okada ,  Hiroyuki Fujita ,  Shouichi Imai ,  Shigeo Kiyota

    发明人： Masahiro Aoyagi ,  Katsuya Kikuchi ,  Hiroshi Nakagawa ,  Yoshikuni Okada ,  Hiroyuki Fujita ,  Shouichi Imai ,  Shigeo Kiyota

    IPC分类号： H01R43/00 ,  G01R3/00 ,  G01R1/067 ,  G01R1/073

    CPC分类号： G01R3/00 ,  G01R1/06772 ,  G01R1/07342 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T156/10

    摘要： A method of making a contact probe including a step of making a first printed wiring board having a signal electrode and a ground electrode used as a contact part of the contact probe with respect to a measuring object, in which the signal electrode and ground electrode are formed of a metal wiring pattern, and making a second printed wiring board with a coaxial line structure having a shield electrode which encloses a signal line and the surroundings of the signal line through an insulating layer. The signal electrode of the first printed wiring board and the signal line of the second printed wiring board are electrically connected together, and the ground electrode of the first printed wiring board and the shield electrode of the second printed wiring board are electrically connected together.

    摘要翻译： 一种制造接触探针的方法，包括以下步骤：制作具有信号电极和接地电极的第一印刷线路板，所述信号电极和接地电极相对于测量对象用作接触探针的接触部分，其中信号电极和接地电极为 由金属布线图案形成，并且制造具有同轴线结构的第二印刷布线板，其具有通过绝缘层包围信号线和信号线周围的屏蔽电极。 第一印刷电路板的信号电极和第二印刷电路板的信号线电连接在一起，并且第一印刷线路板的接地电极和第二印刷线路板的屏蔽电极电连接在一起。

    CONTACT PROVE AND METHOD OF MAKING THE SAME
    5.
    发明申请
    CONTACT PROVE AND METHOD OF MAKING THE SAME 有权
    联系方式及其制作方法

    公开(公告)号：US20090224781A1

    公开(公告)日：2009-09-10

    申请号：US12297732

    申请日：2007-04-19

    申请人： Masahiro Aoyagi ,  Katsuya Kikuchi ,  Hiroshi Nakagawa ,  Yoshikuni Okada ,  Hiroyuki Fujita ,  Shouichi Imai ,  Shigeo Kiyota

    发明人： Masahiro Aoyagi ,  Katsuya Kikuchi ,  Hiroshi Nakagawa ,  Yoshikuni Okada ,  Hiroyuki Fujita ,  Shouichi Imai ,  Shigeo Kiyota

    IPC分类号： G01R31/02 ,  B32B37/00 ,  H01R43/00

    CPC分类号： G01R3/00 ,  G01R1/06772 ,  G01R1/07342 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T156/10

    摘要： [Problem]To provide a contact probe which can easily be connected with a measurement apparatus electrically, can measure a high speed and high frequency signal with a fine pitch easily and correctly, and can easily cope with signal measurement for a plurality of channels, and a method of making the contact probe. [Means to Solve Problem] It includes a first printed wiring board 3 having a signal electrode 10a and a ground electrode 10b used as a contact part with respect to a measuring object, in which the signal electrode 10a and ground electrode 10b are formed of a metal wiring pattern on a substrate, and a second printed wiring board 2 with a coaxial line structure having shield electrodes 12, 17, 18 which enclose a signal line 15a and the surroundings of the signal line 15a through an insulating layer. The signal electrode 10a of the first printed wiring board 3 and the signal line 15a of the second printed wiring board 2 are electrically connected together, and the ground electrode 10b of the first printed wiring board 3 and the shield electrodes 12, 17, 18 of the second printed wiring board 2 are electrically connected together.

    摘要翻译： [问题]为了提供可以容易地与测量装置电连接的接触探针，可以容易且准确地测量具有细间距的高速和高频信号，并且可以容易地处理多个通道的信号测量，以及 制作接触探针的方法。 解决问题的手段包括：第一印刷线路板3，其具有信号电极10a和接地电极10b，该接地电极用作相对于测量对象的接触部分，其中信号电极10a和接地电极10b由 金属布线图案和具有同轴线结构的第二印刷布线板2，其具有通过绝缘层包围信号线15a和信号线15a的周围的屏蔽电极12,17,18。 第一印刷线路板3的信号电极10a和第二印刷线路板2的信号线15a电连接在一起，第一印刷线路板3的接地电极10b和屏蔽电极12,17,18的 第二印刷线路板2电连接在一起。

    Contact probe, measuring pad used for the contact probe, and method of manufacturing the contact probe
    6.
    发明授权
    Contact probe, measuring pad used for the contact probe, and method of manufacturing the contact probe 有权
    接触式探针，用于接触式探针的测量垫以及接触式探头的制造方法

    公开(公告)号：US07227352B2

    公开(公告)日：2007-06-05

    申请号：US11602240

    申请日：2006-11-21

    申请人： Masahiro Aoyagi ,  Hiroshi Nakagawa ,  Kazuhiko Tokoro ,  Katsuya Kikuchi ,  Yoshikuni Okada ,  Shigeo Kiyota

    发明人： Masahiro Aoyagi ,  Hiroshi Nakagawa ,  Kazuhiko Tokoro ,  Katsuya Kikuchi ,  Yoshikuni Okada ,  Shigeo Kiyota

    IPC分类号： G01R31/02 ,  H01R43/00

    CPC分类号： G01R1/06772 ,  H05K1/0219 ,  H05K1/117 ,  Y10T29/49117

    摘要： There is provided a contact probe that is smaller than 50 μm in a pitch between a signal electrode and a ground electrode and can correctly conduct a high-speed high-frequency measurement, a measuring pad used for the contact probe, and a method of manufacturing the contact probe. The contact probe includes: a tip member having a signal electrode 10a and a ground electrode 11a that are put into contact with an object to be measured; and a coaxial cable 1 having a core 1b electrically connected to the signal electrode 10a and an outer covering conductor la electrically connected to the ground electrode 11a, wherein the tip member is formed on a printed wiring board 2, and wherein the signal electrode 10a and the ground electrode 11a are constructed of fine coplanar strip lines formed on an insulating board 2a.

    摘要翻译： 提供了在信号电极和接地电极之间以间距小于50um的接触探针，并且可以正确地进行高速高频测量，用于接触探针的测量垫以及制造方法 接触探头。 接触探针包括：具有与被测量物体接触的信号电极10a和接地电极11a的尖端部件; 以及具有电连接到信号电极10a的芯1b和电连接到接地电极11a的外覆盖导体1a的同轴电缆1，其中尖端构件形成在印刷线路板2上，并且其中信号 电极10a和接地电极11a由形成在绝缘板2a上的细共面带状线构成。

    Method of forming micro metal bump
    7.
    发明授权
    Method of forming micro metal bump 有权
    形成微金属凸块的方法

    公开(公告)号：US07767574B2

    公开(公告)日：2010-08-03

    申请号：US12225741

    申请日：2007-03-30

    申请人： Yoshihiro Gomi ,  Masahiro Aoyagi ,  Hiroshi Nakagawa ,  Katsuya Kikuchi ,  Yoshikuni Okada ,  Hirotaka Oosato

    发明人： Yoshihiro Gomi ,  Masahiro Aoyagi ,  Hiroshi Nakagawa ,  Katsuya Kikuchi ,  Yoshikuni Okada ,  Hirotaka Oosato

    IPC分类号： H01L21/44

    CPC分类号： C23C14/541 ,  B23K1/0016 ,  B23K3/0607 ,  C23C14/042 ,  C23C14/228 ,  H01L21/4853 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/742 ,  H01L2224/0401 ,  H01L2224/0603 ,  H01L2224/1131 ,  H01L2224/1147 ,  H01L2224/13012 ,  H01L2224/13016 ,  H01L2224/13099 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1403 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079

    摘要： The present invention provides a method of forming a micro metal bump, which is capable of stably and industrially forming a micro metal bump, by a gas deposition process, at a prescribed position of a metal part formed on one side surface of a substrate. The method comprises the steps of: forming a straight hole (34) in a mask layer (30) covering one side surface of a substrate (10) on which a wiring pattern (12) is formed, wherein a prescribed position of the wiring pattern (12) is exposed in a bottom surface of the straight hole and the straight hole has an inner wall perpendicular to the one side surface of the substrate (10) and a sharp top opening portion; providing a metal plate, whose area is larger than that of the substrate (10), on the other side surface of the substrate (10) as a heat sink; placing the substrate (10) and the metal plate in a vacuum; forming a tapered metal bump (14) on the exposed surface of the wiring pattern (12), which is exposed in the bottom surface of the straight hole (34), by a gas deposition process, in which metal nanoparticles obtained by evaporating a metal are ejected from a nozzle together with a carrier gas so as to deposit on the prescribed position, with cooling the substrate (10) to a temperature lower than upper temperature limit of resin constituting the mask layer (30), by the metal plate as the heat sink, so as to retain a configuration of the straight hole (34); and removing the mask layer (30) from the one side surface of the substrate so as to complete the tapered metal bump (14) at the prescribed position of the wiring pattern (12).

    摘要翻译： 本发明提供一种通过气相沉积工艺在形成在基板的一个侧表面上的金属部件的规定位置上形成能够稳定地和工业上形成微小金属凸块的微型金属凸块的方法。 该方法包括以下步骤：在覆盖其上形成有布线图案（12）的基板（10）的一个侧表面的掩模层（30）中形成直孔（34），其中布线图案 （12）暴露在直孔的底面上，直孔具有与基板（10）的一个侧面垂直的内壁和尖锐的开口部; 在作为散热器的基板（10）的另一侧表面上设置面积比基板（10）的面积大的金属板; 将基板（10）和金属板放置在真空中; 在通过气相沉积工艺暴露在直孔（34）的底表面中的布线图案（12）的暴露表面上形成锥形金属凸块（14），其中通过蒸发金属 与载气一起从喷嘴喷射，以便沉积在规定位置，通过金属板作为基板（10）冷却至低于构成掩模层（30）的树脂的上限温度的温度 散热器，以保持直孔（34）的构造; 以及从所述基板的一个侧表面去除所述掩模层（30），以在所述布线图案（12）的规定位置处完成所述锥形金属凸块（14）。

    Superconducting integrated circuit and method for fabrication thereof
    9.
    发明授权
    Superconducting integrated circuit and method for fabrication thereof 失效
    超导集成电路及其制造方法

    公开(公告)号：US07323348B2

    公开(公告)日：2008-01-29

    申请号：US11031995

    申请日：2005-01-11

    申请人： Masahiro Aoyagi ,  Hiroshi Nakagawa ,  Kazuhiko Tokoro ,  Katsuya Kikuchi ,  Hiroshi Itatani ,  Sigemasa Segawa

    发明人： Masahiro Aoyagi ,  Hiroshi Nakagawa ,  Kazuhiko Tokoro ,  Katsuya Kikuchi ,  Hiroshi Itatani ,  Sigemasa Segawa

    IPC分类号： H01L21/00

    CPC分类号： H01L39/223 ,  H01L27/18 ,  H01L39/2493

    摘要： A superconducting integrated circuit includes a substrate, a multilayer structure formed on the substrate and composed of a lower superconducting electrode, a tunnel barrier and an upper superconducting electrode sequentially joined together upward in the order mentioned, and an insulating layer perforated to form via holes to get electrical contacts with the lower and upper electrodes. The insulating layer is formed of a high-resolution, photosensitive, solvent-soluble, organic insulating material. The superconducting integrated circuit is produced by a method that includes the steps of depositing the multiplayer on the substrate, applying the insulating material to the front surface of the substrate inclusive of the multiplayer, forming the via holes in the insulating material by the lithographic technique at the prospective positions to get electrical contacts with the upper and lower electrodes, and laying wirings for connecting the upper and lower electrodes through the via holes.

    摘要翻译： 超导集成电路包括基板，形成在基板上并由下部超导电极，隧道势垒和上部超导电极按顺序连接在一起的多层结构，以及穿孔以形成通孔的绝缘层 与下电极和上电极电接触。 绝缘层由高分辨率，光敏，溶剂可溶的有机绝缘材料形成。 超导集成电路是通过以下步骤制造的，所述方法包括以下步骤：在衬底上沉积多层板，将绝缘材料施加到包括多层板的衬底的前表面，通过光刻技术在绝缘材料中形成通孔 与上下电极电接触的预期位置，以及布置用于通过通孔连接上电极和下电极的布线。