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    Method of forming micro metal bump
    8.
    发明授权
    Method of forming micro metal bump 有权
    形成微金属凸块的方法

    公开(公告)号：US07767574B2

    公开(公告)日：2010-08-03

    申请号：US12225741

    申请日：2007-03-30

    申请人： Yoshihiro Gomi ,  Masahiro Aoyagi ,  Hiroshi Nakagawa ,  Katsuya Kikuchi ,  Yoshikuni Okada ,  Hirotaka Oosato

    发明人： Yoshihiro Gomi ,  Masahiro Aoyagi ,  Hiroshi Nakagawa ,  Katsuya Kikuchi ,  Yoshikuni Okada ,  Hirotaka Oosato

    IPC分类号： H01L21/44

    CPC分类号： C23C14/541 ,  B23K1/0016 ,  B23K3/0607 ,  C23C14/042 ,  C23C14/228 ,  H01L21/4853 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/742 ,  H01L2224/0401 ,  H01L2224/0603 ,  H01L2224/1131 ,  H01L2224/1147 ,  H01L2224/13012 ,  H01L2224/13016 ,  H01L2224/13099 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1403 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079

    摘要： The present invention provides a method of forming a micro metal bump, which is capable of stably and industrially forming a micro metal bump, by a gas deposition process, at a prescribed position of a metal part formed on one side surface of a substrate. The method comprises the steps of: forming a straight hole (34) in a mask layer (30) covering one side surface of a substrate (10) on which a wiring pattern (12) is formed, wherein a prescribed position of the wiring pattern (12) is exposed in a bottom surface of the straight hole and the straight hole has an inner wall perpendicular to the one side surface of the substrate (10) and a sharp top opening portion; providing a metal plate, whose area is larger than that of the substrate (10), on the other side surface of the substrate (10) as a heat sink; placing the substrate (10) and the metal plate in a vacuum; forming a tapered metal bump (14) on the exposed surface of the wiring pattern (12), which is exposed in the bottom surface of the straight hole (34), by a gas deposition process, in which metal nanoparticles obtained by evaporating a metal are ejected from a nozzle together with a carrier gas so as to deposit on the prescribed position, with cooling the substrate (10) to a temperature lower than upper temperature limit of resin constituting the mask layer (30), by the metal plate as the heat sink, so as to retain a configuration of the straight hole (34); and removing the mask layer (30) from the one side surface of the substrate so as to complete the tapered metal bump (14) at the prescribed position of the wiring pattern (12).

    摘要翻译： 本发明提供一种通过气相沉积工艺在形成在基板的一个侧表面上的金属部件的规定位置上形成能够稳定地和工业上形成微小金属凸块的微型金属凸块的方法。 该方法包括以下步骤：在覆盖其上形成有布线图案（12）的基板（10）的一个侧表面的掩模层（30）中形成直孔（34），其中布线图案 （12）暴露在直孔的底面上，直孔具有与基板（10）的一个侧面垂直的内壁和尖锐的开口部; 在作为散热器的基板（10）的另一侧表面上设置面积比基板（10）的面积大的金属板; 将基板（10）和金属板放置在真空中; 在通过气相沉积工艺暴露在直孔（34）的底表面中的布线图案（12）的暴露表面上形成锥形金属凸块（14），其中通过蒸发金属 与载气一起从喷嘴喷射，以便沉积在规定位置，通过金属板作为基板（10）冷却至低于构成掩模层（30）的树脂的上限温度的温度 散热器，以保持直孔（34）的构造; 以及从所述基板的一个侧表面去除所述掩模层（30），以在所述布线图案（12）的规定位置处完成所述锥形金属凸块（14）。

    Superconducting integrated circuit and method for fabrication thereof
    10.
    发明授权
    Superconducting integrated circuit and method for fabrication thereof 失效
    超导集成电路及其制造方法

    公开(公告)号：US07323348B2

    公开(公告)日：2008-01-29

    申请号：US11031995

    申请日：2005-01-11

    申请人： Masahiro Aoyagi ,  Hiroshi Nakagawa ,  Kazuhiko Tokoro ,  Katsuya Kikuchi ,  Hiroshi Itatani ,  Sigemasa Segawa

    发明人： Masahiro Aoyagi ,  Hiroshi Nakagawa ,  Kazuhiko Tokoro ,  Katsuya Kikuchi ,  Hiroshi Itatani ,  Sigemasa Segawa

    IPC分类号： H01L21/00

    CPC分类号： H01L39/223 ,  H01L27/18 ,  H01L39/2493

    摘要： A superconducting integrated circuit includes a substrate, a multilayer structure formed on the substrate and composed of a lower superconducting electrode, a tunnel barrier and an upper superconducting electrode sequentially joined together upward in the order mentioned, and an insulating layer perforated to form via holes to get electrical contacts with the lower and upper electrodes. The insulating layer is formed of a high-resolution, photosensitive, solvent-soluble, organic insulating material. The superconducting integrated circuit is produced by a method that includes the steps of depositing the multiplayer on the substrate, applying the insulating material to the front surface of the substrate inclusive of the multiplayer, forming the via holes in the insulating material by the lithographic technique at the prospective positions to get electrical contacts with the upper and lower electrodes, and laying wirings for connecting the upper and lower electrodes through the via holes.

    摘要翻译： 超导集成电路包括基板，形成在基板上并由下部超导电极，隧道势垒和上部超导电极按顺序连接在一起的多层结构，以及穿孔以形成通孔的绝缘层 与下电极和上电极电接触。 绝缘层由高分辨率，光敏，溶剂可溶的有机绝缘材料形成。 超导集成电路是通过以下步骤制造的，所述方法包括以下步骤：在衬底上沉积多层板，将绝缘材料施加到包括多层板的衬底的前表面，通过光刻技术在绝缘材料中形成通孔 与上下电极电接触的预期位置，以及布置用于通过通孔连接上电极和下电极的布线。