公开(公告)号：US20060118869A1

公开(公告)日：2006-06-08

申请号：US11003171

申请日：2004-12-03

申请人： Je-Hsiung Lan ,  Gang Yu

发明人： Je-Hsiung Lan ,  Gang Yu

IPC分类号： H01L27/12 ,  H01L27/01

CPC分类号： H01L29/4908 ,  H01L29/42384 ,  H01L29/66606 ,  H01L29/6675 ,  H01L29/78633 ,  H01L29/78648 ,  H01L29/78666 ,  H01L29/78675 ,  H01L29/78681 ,  H01L29/7869

摘要： A TFT includes a substrate and a first semiconductor layer overlying the substrate. A portion of the first semiconductor layer is a channel region of the TFT. The TFT also includes spaced-apart first and second source/drain structures overlying the first semiconductor layer. From a plan view of the TFT, the channel region lies between the first source/drain structure and the second source/drain structure. The TFT further includes a gate dielectric layer overlying the channel region and the first and second source/drain structures, and a gate electrode overlying the first gate dielectric layer. A process for forming the TFT includes forming first and second metal-containing structures over first and second semiconductor layers. The process also includes removing the portion of the second semiconductor layer lying between the first and second source/drain structures. A gate dielectric layer and a gate electrode are formed within the spaced-apart first and second source/drain structures.

摘要翻译： TFT包括衬底和覆盖衬底的第一半导体层。 第一半导体层的一部分是TFT的沟道区。 TFT还包括覆盖在第一半导体层上的间隔开的第一和第二源极/漏极结构。 从TFT的平面图，沟道区域位于第一源极/漏极结构和第二源极/漏极结构之间。 TFT还包括覆盖沟道区和第一和第二源极/漏极结构的栅极电介质层和覆盖第一栅极介电层的栅电极。 用于形成TFT的工艺包括在第一和第二半导体层上形成第一和第二含金属结构。 该方法还包括去除位于第一和第二源极/漏极结构之间的第二半导体层的部分。 在间隔开的第一和第二源极/漏极结构内形成栅极电介质层和栅电极。

公开(公告)号：US07317434B2

公开(公告)日：2008-01-08

申请号：US11003172

申请日：2004-12-03

申请人： Je-Hsiung Lan ,  Gang Yu

发明人： Je-Hsiung Lan ,  Gang Yu

IPC分类号： G09G3/30

CPC分类号： G09G3/3233 ,  G09G3/2022 ,  G09G2300/0426 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2320/043 ,  G09G2330/021

摘要： A circuit for an electronic device includes a select unit, a data holder unit, an electronic component, a transistor, and a switch. The control terminal of the switch is coupled to a first select line, the first terminal of the switch is connected to a first electrode of the electronic component, and the second terminal of the switch is connected to a reference voltage line. A method of using an electronic component that includes such a circuit includes writing data to a pixel and driving the electronic component. The select unit and the switch are configured to turn on at substantially a same time, and the select unit and the switch are configured to turn off at substantially a same time during writing and driving, respectively.

摘要翻译： 电子设备的电路包括选择单元，数据保持单元，电子元件，晶体管和开关。 开关的控制端子耦合到第一选择线，开关的第一端子连接到电子部件的第一电极，并且开关的第二端子连接到参考电压线。 使用包括这种电路的电子部件的方法包括将数据写入像素并驱动电子部件。 选择单元和开关被配置为基本上同时接通，并且选择单元和开关分别被配置为在写入和驱动期间基本上同时关闭。

公开(公告)号：US20060119548A1

公开(公告)日：2006-06-08

申请号：US11003172

申请日：2004-12-03

申请人： Je-Hsiung Lan ,  Gang Yu

发明人： Je-Hsiung Lan ,  Gang Yu

IPC分类号： G09G3/30

CPC分类号： G09G3/3233 ,  G09G3/2022 ,  G09G2300/0426 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2320/043 ,  G09G2330/021

摘要： A circuit for an electronic device includes a select unit, a data holder unit, an electronic component, a transistor, and a switch. The control terminal of the switch is coupled to a first select line, the first terminal of the switch is connected to a first electrode of the electronic component, and the second terminal of the switch is connected to a reference voltage line. A method of using an electronic component that includes such a circuit includes writing data to a pixel and driving the electronic component. The select unit and the switch are configured to turn on at substantially a same time, and the select unit and the switch are configured to turn off at substantially a same time during writing and driving, respectively.

摘要翻译： 电子设备的电路包括选择单元，数据保持单元，电子元件，晶体管和开关。 开关的控制端子耦合到第一选择线，开关的第一端子连接到电子部件的第一电极，并且开关的第二端子连接到参考电压线。 使用包括这种电路的电子部件的方法包括将数据写入像素并驱动电子部件。 选择单元和开关被配置为基本上同时接通，并且选择单元和开关分别被配置为在写入和驱动期间基本上同时关闭。

公开(公告)号：US08363380B2

公开(公告)日：2013-01-29

申请号：US12473882

申请日：2009-05-28

申请人： Je-Hsiung Lan ,  Evgeni P. Gousev ,  Wenyue Zhang ,  Manish Kothari ,  Sang-June Park

发明人： Je-Hsiung Lan ,  Evgeni P. Gousev ,  Wenyue Zhang ,  Manish Kothari ,  Sang-June Park

IPC分类号： H01G7/00 ,  H01G7/06

CPC分类号： H01G7/00 ,  H01G5/16 ,  H01P1/127 ,  Y10T29/435

摘要： MEMS varactors capable of handling large signals and/or achieving a high capacitance tuning range are described. In an exemplary design, a MEMS varactor includes (i) a first bottom plate electrically coupled to a first terminal receiving an input signal, (ii) a second bottom plate electrically coupled to a second terminal receiving a DC voltage, and (iii) a top plate formed over the first and second bottom plates and electrically coupled to a third terminal. The DC voltage causes the top plate to mechanically move and vary the capacitance observed by the input signal. In another exemplary design, a MEMS varactor includes first, second and third plates formed on over one another and electrically coupled to first, second and third terminals, respectively. First and second DC voltages may be applied to the first and third terminals, respectively. An input signal may be passed between the first and second terminals.

摘要翻译： 描述能够处理大信号和/或实现高电容调谐范围的MEMS变容二极管。 在示例性设计中，MEMS变容二极管包括（i）电耦合到接收输入信号的第一端子的第一底板，（ii）电耦合到接收DC电压的第二端子的第二底板，以及（iii） 顶板形成在第一和第二底板上并电耦合到第三端子。 直流电压使顶板机械地移动并改变由输入信号观察到的电容。 在另一示例性设计中，MEMS变容二极管包括彼此形成并分别电耦合到第一，第二和第三端子的第一，第二和第三板。 第一和第二直流电压可以分别施加到第一和第三端子。 输入信号可以在第一和第二端子之间通过。

公开(公告)号：US20120274647A1

公开(公告)日：2012-11-01

申请号：US13094687

申请日：2011-04-26

申请人： Je-Hsiung Lan ,  Sang-June Park ,  Jonghae Kim ,  Evgeni Gousev ,  Matthew Nowak ,  Philip J. Stephanou ,  Justin Black ,  Kurt Petersen ,  Srinivasan Ganapathi

发明人： Je-Hsiung Lan ,  Sang-June Park ,  Jonghae Kim ,  Evgeni Gousev ,  Matthew Nowak ,  Philip J. Stephanou ,  Justin Black ,  Kurt Petersen ,  Srinivasan Ganapathi

IPC分类号： H01L41/053 ,  G09G5/39 ,  H01L41/22 ,  G06T1/60

CPC分类号： H03H3/0072 ,  H03H9/2447 ,  Y10T29/42

摘要： This disclosure provides implementations of electromechanical systems resonator structures, devices, apparatus, systems, and related processes. In one aspect, a sacrificial layer is deposited on an insulating substrate. A lower electrode layer is formed proximate the sacrificial layer. A piezoelectric layer is deposited on the lower electrode layer. An upper electrode layer is formed on the piezoelectric layer. At least a portion of the sacrificial layer is removed to define a cavity such that at least a portion of the lower electrode layer is spaced apart from the insulating substrate.

摘要翻译： 本公开提供了机电系统谐振器结构，设备，装置，系统和相关过程的实现。 在一个方面，牺牲层沉积在绝缘衬底上。 在牺牲层附近形成下电极层。 压电层沉积在下电极层上。 在压电层上形成上电极层。 去除牺牲层的至少一部分以限定空腔，使得下电极层的至少一部分与绝缘基板间隔开。

公开(公告)号：US20120162232A1

公开(公告)日：2012-06-28

申请号：US12976647

申请日：2010-12-22

申请人： RIHUI HE ,  Xiaoming Yan ,  Je-Hsiung Lan

发明人： RIHUI HE ,  Xiaoming Yan ,  Je-Hsiung Lan

IPC分类号： G06T1/00 ,  G02B26/00

CPC分类号： B81C1/00333 ,  B81C2203/0136 ,  B81C2203/0145

摘要： This disclosure provides systems, methods, and apparatus for encapsulated electromechanical systems. In one aspect, a release path includes a release hole through an encapsulation layer. The release path exposes a portion of a first sacrificial layer that extends beyond a second sacrificial layer in a horizontal direction. This allows the first sacrificial layer and the second sacrificial layer to later be etched through the release path. The corresponding electromechanical system device includes a shell layer encapsulating a mechanical layer. A conformal layer seals a release hole that extends through a shell layer. A portion of the conformal layer blocks the opening of the release passage within the release hole. The release passage has substantially the same vertical height as a gap that defines the spacing between the mechanical layer and a substrate.

摘要翻译： 本公开提供了用于封装的机电系统的系统，方法和装置。 一方面，释放路径包括通过封装层的释放孔。 释放路径暴露在水平方向上延伸超过第二牺牲层的第一牺牲层的一部分。 这允许第一牺牲层和第二牺牲层随后通过释放路径被蚀刻。 相应的机电系统装置包括封装机械层的外壳层。 保形层密封延伸穿过壳层的释放孔。 共形层的一部分阻挡释放孔内的释放通道的开口。 释放通道具有与限定机械层和基底之间的间隔的间隙大致相同的垂直高度。

公开(公告)号：US20110316899A1

公开(公告)日：2011-12-29

申请号：US13225802

申请日：2011-09-06

申请人： Je-Hsiung Lan

发明人： Je-Hsiung Lan

IPC分类号： G09G5/10

CPC分类号： G02B26/001 ,  G09G3/3233 ,  G09G3/3466 ,  G09G2300/046 ,  G09G2300/0842 ,  G09G2300/0866 ,  G09G2360/144

摘要： One embodiment includes display comprising a light modulator configured to display a portion of an image such as a reflective light modulator, a light emitter configured to display the portion of the image and a circuit configured to selectively provide signals to at least one of the light modulator and the light emitter indicative of the portion of the image. In one such embodiment, an active matrix provides a simple, efficient drive for such devices. Other embodiments include methods of making and driving such devices.

摘要翻译： 一个实施例包括显示器，其包括被配置为显示诸如反射光调制器的图像的一部分的光调制器，被配置为显示图像的该部分的光发射器和被配置为选择性地向至少一个光调制器 和指示图像部分的光发射器。 在一个这样的实施例中，有源矩阵为这种设备提供简单，有效的驱动。 其他实施例包括制造和驱动这些装置的方法。

公开(公告)号：US08023169B2

公开(公告)日：2011-09-20

申请号：US12693346

申请日：2010-01-25

申请人： Je-Hsiung Lan

发明人： Je-Hsiung Lan

IPC分类号： G02F1/03 ,  G09G3/34 ,  G02B27/00 ,  F21V21/00

CPC分类号： G02B26/001 ,  G09G3/3233 ,  G09G3/3466 ,  G09G2300/046 ,  G09G2300/0842 ,  G09G2300/0866 ,  G09G2360/144

摘要： One embodiment includes display comprising a light modulator configured to display a portion of an image such as a reflective light modulator, a light emitter configured to display the portion of the image and a circuit configured to selectively provide signals to at least one of the light modulator and the light emitter indicative of the portion of the image. In one such embodiment, an active matrix provides a simple, efficient drive for such devices. Other embodiments methods of making and driving such devices.

摘要翻译： 一个实施例包括显示器，其包括被配置为显示诸如反射光调制器的图像的一部分的光调制器，被配置为显示图像的该部分的光发射器和被配置为选择性地向至少一个光调制器 和指示图像部分的光发射器。 在一个这样的实施例中，有源矩阵为这种设备提供简单，有效的驱动。 其他实施例制造和驱动这些装置的方法。

公开(公告)号：US20110109383A1

公开(公告)日：2011-05-12

申请号：US12473882

申请日：2009-05-28

申请人： Je-Hsiung Lan ,  Evgeni P. Gousev ,  Wenyue Zhang ,  Manish Kothari ,  Sang-June Park

发明人： Je-Hsiung Lan ,  Evgeni P. Gousev ,  Wenyue Zhang ,  Manish Kothari ,  Sang-June Park

IPC分类号： H01L29/93

CPC分类号： H01G7/00 ,  H01G5/16 ,  H01P1/127 ,  Y10T29/435

摘要： MEMS varactors capable of handling large signals and/or achieving a high capacitance tuning range are described. In an exemplary design, a MEMS varactor includes (i) a first bottom plate electrically coupled to a first terminal receiving an input signal, (ii) a second bottom plate electrically coupled to a second terminal receiving a DC voltage, and (iii) a top plate formed over the first and second bottom plates and electrically coupled to a third terminal. The DC voltage causes the top plate to mechanically move and vary the capacitance observed by the input signal. In another exemplary design, a MEMS varactor includes first, second and third plates formed on over one another and electrically coupled to first, second and third terminals, respectively. First and second DC voltages may be applied to the first and third terminals, respectively. An input signal may be passed between the first and second terminals.

摘要翻译： 描述能够处理大信号和/或实现高电容调谐范围的MEMS变容二极管。 在示例性设计中，MEMS变容二极管包括（i）电耦合到接收输入信号的第一端子的第一底板，（ii）电耦合到接收DC电压的第二端子的第二底板，以及（iii） 顶板形成在第一和第二底板上并电耦合到第三端子。 直流电压使顶板机械地移动并改变由输入信号观察到的电容。 在另一示例性设计中，MEMS变容二极管包括彼此形成并分别电耦合到第一，第二和第三端子的第一，第二和第三板。 第一和第二直流电压可以分别施加到第一和第三端子。 输入信号可以在第一和第二端子之间通过。

公开(公告)号：US08492874B2

公开(公告)日：2013-07-23

申请号：US13021151

申请日：2011-02-04

申请人： Je-Hsiung Lan ,  Matthew Michael Nowak ,  Evgeni P. Gousev ,  Jonghae Kim ,  Clarence Chui

发明人： Je-Hsiung Lan ,  Matthew Michael Nowak ,  Evgeni P. Gousev ,  Jonghae Kim ,  Clarence Chui

IPC分类号： H01G4/10 ,  H01G4/12 ,  H01L23/5222 ,  H01L28/82 ,  H01L29/945 ,  H01L23/642

CPC分类号： H01L28/82 ,  H01G4/012 ,  H01G4/10 ,  H01L23/5223 ,  H01L23/642 ,  H01L28/87 ,  H01L29/945 ,  H01L2224/16225 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311

摘要： Higher capacitance density is achieved by increasing a surface area of a capacitor. A larger surface area may be obtained by forming isotropic ball shapes (a concave surface) in the trenches on the semiconductor die. The concave surfaces are fabricated by depositing bilayers of amorphous-silicon and silicon oxide. Openings are patterned in the silicon oxide hard mask for trenches. The openings are transferred to the amorphous-silicon layers through isotropic etching to form concave surfaces. Conducting, insulating, and conducting layers are deposited on the concave surfaces of the trenches by atomic layer deposition.

摘要翻译： 通过增加电容器的表面积来实现更高的电容密度。 可以通过在半导体管芯上的沟槽中形成各向同性球形（凹面）来获得更大的表面积。 通过沉积非晶硅和氧化硅的双层来制造凹面。 在用于沟槽的氧化硅硬掩模中图案化开口。 通过各向同性蚀刻将开口转移到非晶硅层以形成凹面。 导电，绝缘和导电层通过原子层沉积沉积在沟槽的凹面上。