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公开(公告)号：US20120274647A1
公开(公告)日：2012-11-01
申请号：US13094687
申请日：2011-04-26
申请人： Je-Hsiung Lan , Sang-June Park , Jonghae Kim , Evgeni Gousev , Matthew Nowak , Philip J. Stephanou , Justin Black , Kurt Petersen , Srinivasan Ganapathi
发明人： Je-Hsiung Lan , Sang-June Park , Jonghae Kim , Evgeni Gousev , Matthew Nowak , Philip J. Stephanou , Justin Black , Kurt Petersen , Srinivasan Ganapathi
IPC分类号： H01L41/053 , G09G5/39 , H01L41/22 , G06T1/60
CPC分类号： H03H3/0072 , H03H9/2447 , Y10T29/42
摘要： This disclosure provides implementations of electromechanical systems resonator structures, devices, apparatus, systems, and related processes. In one aspect, a sacrificial layer is deposited on an insulating substrate. A lower electrode layer is formed proximate the sacrificial layer. A piezoelectric layer is deposited on the lower electrode layer. An upper electrode layer is formed on the piezoelectric layer. At least a portion of the sacrificial layer is removed to define a cavity such that at least a portion of the lower electrode layer is spaced apart from the insulating substrate.
摘要翻译： 本公开提供了机电系统谐振器结构，设备，装置，系统和相关过程的实现。 在一个方面，牺牲层沉积在绝缘衬底上。 在牺牲层附近形成下电极层。 压电层沉积在下电极层上。 在压电层上形成上电极层。 去除牺牲层的至少一部分以限定空腔，使得下电极层的至少一部分与绝缘基板间隔开。
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2.发明申请PIEZOELECTRIC RESONATORS WITH CONFIGURATIONS HAVING NO GROUND CONNECTIONS TO ENHANCE ELECTROMECHANICAL COUPLING 审中-公开具有无接地连接的配置的压电谐振器，以增强机电耦合公开(公告)号：US20120293520A1
公开(公告)日：2012-11-22
申请号：US13111683
申请日：2011-05-19
申请人： Changhan Yun , Sang-June Park , Chi Shun Lo , Jonghae Kim , Je-Hsiung Lan , Sanghoon Joo
发明人： Changhan Yun , Sang-June Park , Chi Shun Lo , Jonghae Kim , Je-Hsiung Lan , Sanghoon Joo
CPC分类号： H03H9/173 , H03H9/02228
摘要： This disclosure provides implementations of electromechanical systems resonator structures, devices, apparatus, systems, and related processes. In one aspect, resonator apparatus includes a first conductive layer including a first electrode and a second electrode. The first electrode is coupled to receive a first input signal, and the second electrode is coupled to provide a first output signal. A piezoelectric layer includes a piezoelectric material. The piezoelectric layer has a first side and a second side opposite the first side. The first side is proximate the first conductive layer, and the second side is electrically isolated from ground. In some examples, the second side of the piezoelectric layer can be exposed and/or electrically de-coupled from one or more components.
摘要翻译： 本公开提供了机电系统谐振器结构，设备，装置，系统和相关过程的实现。 在一个方面，谐振器装置包括包括第一电极和第二电极的第一导电层。 第一电极被耦合以接收第一输入信号，并且第二电极被耦合以提供第一输出信号。 压电层包括压电材料。 压电层具有与第一侧相对的第一侧和第二侧。 第一侧靠近第一导电层，第二侧与地电隔离。 在一些示例中，压电层的第二面可以暴露和/或从一个或多个部件电脱耦合。
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公开(公告)号：US08363380B2
公开(公告)日：2013-01-29
申请号：US12473882
申请日：2009-05-28
CPC分类号： H01G7/00 , H01G5/16 , H01P1/127 , Y10T29/435
摘要： MEMS varactors capable of handling large signals and/or achieving a high capacitance tuning range are described. In an exemplary design, a MEMS varactor includes (i) a first bottom plate electrically coupled to a first terminal receiving an input signal, (ii) a second bottom plate electrically coupled to a second terminal receiving a DC voltage, and (iii) a top plate formed over the first and second bottom plates and electrically coupled to a third terminal. The DC voltage causes the top plate to mechanically move and vary the capacitance observed by the input signal. In another exemplary design, a MEMS varactor includes first, second and third plates formed on over one another and electrically coupled to first, second and third terminals, respectively. First and second DC voltages may be applied to the first and third terminals, respectively. An input signal may be passed between the first and second terminals.
摘要翻译： 描述能够处理大信号和/或实现高电容调谐范围的MEMS变容二极管。 在示例性设计中，MEMS变容二极管包括（i）电耦合到接收输入信号的第一端子的第一底板，（ii）电耦合到接收DC电压的第二端子的第二底板，以及（iii） 顶板形成在第一和第二底板上并电耦合到第三端子。 直流电压使顶板机械地移动并改变由输入信号观察到的电容。 在另一示例性设计中，MEMS变容二极管包括彼此形成并分别电耦合到第一，第二和第三端子的第一，第二和第三板。 第一和第二直流电压可以分别施加到第一和第三端子。 输入信号可以在第一和第二端子之间通过。
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公开(公告)号：US20110109383A1
公开(公告)日：2011-05-12
申请号：US12473882
申请日：2009-05-28
IPC分类号： H01L29/93
CPC分类号： H01G7/00 , H01G5/16 , H01P1/127 , Y10T29/435
摘要： MEMS varactors capable of handling large signals and/or achieving a high capacitance tuning range are described. In an exemplary design, a MEMS varactor includes (i) a first bottom plate electrically coupled to a first terminal receiving an input signal, (ii) a second bottom plate electrically coupled to a second terminal receiving a DC voltage, and (iii) a top plate formed over the first and second bottom plates and electrically coupled to a third terminal. The DC voltage causes the top plate to mechanically move and vary the capacitance observed by the input signal. In another exemplary design, a MEMS varactor includes first, second and third plates formed on over one another and electrically coupled to first, second and third terminals, respectively. First and second DC voltages may be applied to the first and third terminals, respectively. An input signal may be passed between the first and second terminals.
摘要翻译： 描述能够处理大信号和/或实现高电容调谐范围的MEMS变容二极管。 在示例性设计中，MEMS变容二极管包括（i）电耦合到接收输入信号的第一端子的第一底板，（ii）电耦合到接收DC电压的第二端子的第二底板，以及（iii） 顶板形成在第一和第二底板上并电耦合到第三端子。 直流电压使顶板机械地移动并改变由输入信号观察到的电容。 在另一示例性设计中，MEMS变容二极管包括彼此形成并分别电耦合到第一，第二和第三端子的第一，第二和第三板。 第一和第二直流电压可以分别施加到第一和第三端子。 输入信号可以在第一和第二端子之间通过。
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5.发明申请STACKED CMOS CHIPSET HAVING AN INSULATING LAYER AND A SECONDARY LAYER AND METHOD OF FORMING SAME 有权具有绝缘层和二次层的堆叠CMOS芯片及其形成方法公开(公告)号：US20130120951A1
公开(公告)日：2013-05-16
申请号：US13356717
申请日：2012-01-24
申请人： Chengjie Zuo , Changhan Yun , Sang-June Park , Chi Shun Lo , Mario F. Velez , Jonghae Kim
发明人： Chengjie Zuo , Changhan Yun , Sang-June Park , Chi Shun Lo , Mario F. Velez , Jonghae Kim
CPC分类号： H01L27/0688 , H01L2224/18
摘要： A chipset includes a sheet of glass, quartz or sapphire and a first wafer having at least one first circuit layer on a first side of a first substrate layer. The first wafer is connected to the sheet such that the at least one first circuit layer is located between the first substrate layer and the sheet. A second wafer having at least one second circuit layer on a first side of a second substrate layer is connected to the first substrate layer such that the at least one second circuit layer is located between the second substrate layer and the first substrate layer. Also a method of forming a chipset.
摘要翻译： 芯片组包括玻璃板，石英或蓝宝石片，以及在第一基底层的第一面上具有至少一个第一电路层的第一晶片。 第一晶片连接到片材，使得至少一个第一电路层位于第一基片层和片之间。 具有在第二衬底层的第一侧上的至少一个第二电路层的第二晶片连接到第一衬底层，使得至少一个第二电路层位于第二衬底层和第一衬底层之间。 还有一种形成芯片组的方法。
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6.发明授权Electromechanical systems piezoelectric contour mode differential resonators and filters 有权机电系统压电轮廓模式差动谐振器和滤波器公开(公告)号：US09083300B2
公开(公告)日：2015-07-14
申请号：US13094707
申请日：2011-04-26
申请人： Chi Shun Lo , Jonghae Kim , Sang-June Park , Sanghoon Joo , Chengjie Zuo , Changhan Yun
发明人： Chi Shun Lo , Jonghae Kim , Sang-June Park , Sanghoon Joo , Chengjie Zuo , Changhan Yun
CPC分类号： H03H9/0095 , G09G3/3493 , G09G2310/0267 , G09G2310/027 , H01P1/2135 , H03H9/0014 , H03H9/02228 , H03H9/2431 , H03H9/2436 , H03H9/2463 , H03H9/564 , H03H2003/027 , H03H2009/02496 , H03H2009/02527 , H03H2009/241
摘要： This disclosure provides implementations of electromechanical systems resonator structures, devices, apparatus, systems, and related processes. In one aspect, a contour mode resonator device includes a first conductive layer with a plurality of first layer electrodes including a first electrode at which a first input signal can be provided and a second electrode at which a first output signal can be provided. A second conductive layer includes a plurality of second layer electrodes including a first electrode proximate the first electrode of the first conductive layer and a second electrode proximate the second electrode of the first conductive layer. A second signal can be provided at the first electrode or the second electrode of the second conductive layer to cooperate with the first input signal or the first output signal to define a differential signal. A piezoelectric layer is disposed between the first conductive layer and the second conductive layer. The piezoelectric layer includes a piezoelectric material. The piezoelectric layer is substantially oriented in a plane and capable of movement in the plane responsive to an electric field between the first electrodes or the second electrodes.
摘要翻译： 本公开提供了机电系统谐振器结构，设备，装置，系统和相关过程的实现。 一方面，轮廓模式谐振器装置包括具有多个第一层电极的第一导电层，所述第一导电层包括能够提供第一输入信号的第一电极和可以提供第一输出信号的第二电极。 第二导电层包括多个第二层电极，其包括靠近第一导电层的第一电极的第一电极和靠近第一导电层的第二电极的第二电极。 可以在第二导电层的第一电极或第二电极处提供第二信号，以与第一输入信号或第一输出信号配合以限定差分信号。 压电层设置在第一导电层和第二导电层之间。 压电层包括压电材料。 压电层基本上定向在平面中并且能够响应于第一电极或第二电极之间的电场在平面中移动。
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公开(公告)号：US20140035702A1
公开(公告)日：2014-02-06
申请号：US13563252
申请日：2012-07-31
申请人： Justin Phelps Black , Philip Jason Stephanou , Jonghae Kim , Je-Hsiung Jeffrey Lan , Sang-June Park , Changhan Hobie Yun , Chi Shun Lo , Chengjie Zuo
发明人： Justin Phelps Black , Philip Jason Stephanou , Jonghae Kim , Je-Hsiung Jeffrey Lan , Sang-June Park , Changhan Hobie Yun , Chi Shun Lo , Chengjie Zuo
CPC分类号： H03H7/075 , H03H9/465 , H03H2007/006
摘要： This disclosure provides implementations of filters and filter topologies, circuits, structures, devices, apparatus, systems, and related processes. In one aspect, a device includes one or more LC resonant circuit stages. In some implementations, each LC stage includes an inductor and a capacitor. Each LC stage also has a corresponding resonant frequency. The one or more LC stages are arranged to produce an unmodified passband over a range of frequencies having a corresponding bandwidth. One or more microelectromechanical systems (MEMS) resonators are arranged with the one or more LC stages. The one or more MEMS resonators are arranged with the one or more LC stages so as to modify characteristics of the unmodified passband such that the hybrid filter produces a modified passband having a modified bandwidth and one or more other modified band characteristics.
摘要翻译： 本公开提供了滤波器和滤波器拓扑，电路，结构，设备，装置，系统和相关过程的实现。 在一个方面，器件包括一个或多个LC谐振电路级。 在一些实现中，每个LC级包括电感器和电容器。 每个LC级还具有相应的谐振频率。 一个或多个LC级布置成在具有相应带宽的频率范围上产生未修改的通带。 一个或多个微机电系统（MEMS）谐振器与一个或多个LC级布置。 一个或多个MEMS谐振器被布置成具有一个或多个LC级，以便修改未修改的通带的特性，使得混合滤波器产生具有修改的带宽和一个或多个其它修改的频带特性的修改的通带。
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8.发明授权Stacked CMOS chipset having an insulating layer and a secondary layer and method of forming same 有权具有绝缘层和二次层的叠层CMOS芯片组及其形成方法公开(公告)号：US09496255B2
公开(公告)日：2016-11-15
申请号：US13356717
申请日：2012-01-24
申请人： Chengjie Zuo , Changhan Yun , Sang-June Park , Chi Shun Lo , Mario F. Velez , Jonghae Kim
发明人： Chengjie Zuo , Changhan Yun , Sang-June Park , Chi Shun Lo , Mario F. Velez , Jonghae Kim
CPC分类号： H01L27/0688 , H01L2224/18
摘要： A chipset includes a sheet of glass, quartz or sapphire and a first wafer having at least one first circuit layer on a first side of a first substrate layer. The first wafer is connected to the sheet such that the at least one first circuit layer is located between the first substrate layer and the sheet. A second wafer having at least one second circuit layer on a first side of a second substrate layer is connected to the first substrate layer such that the at least one second circuit layer is located between the second substrate layer and the first substrate layer. Also a method of forming a chipset.
摘要翻译： 芯片组包括玻璃板，石英或蓝宝石片，以及在第一基底层的第一面上具有至少一个第一电路层的第一晶片。 第一晶片连接到片材，使得至少一个第一电路层位于第一基片层和片之间。 具有在第二衬底层的第一侧上的至少一个第二电路层的第二晶片连接到第一衬底层，使得至少一个第二电路层位于第二衬底层和第一衬底层之间。 还有一种形成芯片组的方法。
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9.发明申请ELECTROMECHANICAL SYSTEMS PIEZOELECTRIC CONTOUR MODE DIFFERENTIAL RESONATORS AND FILTERS 有权电动系统压电体模式差分共振器和过滤器公开(公告)号：US20120050236A1
公开(公告)日：2012-03-01
申请号：US13094707
申请日：2011-04-26
申请人： Chi Shun Lo , Jonghae Kim , Sang-June Park , Sanghoon Joo , Chengjie Zuo , Changhan Yun
发明人： Chi Shun Lo , Jonghae Kim , Sang-June Park , Sanghoon Joo , Chengjie Zuo , Changhan Yun
CPC分类号： H03H9/0095 , G09G3/3493 , G09G2310/0267 , G09G2310/027 , H01P1/2135 , H03H9/0014 , H03H9/02228 , H03H9/2431 , H03H9/2436 , H03H9/2463 , H03H9/564 , H03H2003/027 , H03H2009/02496 , H03H2009/02527 , H03H2009/241
摘要： This disclosure provides implementations of electromechanical systems resonator structures, devices, apparatus, systems, and related processes. In one aspect, a contour mode resonator device includes a first conductive layer with a plurality of first layer electrodes including a first electrode at which a first input signal can be provided and a second electrode at which a first output signal can be provided. A second conductive layer includes a plurality of second layer electrodes including a first electrode proximate the first electrode of the first conductive layer and a second electrode proximate the second electrode of the first conductive layer. A second signal can be provided at the first electrode or the second electrode of the second conductive layer to cooperate with the first input signal or the first output signal to define a differential signal. A piezoelectric layer is disposed between the first conductive layer and the second conductive layer. The piezoelectric layer includes a piezoelectric material. The piezoelectric layer is substantially oriented in a plane and capable of movement in the plane responsive to an electric field between the first electrodes or the second electrodes.
摘要翻译： 本公开提供了机电系统谐振器结构，设备，装置，系统和相关过程的实现。 一方面，轮廓模式谐振器装置包括具有多个第一层电极的第一导电层，所述第一导电层包括能够提供第一输入信号的第一电极和可以提供第一输出信号的第二电极。 第二导电层包括多个第二层电极，其包括靠近第一导电层的第一电极的第一电极和靠近第一导电层的第二电极的第二电极。 可以在第二导电层的第一电极或第二电极处提供第二信号，以与第一输入信号或第一输出信号配合以限定差分信号。 压电层设置在第一导电层和第二导电层之间。 压电层包括压电材料。 压电层基本上定向在平面中并且能够响应于第一电极或第二电极之间的电场在平面中移动。
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公开(公告)号：US20110316657A1
公开(公告)日：2011-12-29
申请号：US12824955
申请日：2010-06-28
IPC分类号： H01F5/00
CPC分类号： H01F27/2804 , H01F17/0006 , H01F2027/2814 , H01L23/5225 , H01L23/5227 , H01L23/645 , H01L2224/48091 , H01L2224/4813 , H01L2224/73265 , H01L2924/1461 , H01L2924/30107 , H01L2924/3025 , H01L2924/00014 , H01L2924/00
摘要： A three-dimensional inductor or transformer for an electronic packaging system that includes a plurality of conductive traces and a plurality of conductive wire bonds. The traces are located in a single layer, and each have a first and second pad. Each of the wire bonds couples the second pad of one trace to the first pad of another trace. The trace and wire bonds create a continuous conductive path from the first pad of a first trace to the second pad of a last trace. Passing a current from the first trace to the last trace creates an electromagnetic field between the single layer and the wire bonds. The transformer includes two independent and electromagnetically coupled inductors that can be interleaved. The continuous conductive path can be solenoid-shaped. A shielding layer can also be included that blocks the substrate from the electromagnetic field of the inductor or transformer.
摘要翻译： 一种用于电子封装系统的三维电感器或变压器，其包括多个导电迹线和多个导电引线键合。 迹线位于单个层中，并且每个具有第一和第二焊盘。 每个线接合将一个迹线的第二个焊盘耦合到另一个迹线的第一个焊盘。 迹线和引线键形成从第一迹线的第一焊盘到最后迹线的第二焊盘的连续传导路径。 将电流从第一个轨迹传递到最后一个轨迹会在单层和引线键之间产生电磁场。 该变压器包括可以交错的两个独立的和电磁耦合的电感器。 连续导电路径可以是螺线管形的。 还可以包括阻挡基板与电感器或变压器的电磁场的屏蔽层。
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