Light-emitting device with low forward voltage and method for fabricating the same
    4.
    发明授权
    Light-emitting device with low forward voltage and method for fabricating the same 有权
    具有低正向电压的发光装置及其制造方法

    公开(公告)号:US08785904B2

    公开(公告)日:2014-07-22

    申请号:US13090899

    申请日:2011-04-20

    IPC分类号: H01L29/06

    摘要: A light emitting device with reduced forward voltage Vf by utilizing the excellent lateral conduction of two-dimensional electron gas (2DEG) and two-dimensional hole gas (2DHG) structure and, more specifically, by improving the vertical conduction of 2DEG and 2DHG structure by means of vertical conductive passages formed in 2DEG and 2DHG structure. The conductive passages are formed via discontinuities in 2DEG and 2DHG structure. The discontinuities can be in the form of openings by etching 2DEG or 2DHG structure, or in the form of voids by growing 2DEG or 2DHG structure on a rough surface via epitaxy facet control. The discontinuities can be formed by vertical displacement of 2DEG structure. A method is provided for manufacturing a light emitting device with reduced forward voltage same.

    摘要翻译: 通过利用二维电子气(2DEG)和二维空穴气体(2DHG)结构优异的横向导通,具有降低的正向电压Vf的发光器件,更具体地,通过改进2DEG和2DHG结构的垂直传导 以2DEG和2DHG结构形成的垂直导电通道的装置。 导电通道是通过2DEG和2DHG结构的不连续形成的。 通过蚀刻2DEG或2DHG结构,或通过在粗糙表面上通过外延小面控制生长2DEG或2DHG结构,以空隙的形式,不连续性可以是开口的形式。 可以通过2DEG结构的垂直位移形成不连续性。 提供了一种用于制造具有相同的正向电压降低的发光器件的方法。

    Methods of implanting dopant into channel regions
    7.
    发明授权
    Methods of implanting dopant into channel regions 失效
    将掺杂剂注入通道区域的方法

    公开(公告)号:US08273619B2

    公开(公告)日:2012-09-25

    申请号:US12848662

    申请日:2010-08-02

    IPC分类号: H01L21/8238

    摘要: The invention includes methods of forming channel region implants for two transistor devices simultaneously, in which a mask is utilized to block a larger percentage of a channel region location of one of the devices relative to the other. The invention also pertains to methods of forming capacitor structures in which a first capacitor electrode is spaced from a semiconductor substrate by a dielectric material, a second capacitor electrode comprises a conductively-doped diffusion region within the semiconductor material, and a capacitor channel region location is beneath the dielectric material and adjacent the conductively-doped diffusion region. An implant mask is formed to cover only a first portion of the capacitor channel region location and to leave a second portion of the capacitor channel region location uncovered. While the implant mask is in place, dopant is implanted into the uncovered second portion of the capacitor channel region location.

    摘要翻译: 本发明包括同时形成两个晶体管器件的沟道区域植入物的方法,其中掩模用于阻挡相对于另一个器件之一的较大百分比的沟道区域位置。 本发明还涉及形成电容器结构的方法,其中第一电容器电极通过电介质材料与半导体衬底隔开,第二电容器电极包括半导体材料内的导电掺杂扩散区,电容器通道区位置为 在介电材料的下方并与导电掺杂的扩散区相邻。 形成注入掩模以仅覆盖电容器沟道区位置的第一部分并且留下未覆盖的电容器沟道区位置的第二部分。 当植入掩模就位时,掺杂剂被注入到电容器通道区域位置的未覆盖的第二部分中。

    Methods of forming capacitor structures, methods of forming threshold voltage implant regions, and methods of implanting dopant into channel regions
    8.
    发明申请
    Methods of forming capacitor structures, methods of forming threshold voltage implant regions, and methods of implanting dopant into channel regions 失效
    形成电容器结构的方法,形成阈值电压注入区域的方法以及将掺杂剂注入沟道区域的方法

    公开(公告)号:US20100297822A1

    公开(公告)日:2010-11-25

    申请号:US12848662

    申请日:2010-08-02

    IPC分类号: H01L21/336 H01L21/265

    摘要: The invention includes methods of forming channel region implants for two transistor devices simultaneously, in which a mask is utilized to block a larger percentage of a channel region location of one of the devices relative to the other. The invention also pertains to methods of forming capacitor structures in which a first capacitor electrode is spaced from a semiconductor substrate by a dielectric material, a second capacitor electrode comprises a conductively-doped diffusion region within the semiconductor material, and a capacitor channel region location is beneath the dielectric material and adjacent the conductively-doped diffusion region. An implant mask is formed to cover only a first portion of the capacitor channel region location and to leave a second portion of the capacitor channel region location uncovered. While the implant mask is in place, dopant is implanted into the uncovered second portion of the capacitor channel region location.

    摘要翻译: 本发明包括同时形成两个晶体管器件的沟道区域植入物的方法,其中掩模用于阻挡相对于另一个器件之一的较大百分比的沟道区域位置。 本发明还涉及形成电容器结构的方法,其中第一电容器电极通过电介质材料与半导体衬底隔开,第二电容器电极包括半导体材料内的导电掺杂扩散区,电容器通道区位置为 在介电材料的下方并与导电掺杂的扩散区相邻。 形成注入掩模以仅覆盖电容器沟道区位置的第一部分并且留下未覆盖的电容器沟道区位置的第二部分。 当植入掩模就位时,掺杂剂被注入到电容器通道区域位置的未覆盖的第二部分中。

    Methods of implanting dopant into channel regions
    9.
    发明授权
    Methods of implanting dopant into channel regions 有权
    将掺杂剂注入通道区域的方法

    公开(公告)号:US07767514B2

    公开(公告)日:2010-08-03

    申请号:US11406863

    申请日:2006-04-18

    IPC分类号: H01L21/8238

    摘要: The invention includes methods of forming channel region implants for two transistor devices simultaneously, in which a mask is utilized to block a larger percentage of a channel region location of one of the devices relative to the other. The invention also pertains to methods of forming capacitor structures in which a first capacitor electrode is spaced from a semiconductor substrate by a dielectric material, a second capacitor electrode comprises a conductively-doped diffusion region within the semiconductor material, and a capacitor channel region location is beneath the dielectric material and adjacent the conductively-doped diffusion region. An implant mask is formed to cover only a first portion of the capacitor channel region location and to leave a second portion of the capacitor channel region location uncovered. While the implant mask is in place, dopant is implanted into the uncovered second portion of the capacitor channel region location.

    摘要翻译: 本发明包括同时形成两个晶体管器件的沟道区域植入物的方法,其中掩模用于阻挡相对于另一个器件之一的较大百分比的沟道区域位置。 本发明还涉及形成电容器结构的方法,其中第一电容器电极通过电介质材料与半导体衬底隔开,第二电容器电极包括半导体材料内的导电掺杂扩散区,电容器通道区位置为 在介电材料的下方并与导电掺杂的扩散区相邻。 形成注入掩模以仅覆盖电容器沟道区位置的第一部分并且留下未覆盖的电容器沟道区位置的第二部分。 当植入掩模就位时,掺杂剂被注入到电容器通道区域位置的未覆盖的第二部分中。

    Methods of forming threshold voltage implant regions
    10.
    发明授权
    Methods of forming threshold voltage implant regions 失效
    形成阈值电压注入区域的方法

    公开(公告)号:US07674670B2

    公开(公告)日:2010-03-09

    申请号:US11406893

    申请日:2006-04-18

    IPC分类号: H01L21/8238

    摘要: The invention includes methods of forming channel region implants for two transistor devices simultaneously, in which a mask is utilized to block a larger percentage of a channel region location of one of the devices relative to the other. The invention also pertains to methods of forming capacitor structures in which a first capacitor electrode is spaced from a semiconductor substrate by a dielectric material, a second capacitor electrode comprises a conductively-doped diffusion region within the semiconductor material, and a capacitor channel region location is beneath the dielectric material and adjacent the conductively-doped diffusion region. An implant mask is formed to cover only a first portion of the capacitor channel region location and to leave a second portion of the capacitor channel region location uncovered. While the implant mask is in place, dopant is implanted into the uncovered second portion of the capacitor channel region location.

    摘要翻译: 本发明包括同时形成两个晶体管器件的沟道区域植入物的方法,其中掩模用于阻挡相对于另一个器件之一的较大百分比的沟道区域位置。 本发明还涉及形成电容器结构的方法,其中第一电容器电极通过电介质材料与半导体衬底隔开,第二电容器电极包括半导体材料内的导电掺杂扩散区,电容器通道区位置为 在介电材料的下方并与导电掺杂的扩散区相邻。 形成注入掩模以仅覆盖电容器沟道区位置的第一部分并且留下未覆盖的电容器沟道区位置的第二部分。 当植入掩模就位时,掺杂剂被注入到电容器通道区域位置的未覆盖的第二部分中。