公开(公告)号：US20090072357A1

公开(公告)日：2009-03-19

申请号：US11854776

申请日：2007-09-13

申请人： Jinbang Tang ,  Darrel R. Frear ,  Jong-Kai Lin

发明人： Jinbang Tang ,  Darrel R. Frear ,  Jong-Kai Lin

IPC分类号： H01L23/552 ,  H01L21/56

CPC分类号： H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3121 ,  H01L23/552 ,  H01L24/19 ,  H01L24/20 ,  H01L24/82 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0655 ,  H01L2224/04105 ,  H01L2224/82039 ,  H01L2224/97 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/3025 ,  H01L2224/82 ,  H01L2924/00

摘要： An electromagnetic interference (EMI) and/or electromagnetic radiation shield is formed on a plurality of encapsulated modules by attaching a plurality of modules (30-33) to a process carrier (10) using a double side adhesive tape (12) before encapsulating the modules with a molding compound (16), and then forming shielding via ring structures (51-54) in the molding compound (16) to surround and shield each module. After removing the adhesive tape (12) to expose a surface of the encapsulated modules, a multi-layer circuit substrate (101) is formed over the exposed surface, where the circuit substrate includes shielding via structures (121-124) that are aligned with and electrically connected to the shielding via ring structures (51-54), thereby encircling and shielding the circuit module(s).

摘要翻译： 在多个封装的模块之间通过使用双面胶带（12）将多个模块（30-33）附接到处理载体（10）上而形成电磁干扰（EMI）和/或电磁辐射屏蔽， 具有模制化合物（16）的模块，然后通过模制化合物（16）中的环形结构（51-54）形成屏蔽以围绕和屏蔽每个模块。 在去除粘合带（12）以暴露封装模块的表面之后，在暴露表面上形成多层电路基板（101），其中电路基板包括屏蔽通孔结构（121-124），其与 并且电连接到屏蔽通孔环结构（51-54），从而环绕和屏蔽电路模块。

公开(公告)号：US20090057849A1

公开(公告)日：2009-03-05

申请号：US11846874

申请日：2007-08-29

申请人： Jinbang Tang ,  Darrel R. Frear ,  William H. Lytle

发明人： Jinbang Tang ,  Darrel R. Frear ,  William H. Lytle

IPC分类号： H01L23/48 ,  H01L21/56

CPC分类号： H01L23/5389 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3114 ,  H01L23/3121 ,  H01L23/5384 ,  H01L23/5385 ,  H01L23/645 ,  H01L23/66 ,  H01L24/19 ,  H01L24/20 ,  H01L24/96 ,  H01L25/0655 ,  H01L25/16 ,  H01L2221/68359 ,  H01L2223/6622 ,  H01L2223/6677 ,  H01L2224/24227 ,  H01L2224/2518 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/19105

摘要： A packaged semiconductor device includes an interconnect layer over a first side of a polymer layer, a semiconductor device surrounded on at least three sides by the polymer layer and coupled to the interconnect layer, a first conductive element over a second side of the polymer layer, wherein the second side is opposite the first side, and a connector block within the polymer layer. The connector block has at least one electrical path extending from a first surface of the connector block to a second surface of the connector block. The at least one electrical path electrically couples the interconnect layer to the first conductive element. A method of forming the packaged semiconductor device is also described.

摘要翻译： 封装的半导体器件包括在聚合物层的第一侧上的互连层，在聚合物层的至少三个侧面上被耦合到互连层的半导体器件，在聚合物层的第二侧上的第一导电元件， 其中所述第二侧与所述第一侧相对，以及所述聚合物层内的连接器块。 连接器块具有从连接器块的第一表面延伸到连接器块的第二表面的至少一个电路径。 所述至少一个电路将所述互连层电耦合到所述第一导电元件。 还描述了形成封装半导体器件的方法。

公开(公告)号：US07763976B2

公开(公告)日：2010-07-27

申请号：US12242550

申请日：2008-09-30

申请人： Jinbang Tang ,  Darrel R. Frear ,  Robert J. Wenzel

发明人： Jinbang Tang ,  Darrel R. Frear ,  Robert J. Wenzel

IPC分类号： H01L23/34

CPC分类号： H01L23/5389 ,  H01L21/568 ,  H01L23/50 ,  H01L24/19 ,  H01L2223/6627 ,  H01L2224/04105 ,  H01L2224/20 ,  H01L2224/96 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/14 ,  H01L2924/1815 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043

摘要： A disclosed integrated circuit (IC) module includes an IC panel and multi level circuit structure, referred to as an IPD structure, overlying an upper surface of the IC panel. The IC panel includes an electrically conductive embedded ground plane (EGP), an integrated circuit (IC) die, and an encapsulating material. The EGP is a substantially planar structure that includes or defines a plurality of cavities. The EGP may include or define an IC cavity and an IPD cavity. The IC die may be positioned within the IC cavity such that a perimeter of the IC cavity surrounds the IC die. The IPD structure may define or include a passive device such as an inductor. The passive device may be positioned or located overlying the void in the EGP.

摘要翻译： 所公开的集成电路（IC）模块包括覆盖在IC面板的上表面上的IC面板和称为IPD结构的多电平电路结构。 IC面板包括导电嵌入式接地平面（EGP），集成电路（IC）裸片和封装材料。 EGP是包括或限定多个空腔的基本上平面的结构。 EGP可以包括或限定IC腔和IPD腔。 IC芯片可以定位在IC腔内，使得IC腔的周边围绕IC管芯。 IPD结构可以定义或包括无源器件，例如电感器。 被动设备可以位于或位于EGP中的空隙上方。

公开(公告)号：US07838420B2

公开(公告)日：2010-11-23

申请号：US11846874

申请日：2007-08-29

申请人： Jinbang Tang ,  Darrel R. Frear ,  William H. Lytle

发明人： Jinbang Tang ,  Darrel R. Frear ,  William H. Lytle

IPC分类号： H01L21/44

CPC分类号： H01L23/5389 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3114 ,  H01L23/3121 ,  H01L23/5384 ,  H01L23/5385 ,  H01L23/645 ,  H01L23/66 ,  H01L24/19 ,  H01L24/20 ,  H01L24/96 ,  H01L25/0655 ,  H01L25/16 ,  H01L2221/68359 ,  H01L2223/6622 ,  H01L2223/6677 ,  H01L2224/24227 ,  H01L2224/2518 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/19105

摘要： A packaged semiconductor device includes an interconnect layer over a first side of a polymer layer, a semiconductor device surrounded on at least three sides by the polymer layer and coupled to the interconnect layer, a first conductive element over a second side of the polymer layer, wherein the second side is opposite the first side, and a connector block within the polymer layer. The connector block has at least one electrical path extending from a first surface of the connector block to a second surface of the connector block. The at least one electrical path electrically couples the interconnect layer to the first conductive element. A method of forming the packaged semiconductor device is also described.

摘要翻译： 封装的半导体器件包括在聚合物层的第一侧上的互连层，在聚合物层的至少三个侧面上被耦合到互连层的半导体器件，在聚合物层的第二侧上的第一导电元件， 其中所述第二侧与所述第一侧相对，以及所述聚合物层内的连接器块。 连接器块具有从连接器块的第一表面延伸到连接器块的第二表面的至少一个电路径。 所述至少一个电路将所述互连层电耦合到所述第一导电元件。 还描述了形成封装半导体器件的方法。

公开(公告)号：US20100006988A1

公开(公告)日：2010-01-14

申请号：US12169964

申请日：2008-07-09

申请人： Jinbang Tang ,  Darrel R. Frear ,  Scott M. Hayes ,  Douglas G. Mitchell

发明人： Jinbang Tang ,  Darrel R. Frear ,  Scott M. Hayes ,  Douglas G. Mitchell

IPC分类号： H01L23/552 ,  H05K3/10

CPC分类号： H05K1/185 ,  H01L21/6835 ,  H01L23/5389 ,  H01L23/552 ,  H01L23/66 ,  H01L24/05 ,  H01L24/19 ,  H01L24/20 ,  H01L24/96 ,  H01L25/0655 ,  H01L25/50 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2224/04105 ,  H01L2224/20 ,  H01L2224/97 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/09701 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/3025 ,  H05K1/0218 ,  H05K3/0052 ,  H05K3/4644 ,  H05K2201/0715 ,  H05K2201/096 ,  H05K2201/09618 ,  H05K2201/09872 ,  H05K2203/0152 ,  H05K2203/1322 ,  H05K2203/1469 ,  Y10T29/49146 ,  Y10T29/49155 ,  Y10T29/53548 ,  H01L2224/82 ,  H01L2924/00

摘要： An integrated conformal electromagnetic interference (EMI) and/or electromagnetic radiation shield is formed on a plurality of encapsulated modules by attaching a plurality of modules (30-33) to a process carrier (1) using a double side adhesive tape (2), and then sequentially depositing an insulating layer (15) and a conductive shielding layer (16) before encapsulating the modules with a molding compound (17). After removing the adhesive tape (2) to expose a surface of the encapsulated modules, a multi-layer circuit substrate (100) is formed over the exposed surface, where the circuit substrate includes shielding via structures (101-112) that are aligned with and electrically connected to the conductive shielding layer (16), thereby encircling and shielding the circuit module(s).

摘要翻译： 通过使用双面胶带（2）将多个模块（30-33）附接到处理载体（1）上而在多个封装模块上形成集成的保形电磁干扰（EMI）和/或电磁辐射屏蔽， 然后在用模塑料（17）封装模块之前依次沉积绝缘层（15）和导电屏蔽层（16）。 在去除粘合带（2）以暴露封装的模块的表面之后，在暴露的表面上形成多层电路基板（100），其中电路基板包括屏蔽通孔结构（101-112） 并且电连接到导电屏蔽层（16），从而环绕和屏蔽电路模块。

公开(公告)号：US07981730B2

公开(公告)日：2011-07-19

申请号：US12169964

申请日：2008-07-09

申请人： Jinbang Tang ,  Darrel R. Frear ,  Scott M. Hayes ,  Douglas G. Mitchell

发明人： Jinbang Tang ,  Darrel R. Frear ,  Scott M. Hayes ,  Douglas G. Mitchell

IPC分类号： H01L23/552 ,  H05K3/10

CPC分类号： H05K1/185 ,  H01L21/6835 ,  H01L23/5389 ,  H01L23/552 ,  H01L23/66 ,  H01L24/05 ,  H01L24/19 ,  H01L24/20 ,  H01L24/96 ,  H01L25/0655 ,  H01L25/50 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2224/04105 ,  H01L2224/20 ,  H01L2224/97 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/09701 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/3025 ,  H05K1/0218 ,  H05K3/0052 ,  H05K3/4644 ,  H05K2201/0715 ,  H05K2201/096 ,  H05K2201/09618 ,  H05K2201/09872 ,  H05K2203/0152 ,  H05K2203/1322 ,  H05K2203/1469 ,  Y10T29/49146 ,  Y10T29/49155 ,  Y10T29/53548 ,  H01L2224/82 ,  H01L2924/00

摘要： An integrated conformal electromagnetic interference (EMI) and/or electromagnetic radiation shield is formed on a plurality of encapsulated modules by attaching a plurality of modules (30-33) to a process carrier (1) using a double side adhesive tape (2), and then sequentially depositing an insulating layer (15) and a conductive shielding layer (16) before encapsulating the modules with a molding compound (17). After removing the adhesive tape (2) to expose a surface of the encapsulated modules, a multi-layer circuit substrate (100) is formed over the exposed surface, where the circuit substrate includes shielding via structures (101-112) that are aligned with and electrically connected to the conductive shielding layer (16), thereby encircling and shielding the circuit module(s).

摘要翻译： 通过使用双面胶带（2）将多个模块（30-33）附接到处理载体（1）上而在多个封装模块上形成集成的保形电磁干扰（EMI）和/或电磁辐射屏蔽， 然后在用模塑料（17）封装模块之前依次沉积绝缘层（15）和导电屏蔽层（16）。 在去除粘合带（2）以暴露封装的模块的表面之后，在暴露的表面上形成多层电路基板（100），其中电路基板包括屏蔽通孔结构（101-112） 并且电连接到导电屏蔽层（16），从而环绕和屏蔽电路模块。

公开(公告)号：US20100078760A1

公开(公告)日：2010-04-01

申请号：US12242550

申请日：2008-09-30

申请人： Jinbang Tang ,  Darrel R. Frear ,  Robert J. Wenzel

发明人： Jinbang Tang ,  Darrel R. Frear ,  Robert J. Wenzel

IPC分类号： H01L29/66 ,  H01L21/00

CPC分类号： H01L23/5389 ,  H01L21/568 ,  H01L23/50 ,  H01L24/19 ,  H01L2223/6627 ,  H01L2224/04105 ,  H01L2224/20 ,  H01L2224/96 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/14 ,  H01L2924/1815 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043

摘要： A disclosed integrated circuit (IC) module includes an IC panel and multi level circuit structure, referred to as an IPD structure, overlying an upper surface of the IC panel. The IC panel includes an electrically conductive embedded ground plane (EGP), an integrated circuit (IC) die, and an encapsulating material. The EGP is a substantially planar structure that includes or defines a plurality of cavities. The EGP may include or define an IC cavity and an IPD cavity. The IC die may be positioned within the IC cavity such that a perimeter of the IC cavity surrounds the IC die. The IPD structure may define or include a passive device such as an inductor. The passive device may be positioned or located overlying the void in the EGP.

摘要翻译： 所公开的集成电路（IC）模块包括覆盖在IC面板的上表面上的IC面板和称为IPD结构的多电平电路结构。 IC面板包括导电嵌入式接地平面（EGP），集成电路（IC）裸片和封装材料。 EGP是包括或限定多个空腔的基本上平面的结构。 EGP可以包括或限定IC腔和IPD腔。 IC芯片可以定位在IC腔内，使得IC腔的周边围绕IC管芯。 IPD结构可以定义或包括无源器件，例如电感器。 被动设备可以位于或位于EGP中的空隙上方。

公开(公告)号：US5300307A

公开(公告)日：1994-04-05

申请号：US944865

申请日：1992-09-14

申请人： Darrel R. Frear ,  Joseph R. Michael ,  Alton D. Romig, Jr.

发明人： Darrel R. Frear ,  Joseph R. Michael ,  Alton D. Romig, Jr.

IPC分类号： C22F1/057 ,  C23C14/18 ,  C23C14/58 ,  H01L21/768 ,  H01L23/532 ,  B05D5/12

CPC分类号： C23C14/5806 ,  C22F1/057 ,  C23C14/185 ,  C23C14/58 ,  C23C14/584 ,  H01L21/76838 ,  H01L23/53214 ,  H01L2924/0002 ,  Y10S438/927

摘要： A process for the forming of Al-Cu conductive thin films with reduced electromigration failures is useful, for example, in the metallization of integrated circuits. An improved formation process includes the heat treatment or annealing of the thin film conductor at a temperature within the range of from 200.degree. C. to 300.degree. C. for a time period between 10 minutes and 24 hours under a reducing atmosphere such as 15% H.sub.2 in N.sub.2 by volume. Al-Cu thin films annealed in the single phase region of a phase diagram, to temperatures between 200.degree. C. and 300.degree. C. have .theta.-phase Al.sub.2 Cu precipitates at the grain boundaries continuously become enriched in copper, due, it is theorized, to the formation of a thin coating of .theta.-phase precipitate at the grain boundary. Electromigration behavior of the aluminum is, thus, improved because the .theta.-phase precipitates with copper hinder aluminum diffusion along the grain boundaries. Electromigration, then, occurs mainly within the aluminum grains, a much slower process.

摘要翻译： 用于形成具有降低的电迁移故障的Al-Cu导电薄膜的方法在例如集成电路的金属化中是有用的。 改进的形成方法包括在200℃至300℃的温度范围内的薄膜导体的热处理或退火在10分钟至24小时之间的时间内在还原气氛下进行，例如15％ H2在N2中的体积。 在相图的单相区域退火的Al-Cu薄膜在200摄氏度到300摄氏度之间的温度下，在晶界处具有（θ）相Al2Cu沉淀物连续地富集铜，因为它是 理论上，在晶界处形成（θ）相沉淀物的薄涂层。 因此，铝的电迁移行为被改善，因为（θ）相在铜上沉淀阻碍了沿着晶界的铝扩散。 那么电迁移主要发生在铝粒内，这是一个很慢的过程。

公开(公告)号：US09638597B2

公开(公告)日：2017-05-02

申请号：US14495095

申请日：2014-09-24

申请人： Stephen R. Hooper ,  Darrel R. Frear ,  Thomas C. Speight

发明人： Stephen R. Hooper ,  Darrel R. Frear ,  Thomas C. Speight

IPC分类号： G01L9/00 ,  G01L13/02 ,  G01L19/04 ,  G01L19/06

CPC分类号： G01L9/0052 ,  G01L13/025 ,  G01L19/04 ,  G01L19/069 ,  H01L2224/48145 ,  H01L2924/1815 ,  H01L2924/00012

摘要： A differential pressure sensor assembly includes a transducer having a first sensing surface and a second sensing surface. The second sensing surface is contained in a cavity. An Integrated Circuit (IC) is hermetically coupled to the transducer. The IC has a first aperture aligned to the cavity. A lead frame is coupled to the IC. The lead frame has a second aperture aligned to the first aperture of the IC. A package encapsulates the transducer, the IC and the lead frame. The package has a third aperture exposed to the first sensing surface. The package includes a molding compound providing a hermetic seal between the third aperture of the package and the first aperture of the IC. The molding compound is separated from the transducer by an encroachment distance.

公开(公告)号：US06630725B1

公开(公告)日：2003-10-07

申请号：US09684576

申请日：2000-10-06

申请人： Shun-Meen Kuo ,  Darrel R. Frear

发明人： Shun-Meen Kuo ,  Darrel R. Frear

IPC分类号： H01L23552

CPC分类号： B81C1/00269 ,  H01L23/10 ,  H01L24/81 ,  H01L24/97 ,  H01L2224/81801 ,  H01L2224/97 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/30107 ,  H01L2924/3025 ,  H01L2224/81

摘要： An electronic component includes a substrate (210, 1510), a device (221, 222) supported by the substrate and including a first bond pad (223, 224, 225, 226), and a cap (231, 232, 631, 731, 732, 1531, 1532) overlying the substrate. The cap includes a second bond pad (241, 242, 243, 244) at an outside surface of the cap, a third bond pad (245, 246, 247, 248) at an inside surface of the cap and electrically coupled to the first bond pad, and an electrically conductive via (251, 252, 254, 751, 752, 753, 754) extending through the cap and electrically coupling together the second and third bond pads.

摘要翻译： 电子部件包括基板（210,1510），由基板支撑并包括第一接合焊盘（223,224,225,226）的盖子（231,232,631,731） ，732,1531,1532）。 所述盖包括在所述盖的外表面处的第二接合焊盘（241,242,243,244），在所述盖的内表面处的第三接合焊盘（245,246,247,248），并且电耦合到所述第一接合焊盘 接合焊盘和延伸穿过盖并电连接在一起的第二和第三接合焊盘的导电通孔（251,252,254,751,752,753,754）。