Control method of nonvolatile memory device
    5.
    发明授权
    Control method of nonvolatile memory device 有权
    非易失性存储器件的控制方法

    公开(公告)号:US08908431B2

    公开(公告)日:2014-12-09

    申请号:US13607038

    申请日:2012-09-07

    摘要: According to example embodiments, a control method of a nonvolatile memory device, which includes a plurality of memory blocks on a substrate, each memory block including a plurality of sub blocks stacked in a direction perpendicular to the substrate and being configured to be erased independently and each sub block including a plurality of memory cells stacked in the direction perpendicular to the substrate. The control method includes comparing a count value of a first memory block with a reference value, the count value determined according to the number of program, read, or erase operations executed at the first memory block after data is programmed in the first memory block; and if the count value is greater than or equal to the reference value, performing a reprogram operation in which data programmed in first the memory block is read and the read data is programmed in a second memory block.

    摘要翻译: 根据示例性实施例,一种非易失性存储器件的控制方法,其包括在衬底上的多个存储块,每个存储块包括沿垂直于衬底的方向堆叠的多个子块,并且被配置为独立擦除, 每个子块包括在垂直于衬底的方向上堆叠的多个存储单元。 控制方法包括将第一存储块的计数值与参考值进行比较,所述计数值根据在第一存储器块中的数据被编程之后在第一存储器块执行的程序,读取或擦除操作的数量确定; 并且如果所述计数值大于或等于所述参考值,则执行重新编程操作,其中在第一存储器块中编程的数据被读取并且所读取的数据被编程在第二存储器块中。

    Nonvolatile memory devices, operating methods thereof and memory systems including the same
    6.
    发明授权
    Nonvolatile memory devices, operating methods thereof and memory systems including the same 有权
    非易失性存储器件,其操作方法和包括其的存储器系统

    公开(公告)号:US09324440B2

    公开(公告)日:2016-04-26

    申请号:US14631341

    申请日:2015-02-25

    摘要: The inventive concept relates to a nonvolatile memory device and methods for operating the same. The nonvolatile memory device comprises a plurality of strings arranged in rows and columns on a substrate, each string including at least one ground select transistor, a plurality of memory cells and at least one string select transistor sequentially stacked on the substrate. The method comprises erasing first memory cells corresponding to an erasure failed row and inhibiting erasure of second memory cells corresponding to an erasure passed row, and performing an erasure verification by a unit of each row with respect to the first memory cells.

    摘要翻译: 本发明构思涉及非易失性存储器件及其操作方法。 非易失性存储器件包括在衬底上以行和列布置的多个串,每个串包括至少一个接地选择晶体管,多个存储器单元和顺序堆叠在衬底上的至少一个串选择晶体管。 该方法包括:擦除对应于擦除失败行的第一存储单元,并禁止对与擦除通过的行相对应的第二存储单元的擦除,并以相对于第一存储单元的每行为单位进行擦除验证。

    Data storage system having multi-bit memory device and operating method thereof
    7.
    发明授权
    Data storage system having multi-bit memory device and operating method thereof 有权
    具有多位存储装置的数据存储系统及其操作方法

    公开(公告)号:US08976587B2

    公开(公告)日:2015-03-10

    申请号:US13737140

    申请日:2013-01-09

    摘要: The operating method of a data storage device includes storing data in a buffer memory according to an external request, and determining whether the data stored in the buffer memory is data accompanying a buffer program operation of a memory cell array. When the data stored in the buffer memory is data accompanying the buffer program operation, the method further includes determining whether a main program operation on the memory cell array is required, and when a main program operation on the memory cell array is required, determining a program pattern of the main program operation on the memory cell array. The method further includes issuing a set of commands for the main program operation on the memory cell array to a multi-bit memory device based on the determined program pattern.

    摘要翻译: 数据存储装置的操作方法包括根据外部请求将数据存储在缓冲存储器中,并且确定存储在缓冲存储器中的数据是否是伴随存储器单元阵列的缓冲器程序操作的数据。 当存储在缓冲存储器中的数据是与缓冲器程序操作相关的数据时,该方法还包括确定是否需要对存储单元阵列的主程序操作,以及当需要存储单元阵列的主程序操作时, 存储单元阵列中的主程序操作的程序模式。 该方法还包括基于所确定的程序模式向存储器单元阵列发出用于主程序操作的一组命令到多位存储器件。

    Nonvolatile memory devices and programming methods thereof in which a program inhibit voltage is changed during programming
    9.
    发明授权
    Nonvolatile memory devices and programming methods thereof in which a program inhibit voltage is changed during programming 有权
    在编程期间改变程序禁止电压的非易失性存储器件及其编程方法

    公开(公告)号:US08588002B2

    公开(公告)日:2013-11-19

    申请号:US12830903

    申请日:2010-07-06

    申请人: Jinman Han

    发明人: Jinman Han

    IPC分类号: G11C16/04

    摘要: Provided are nonvolatile memory devices and programming methods thereof. A non-volatile memory device is programmed by performing a plurality of programming loops on memory cells in a memory cell array and changing a program inhibit voltage applied to bit lines of the memory cells that have completed programming while performing the plurality of programming loops.

    摘要翻译: 提供了非易失性存储器件及其编程方法。 通过在存储单元阵列中的存储器单元上执行多个编程循环并改变在执行多个编程循环时施加到已完成编程的存储器单元的位线的程序禁止电压来编程非易失性存储器件。

    NONVOLATILE MEMORY DEVICES, OPERATING METHODS THEREOF AND MEMORY SYSTEMS INCLUDING THE SAME
    10.
    发明申请
    NONVOLATILE MEMORY DEVICES, OPERATING METHODS THEREOF AND MEMORY SYSTEMS INCLUDING THE SAME 有权
    非易失性存储器件,其操作方法和包括其的存储器系统

    公开(公告)号:US20110194357A1

    公开(公告)日:2011-08-11

    申请号:US12985695

    申请日:2011-01-06

    IPC分类号: G11C16/04

    摘要: Nonvolatile memory device, operating methods thereof, and memory systems including the same. In the operating method, a ground select line of a first string connected to a bit line may be floated. An erase prohibition voltage may be applied to a ground select line of a second string connected to the bit line. An erase operation voltage may be applied to the first and second strings.

    摘要翻译: 非易失性存储器件,其操作方法和包括该非易失性存储器件的存储器系统。 在操作方法中,连接到位线的第一串的接地选择线可以浮置。 可以将擦除禁止电压施加到连接到位线的第二串的接地选择线。 可以将擦除操作电压施加到第一和第二串。