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11 条记录 (耗时 0.021 秒)

    Method of additive circuitization of circuit boards with high adhesion, voidless copper leads
    1.
    发明授权
    Method of additive circuitization of circuit boards with high adhesion, voidless copper leads 失效
    具有高附着力的无电镀铜导线的电路板的附加电路化方法

    公开(公告)号：US5166037A

    公开(公告)日：1992-11-24

    申请号：US655479

    申请日：1991-02-14

    申请人： John M. Atkinson ,  Russell E. Darrow ,  John D. Larnerd ,  Ronald J. Moore

    发明人： John M. Atkinson ,  Russell E. Darrow ,  John D. Larnerd ,  Ronald J. Moore

    IPC分类号： H05K3/18

    CPC分类号： H05K3/184

    摘要： Disclosed is a method of fabricating a microelectronic package, especially a microelectronic package having copper circuitization on a dielectric substrate. The method includes the steps of depositing, imaging, developing the photoresist for additive circuitization, and forming a pattern of copper circuitization on the so exposed portions of the package. In order to avoid the formation of deleterious air bubbles on the exposed walls of the imaged and developed resist, the panel is exposed to and wetted by a liquid mist.

    摘要翻译： 公开了一种制造微电子封装的方法，特别是在电介质基片上具有铜电路化的微电子封装。 该方法包括沉积，成像，显影用于附加电路化的光致抗蚀剂，并且在封装的暴露部分上形成铜电路图案。 为了避免在成像和显影的抗蚀剂的暴露的壁上形成有害的气泡，面板被液雾暴露和润湿。

    Apparatus for connecting contact pins to a substrate
    2.
    发明授权
    Apparatus for connecting contact pins to a substrate 失效
    用于将接触针连接到基底的装置

    公开(公告)号：US4550493A

    公开(公告)日：1985-11-05

    申请号：US578147

    申请日：1984-02-08

    申请人： Russell E. Darrow ,  Glenn J. Ingraham ,  John D. Larnerd ,  Robert W. Nesky

    发明人： Russell E. Darrow ,  Glenn J. Ingraham ,  John D. Larnerd ,  Robert W. Nesky

    IPC分类号： H01R43/20 ,  H05K3/32

    CPC分类号： H01R43/205 ,  Y10T29/4914 ,  Y10T29/49153 ,  Y10T29/49943 ,  Y10T29/53174 ,  Y10T29/53209

    摘要： A machine for forming a head and a bulge on a copper pin and to connect the pin to a ceramic substrate by a single application of impact force at high velocity and controlled energy conditions includes an air cylinder within which a piston of controlled mass moves due to the effect of compressed air stored in an accumulator. A die block includes a two dimensional array of holes into which are fitted pin blanks that extend above the surface of the die block and on which is fitted a substrate having an identical array of pin holes formed therein. The pins are fitted within the die block and on the substrate such that a predetermined length of the pin blank extends above the surface of the substrate and a controlled length of the pin blanks extends between the substrate and the die block. The pins are retained within the die against axial movement and the holes in the substrate and die block provide radial restraint to the pins following the application of the impact force. The substrate is elastically supported to deflect after impact while the pin head and bulge are forming.

    摘要翻译： 一种用于在铜销上形成头部和凸起并且通过在高速度和受控能量条件下单次施加冲击力将销连接到陶瓷衬底的机器包括气缸，受控质量的活塞由于 存储在蓄能器中的压缩空气的影响。 模块包括孔的二维阵列，其中嵌入销坯，其在模块的表面上方延伸，并且其上装配有在其中形成有相同排列的销孔的基板。 销钉安装在模具块内和基板上，使得销坯的预定长度在基板的表面上方延伸，并且销坯的受控长度在基板和模具块之间延伸。 销被保持在模具内以防止轴向移动，并且在施加冲击力之后，基板和模块中的孔向销提供径向约束。 在形成销头和凸起的同时，基板被弹性地支撑在冲击之后偏转。

    Solder leveling technique
    3.
    发明授权
    Solder leveling technique 失效
    焊锡平整技术

    公开(公告)号：US4676426A

    公开(公告)日：1987-06-30

    申请号：US837817

    申请日：1986-03-10

    申请人： Russell E. Darrow ,  Alan J. Emerick ,  John D. Larnerd

    发明人： Russell E. Darrow ,  Alan J. Emerick ,  John D. Larnerd

    IPC分类号： B23K1/00 ,  H01R12/04 ,  H01R12/32 ,  H01R43/02 ,  H05K3/24 ,  H05K3/34 ,  B23K31/00

    CPC分类号： H05K3/3468 ,  H05K2201/09472 ,  H05K2201/10303 ,  H05K2203/044 ,  H05K2203/1476 ,  H05K3/3489

    摘要： A method of solder leveling in printed circuit boards or other circuitized substrates. Flux is first applied to the surface of the substrate to be soldered. Molten solder is then applied to the fluxed surface after which the soldered substrate is cooled to a temperature below 300.degree. F. Molten solder is then again applied to the previously soldered surface of the substrate. This last step results in leveling the solder first applied to the substrate, including removal of any solder balls which had been formed over recessed pins and flush filling of passage holes formed in the substrate. The method can be performed without regard to the surface condition of the substrate, the composition of flux and solder, whether the substrate is of the thin film type or of the thick film type, nor whether dip soldering or wave soldering techniques are used. The invention also incompasses the end product resulting from use of the method.

    摘要翻译： 一种印刷电路板或其它电路化基板中焊料平整的方法。 首先将焊剂施加到待焊接的基板的表面上。 然后将熔融的焊料施加到焊剂表面，然后将焊接的基材冷却至低于300°F的温度。然后将熔融的焊料再次施加到衬底的先前焊接的表面。 最后一步将导致焊料首先施加到基板上，包括去除已经形成在凹陷销上的任何焊球，并且冲洗填充形成在基板中的通孔。 该方法可以不考虑衬底的表面状态，焊剂和焊料的组成，衬底是薄膜型还是厚膜型，而不管是使用浸焊还是波峰焊技术。 本发明也不兼容使用该方法产生的最终产品。

    Structure containing a layer consisting of a polyimide and an organic filled and method for producing such a structure
    6.
    发明授权
    Structure containing a layer consisting of a polyimide and an organic filled and method for producing such a structure 失效
    含有由聚酰亚胺和有机填料组成的层的结构体及其制造方法

    公开(公告)号：US4670325A

    公开(公告)日：1987-06-02

    申请号：US881586

    申请日：1986-07-02

    申请人： Peter Bakos ,  Russell E. Darrow ,  Nelson P. Franchak ,  Joseph Funari

    发明人： Peter Bakos ,  Russell E. Darrow ,  Nelson P. Franchak ,  Joseph Funari

    IPC分类号： H01L23/498 ,  H05K1/00 ,  H05K1/03 ,  H05K3/46

    CPC分类号： H01L23/49883 ,  H05K3/4676 ,  H01L2924/0002 ,  H05K1/0306 ,  H05K2201/0154 ,  H05K2201/0209 ,  H05K3/467 ,  Y10S428/901 ,  Y10T428/24917 ,  Y10T428/31681

    摘要： A structure comprising on a substrate successive layers of metal circuitry having therebetween as a dielectric a cured polyimide composition containing a polyimide and aluminum oxide or zinc oxide or mixtures thereof.The structure is produced by a method including the following process steps:blanket screen printing a mixture containing a polyamido carboxylic acid, aluminum oxide or zinc oxide or mixtures thereof and a detackifier with the rest being a solvent on a substrate with a layer of metal circuitry thereon,drying the deposited layer at a temperature between about 25.degree. and about 120.degree. C.,selectively etching holes into the deposited layer where vias between adjacent layers of metal circuitry are needed,curing the deposited layer at a temperature between about 300.degree. and about 400.degree. C. andforming another layer of metal circuitry.

    摘要翻译： 一种结构，其包括在基底上连续的金属电路层，其间具有包含聚酰亚胺和氧化铝或氧化锌或其混合物的固化的聚酰亚胺组合物作为电介质。 该结构通过包括以下方法步骤的方法制备：将丝网印刷包含聚酰胺羧酸，氧化铝或氧化锌或其混合物的混合物，和其它的脱粘剂，其中的溶剂在具有金属电路层的基材上 在其上在约25℃至约120℃的温度下干燥沉积层，选择性地将孔蚀刻到需要金属电路相邻层之间的通孔的沉积层中，在约300°和 约400℃，形成另一层金属电路。