公开(公告)号：US20080203585A1

公开(公告)日：2008-08-28

申请号：US12113108

申请日：2008-04-30

申请人： Keith E. Fogel ,  Balaram Ghosal ,  Sung K. Kang ,  Stephen Kilpatrick ,  Paul A. Lauro ,  Henry A. Nye ,  Da-Yuan Shih ,  Donna S. Zupanski-Nielsen

发明人： Keith E. Fogel ,  Balaram Ghosal ,  Sung K. Kang ,  Stephen Kilpatrick ,  Paul A. Lauro ,  Henry A. Nye ,  Da-Yuan Shih ,  Donna S. Zupanski-Nielsen

IPC分类号： H01L23/52

CPC分类号： H01L24/05 ,  H01L24/03 ,  H01L24/11 ,  H01L24/12 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/119 ,  H01L2224/13023 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01055 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/30107 ,  H01L2924/00014

摘要： An interconnection structure suitable for flip-chip attachment of microelectronic device chips to packages, comprising a two, three or four layer ball-limiting composition including an adhesion/reaction barrier layer, and having a solder wettable layer reactive with components of a tin-containing lead free solder, so that the solderable layer can be totally consumed during soldering, but a barrier layer remains after being placed in contact with the lead free solder during soldering. One or more lead-free solder balls is selectively situated on the solder wetting layer, the lead-free solder balls comprising tin as a predominant component and one or more alloying components.

公开(公告)号：US20080202792A1

公开(公告)日：2008-08-28

申请号：US12113195

申请日：2008-04-30

申请人： Keith E. Fogel ,  Balaram Ghosal ,  Sung K. Kang ,  Stephen Kilpatrick ,  Paul A. Lauro ,  Henry A. Nye ,  Da-Yuan Shih ,  Donna S. Zupanski-Nielsen

发明人： Keith E. Fogel ,  Balaram Ghosal ,  Sung K. Kang ,  Stephen Kilpatrick ,  Paul A. Lauro ,  Henry A. Nye ,  Da-Yuan Shih ,  Donna S. Zupanski-Nielsen

IPC分类号： H01B5/00

CPC分类号： H01L24/05 ,  H01L24/03 ,  H01L24/11 ,  H01L24/12 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/119 ,  H01L2224/13023 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01055 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/30107 ,  H01L2924/00014

摘要： An interconnection structure suitable for flip-chip attachment of microelectronic device chips to packages, comprising a two, three or four layer ball-limiting composition including an adhesion/reaction barrier layer, and having a solder wettable layer reactive with components of a tin-containing lead free solder, so that the solderable layer can be totally consumed during soldering, but a barrier layer remains after being placed in contact with the lead free solder during soldering. One or more lead-free solder balls is selectively situated on the solder wetting layer, the lead-free solder balls comprising tin as a predominant component and one or more alloying components.

公开(公告)号：US07923849B2

公开(公告)日：2011-04-12

申请号：US12113152

申请日：2008-04-30

申请人： Keith E. Fogel ,  Balaram Ghosal ,  Sung K. Kang ,  Stephen Kilpatrick ,  Paul A. Lauro ,  Henry A. Nye, III ,  Da-Yuan Shih ,  Donna S. Zupanski-Nielsen

发明人： Keith E. Fogel ,  Balaram Ghosal ,  Sung K. Kang ,  Stephen Kilpatrick ,  Paul A. Lauro ,  Henry A. Nye, III ,  Da-Yuan Shih ,  Donna S. Zupanski-Nielsen

IPC分类号： H01L21/00

CPC分类号： H01L24/05 ,  H01L24/03 ,  H01L24/11 ,  H01L24/12 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/119 ,  H01L2224/13023 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01055 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/30107 ,  H01L2924/00014

摘要： An interconnection structure suitable for flip-chip attachment of microelectronic device chips to packages, comprising a two, three or four layer ball-limiting composition including an adhesion/reaction barrier layer, and having a solder wettable layer reactive with components of a tin-containing lead free solder, so that the solderable layer can be totally consumed during soldering, but a barrier layer remains after being placed in contact with the lead free solder during soldering. One or more lead-free solder balls is selectively situated on the solder wetting layer, the lead-free solder balls comprising tin as a predominant component and one or more alloying components.

摘要翻译： 一种适于将微电子器件芯片倒装连接到封装的互连结构，包括二层，三层或四层限球组合物，包括粘附/反应阻挡层，并且具有与含锡的组分反应的焊料可湿性层 无铅焊料，使得可焊接层在焊接期间可以完全消耗，但在焊接期间与无铅焊料接触后，阻挡层保持不变。 一个或多个无铅焊料球选择性地位于焊料润湿层上，该无铅焊球包含锡作为主要成分和一种或多种合金成分。

公开(公告)号：US20120012642A1

公开(公告)日：2012-01-19

申请号：US13244576

申请日：2011-09-25

申请人： Keith E. Fogel ,  Balaram Ghosal ,  Sung K. Kang ,  Stephen Kilpatrick ,  Paul A. Lauro ,  Henry A. Nye, III ,  Da-Yuan Shih ,  Donna S. Zupanski-Nielsen

发明人： Keith E. Fogel ,  Balaram Ghosal ,  Sung K. Kang ,  Stephen Kilpatrick ,  Paul A. Lauro ,  Henry A. Nye, III ,  Da-Yuan Shih ,  Donna S. Zupanski-Nielsen

IPC分类号： B23K35/14 ,  B23K35/24

CPC分类号： H01L24/05 ,  H01L24/03 ,  H01L24/11 ,  H01L24/12 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/119 ,  H01L2224/13023 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01055 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/30107 ,  H01L2924/00014

摘要： An interconnection structure suitable for flip-chip attachment of microelectronic device chips to packages, comprising a two, three or four layer ball-limiting composition including an adhesion/reaction barrier layer, and having a solder wettable layer reactive with components of a tin-containing lead free solder, so that the solderable layer can be totally consumed during soldering, but a barrier layer remains after being placed in contact with the lead free solder during soldering. One or more lead-free solder balls is selectively situated on the solder wetting layer, the lead-free solder balls comprising tin as a predominant component and one or more alloying components. With a two-layer ball-limiting composition comprising an adhesion/reaction barrier layer, wherein the adhesion/reaction barrier layer serves both as an adhesion layer and a reaction barrier layer, the adhesion/reaction barrier layer can be comprised of a material selected from the group consisting of Zr and ZrN

摘要翻译： 一种适于将微电子器件芯片倒装连接到封装的互连结构，包括二层，三层或四层限球组合物，包括粘附/反应阻挡层，并且具有与含锡的组分反应的焊料可湿性层 无铅焊料，使得可焊接层在焊接期间可以完全消耗，但在焊接期间与无铅焊料接触后，阻挡层保持不变。 一个或多个无铅焊料球选择性地位于焊料润湿层上，该无铅焊球包含锡作为主要成分和一种或多种合金成分。 使用包含粘合/反应阻挡层的双层球限制组合物，其中粘附/反应阻挡层既用作粘合层又用作反应阻挡层，粘合/反应阻挡层可以由选自 由Zr和ZrN组成的组

公开(公告)号：US08026613B2

公开(公告)日：2011-09-27

申请号：US12113108

申请日：2008-04-30

申请人： Keith E. Fogel ,  Balaram Ghosal ,  Sung K. Kang ,  Stephen Kilpatrick ,  Paul A. Lauro ,  Henry A. Nye, III ,  Da-Yuan Shih ,  Donna S. Zupanski-Nielsen

发明人： Keith E. Fogel ,  Balaram Ghosal ,  Sung K. Kang ,  Stephen Kilpatrick ,  Paul A. Lauro ,  Henry A. Nye, III ,  Da-Yuan Shih ,  Donna S. Zupanski-Nielsen

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/05 ,  H01L24/03 ,  H01L24/11 ,  H01L24/12 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/119 ,  H01L2224/13023 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01055 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/30107 ,  H01L2924/00014

摘要： An interconnection structure suitable for flip-chip attachment of microelectronic device chips to packages, comprising a two, three or four layer ball-limiting composition including an adhesion/reaction barrier layer, and having a solder wettable layer reactive with components of a tin-containing lead free solder, so that the solderable layer can be totally consumed during soldering, but a barrier layer remains after being placed in contact with the lead free solder during soldering. One or more lead-free solder balls is selectively situated on the solder wetting layer, the lead-free solder balls comprising tin as a predominant component and one or more alloying components. With a two-layer ball-limiting composition comprising an adhesion/reaction barrier layer, wherein the adhesion/reaction barrier layer serves both as an adhesion layer and a reaction barrier layer, the adhesion/reaction barrier layer can be comprised of a material selected from the group consisting of Zr and ZrN.

摘要翻译： 一种适于将微电子器件芯片倒装连接到封装的互连结构，包括二层，三层或四层限球组合物，包括粘附/反应阻挡层，并且具有与含锡的组分反应的焊料可湿性层 无铅焊料，使得可焊接层在焊接期间可以完全消耗，但在焊接期间与无铅焊料接触后，阻挡层保持不变。 一个或多个无铅焊料球选择性地位于焊料润湿层上，该无铅焊球包含锡作为主要成分和一种或多种合金成分。 使用包含粘合/反应阻挡层的双层球限制组合物，其中粘附/反应阻挡层既用作粘合层又用作反应阻挡层，粘合/反应阻挡层可以由选自 由Zr和ZrN组成的组。

公开(公告)号：US20080206979A1

公开(公告)日：2008-08-28

申请号：US12113152

申请日：2008-04-30

申请人： Keith E. Fogel ,  Balaram Ghosal ,  Sung K. Kang ,  Stephen Kilpatrick ,  Paul A. Lauro ,  Henry A. Nye ,  Da-Yuan Shih ,  Donna S. Zupanski-Nielsen

发明人： Keith E. Fogel ,  Balaram Ghosal ,  Sung K. Kang ,  Stephen Kilpatrick ,  Paul A. Lauro ,  Henry A. Nye ,  Da-Yuan Shih ,  Donna S. Zupanski-Nielsen

IPC分类号： H01L21/60

CPC分类号： H01L24/05 ,  H01L24/03 ,  H01L24/11 ,  H01L24/12 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/119 ,  H01L2224/13023 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01055 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/30107 ,  H01L2924/00014

摘要： An interconnection structure suitable for flip-chip attachment of microelectronic device chips to packages, comprising a two, three or four layer ball-limiting composition including an adhesion/reaction barrier layer, and having a solder wettable layer reactive with components of a tin-containing lead free solder, so that the solderable layer can be totally consumed during soldering, but a barrier layer remains after being placed in contact with the lead free solder during soldering. One or more lead-free solder balls is selectively situated on the solder wetting layer, the lead-free solder balls comprising tin as a predominant component and one or more alloying components.

摘要翻译： 一种适于将微电子器件芯片倒装连接到封装的互连结构，包括二层，三层或四层限球组合物，包括粘附/反应阻挡层，并且具有与含锡的组分反应的焊料可湿性层 无铅焊料，使得可焊接层在焊接期间可以完全消耗，但在焊接期间与无铅焊料接触后，阻挡层保持不变。 一个或多个无铅焊料球选择性地位于焊料润湿层上，该无铅焊球包含锡作为主要成分和一种或多种合金成分。

公开(公告)号：US07410833B2

公开(公告)日：2008-08-12

申请号：US10815103

申请日：2004-03-31

申请人： Keith E. Fogel ,  Balaram Ghosal ,  Sung K. Kang ,  Stephen Kilpatrick ,  Paul A. Lauro ,  Henry A. Nye, III ,  Da-Yuan Shih ,  Donna S. Zupanski-Nielsen

发明人： Keith E. Fogel ,  Balaram Ghosal ,  Sung K. Kang ,  Stephen Kilpatrick ,  Paul A. Lauro ,  Henry A. Nye, III ,  Da-Yuan Shih ,  Donna S. Zupanski-Nielsen

IPC分类号： H01L23/48

CPC分类号： H01L24/05 ,  H01L24/03 ,  H01L24/11 ,  H01L24/12 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/119 ,  H01L2224/13023 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01055 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/30107 ,  H01L2924/00014

摘要： An interconnection structure suitable for flip-chip attachment of microelectronic device chips to packages, comprising a two, three or four layer ball-limiting composition including an adhesion/reaction barrier layer, and having a solder wettable layer reactive with components of a tin-containing lead free solder, so that the solderable layer can be totally consumed during soldering, but a barrier layer remains after being placed in contact with the lead free solder during soldering. One or more lead-free solder balls is selectively situated on the solder wetting layer, the lead-free solder balls comprising tin as a predominant component and one or more alloying components.

摘要翻译： 一种适于将微电子器件芯片倒装连接到封装的互连结构，包括二层，三层或四层限球组合物，包括粘附/反应阻挡层，并且具有与含锡的组分反应的焊料可湿性层 无铅焊料，使得可焊接层在焊接期间可以完全消耗，但在焊接期间与无铅焊料接触后，阻挡层保持不变。 一个或多个无铅焊料球选择性地位于焊料润湿层上，该无铅焊球包含锡作为主要成分和一种或多种合金成分。

公开(公告)号：US5371654A

公开(公告)日：1994-12-06

申请号：US963346

申请日：1992-10-19

申请人： Brian S. Beaman ,  Fuad E. Doany ,  Keith E. Fogel ,  James L. Hedrick, Jr. ,  Paul A. Lauro ,  Maurice H. Norcott ,  John J. Ritsko ,  Leathen Shi ,  Da-Yuan Shih ,  George F. Walker

发明人： Brian S. Beaman ,  Fuad E. Doany ,  Keith E. Fogel ,  James L. Hedrick, Jr. ,  Paul A. Lauro ,  Maurice H. Norcott ,  John J. Ritsko ,  Leathen Shi ,  Da-Yuan Shih ,  George F. Walker

IPC分类号： H01L23/52 ,  G01R1/067 ,  G01R1/073 ,  G01R3/00 ,  G01R31/28 ,  H01L23/498 ,  H01L23/538 ,  H01L25/065 ,  H01L25/07 ,  H01L25/18 ,  H05K7/00

CPC分类号： G01R1/07371 ,  G01R1/07307 ,  G01R1/07314 ,  G01R1/07342 ,  G01R3/00 ,  G01R31/2886 ,  H01L23/49827 ,  H01L23/5384 ,  H01L25/0652 ,  G01R1/06711 ,  G01R1/0675 ,  G01R1/07378 ,  H01L2224/1134 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45155 ,  H01L2224/45164 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/78301 ,  H01L2224/85205 ,  H01L2224/85214 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/00013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15192 ,  H01L2924/1627 ,  H01L2924/19107 ,  H01L2924/3011 ,  Y10S29/029 ,  Y10T29/49004 ,  Y10T29/49126 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49158 ,  Y10T29/49162 ,  Y10T29/49192 ,  Y10T29/53174

摘要： The present invention is directed to a structure for packaging electronic devices, such as semiconductor chips, in a three dimensional structure which permits electrical signals to propagate both horizontally and vertically. The structure is formed from a plurality of assemblies. Each assembly is formed from a substrate having disposed on at least one surface a plurality of electronic devices. Each assembly is disposed in a stack of adjacent assemblies. Between adjacent assemblies there is an electrical interconnection electrically interconnecting each assembly. The electrical interconnection formed from an elastomeric interposer having a plurality of apertures extending therethrough. The array of apertures corresponds to the array of electronic devices on the substrates. The aperture and electrical interconnection is disposed over the array of electronic devices so that the electrical interconnection between adjacent electronic devices. The stack of assemblies is compressed thereby compressing the electrical interconnection between adjacent assemblies. Methods for fabricating the electrical interconnection as a stand alone elastomeric sheet are described.

摘要翻译： 本发明涉及用于将三维结构中的诸如半导体芯片的电子器件封装在一起的结构，其允许电信号水平和垂直地传播。 该结构由多个组件形成。 每个组件由在多个电子装置的至少一个表面上设置的基板形成。 每个组件设置在相邻组件的堆叠中。 在相邻组件之间存在电互连，每个组件电连接。 由具有延伸穿过其中的多个孔的弹性体插入件形成的电互连。 孔阵列对应于基片上的电子器件阵列。 孔和电互连布置在电子器件阵列上，使得相邻电子器件之间的电互连。 组合堆叠被压缩，从而压缩相邻组件之间的电互连。 描述了用于制造作为独立弹性片的电互连的方法。

公开(公告)号：US5635846A

公开(公告)日：1997-06-03

申请号：US55485

申请日：1993-04-30

申请人： Brian S. Beaman ,  Keith E. Fogel ,  Paul A. Lauro ,  Maurice H. Norcott ,  Da-Yuan Shih ,  George F. Walker

发明人： Brian S. Beaman ,  Keith E. Fogel ,  Paul A. Lauro ,  Maurice H. Norcott ,  Da-Yuan Shih ,  George F. Walker

IPC分类号： H01L23/52 ,  G01R1/067 ,  G01R1/073 ,  G01R3/00 ,  G01R31/28 ,  H01L23/498 ,  H01L23/538 ,  H01L25/065 ,  H01L25/07 ,  H01L25/18 ,  G01R31/02

CPC分类号： G01R1/07371 ,  G01R1/07307 ,  G01R1/07314 ,  G01R1/07342 ,  G01R3/00 ,  G01R31/2886 ,  H01L23/49827 ,  H01L23/5384 ,  H01L25/0652 ,  G01R1/06711 ,  G01R1/0675 ,  G01R1/07378 ,  H01L2224/1134 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45155 ,  H01L2224/45164 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/78301 ,  H01L2224/85205 ,  H01L2224/85214 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/00013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15192 ,  H01L2924/1627 ,  H01L2924/19107 ,  H01L2924/3011 ,  Y10S29/029 ,  Y10T29/49004 ,  Y10T29/49126 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49158 ,  Y10T29/49162 ,  Y10T29/49192 ,  Y10T29/53174

摘要： A high density test probe is for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires. The elastomer is cured and the mold is removed, leaving an array of wires disposed in the elastomer and in electrical contact with the space transformer The space transformer can have an array of pins which are on the opposite surface of the space transformer opposite to that on which the elongated conductors are bonded. The pins are inserted into a socket on a second space transformer, such as a printed circuit board to form a probe assembly. Alternatively, an interposer electrical connector can be disposed between the first and second space transformer.

摘要翻译： 高密度测试探头用于测试晶圆形式的高密度和高性能集成电路或分立芯片。 测试探针由嵌入柔性或高模量弹性体材料的细长电导体的密集阵列形成。 使用陶瓷集成电路芯片封装基板等标准封装基板来提供空间变压器。 电线被连接到空间变压器表面上的接触焊盘阵列。 空间变压器由多层集成电路芯片封装基板形成。 电线与接触位置阵列一样密集。 围绕着向外突出的线的阵列设置模具。 液体弹性体设置在模具中以填充电线之间的空间。 弹性体被固化并且模具被去除，留下布置在弹性体中并且与空间变压器电接触的线阵列。空间变压器可以具有一组引脚，这些引脚位于空间变压器的相反表面上， 其中细长导体被接合。 这些销插入第二空间变压器（例如印刷电路板）上的插座中以形成探针组件。 或者，插入器电连接器可以设置在第一和第二空间变压器之间。

公开(公告)号：US5531022A

公开(公告)日：1996-07-02

申请号：US300620

申请日：1994-09-02

申请人： Brain S. Beaman ,  Fuad E. Doany ,  Keith E. Fogel ,  James L. Hedrick, Jr. ,  Paul A. Lauro ,  Maurice H. Norcott ,  John J. Ritsko ,  Leathen Shi ,  Da-Yuan Shih ,  George F. Walker

发明人： Brain S. Beaman ,  Fuad E. Doany ,  Keith E. Fogel ,  James L. Hedrick, Jr. ,  Paul A. Lauro ,  Maurice H. Norcott ,  John J. Ritsko ,  Leathen Shi ,  Da-Yuan Shih ,  George F. Walker

IPC分类号： H01L23/52 ,  G01R1/067 ,  G01R1/073 ,  G01R3/00 ,  G01R31/28 ,  H01L23/498 ,  H01L23/538 ,  H01L25/065 ,  H01L25/07 ,  H01L25/18 ,  H05K3/40 ,  H01R9/09

CPC分类号： G01R1/07371 ,  G01R1/07307 ,  G01R1/07314 ,  G01R1/07342 ,  G01R3/00 ,  G01R31/2886 ,  H01L23/49827 ,  H01L23/5384 ,  H01L25/0652 ,  G01R1/06711 ,  G01R1/0675 ,  G01R1/07378 ,  H01L2224/1134 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45155 ,  H01L2224/45164 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/78301 ,  H01L2224/85205 ,  H01L2224/85214 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/00013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15192 ,  H01L2924/1627 ,  H01L2924/19107 ,  H01L2924/3011 ,  Y10S29/029 ,  Y10T29/49004 ,  Y10T29/49126 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49158 ,  Y10T29/49162 ,  Y10T29/49192 ,  Y10T29/53174

摘要： The present invention is directed to a structure for packaging electronic devices, such as semiconductor chips, in a three dimensional structure which permits electrical signals to propagate both horizontally and vertically. The structure is formed from a plurality of assemblies. Each assembly is formed from a substrate having disposed on at least one surface a plurality of electronic devices. Each assembly is disposed in a stack of adjacent assemblies. Between adjacent assemblies there is an electrical interconnection means electrically interconnecting each assembly. The electrical interconnection means is formed from an elastomeric interposer. The elastomeric interposer is formed from an elastomeric material having a plurality of electrical conductors extending therethrough, either in a clustered or un-clustered arrangement. The electrical interconnection means is fabricated having a plurality of apertures extending therethrough. The array of apertures corresponds to the array of electronic devices on the substrates. The aperture and electrical interconnection means is disposed over the array of electronic devices so that the electrical interconnection means is between adjacent electronic devices. The stack of assemblies is compressed thereby compressing the electrical interconnection means between adjacent assemblies. The substrate or each assembly is formed from a thermally conductive material such as diamond. A heat dissipation means is thermally connected to the edges of the substrate to extract heat generated within the structure. Methods for fabricating the electrical interconnection means as a stand alone elastomeric sheet are described. The ends of the plurality of conductors in the electrical interconnection means are fabricated so that upon compression between adjacent assemblies there is a wiping action between the conductor ends and contact locations on the adjacent assemblies to form a good electrical contact therewith.