公开(公告)号：US20110147822A1

公开(公告)日：2011-06-23

申请号：US12929894

申请日：2011-02-23

申请人： Kenji Aoyama ,  Eiji Ito ,  Masahiro Kiyotoshi ,  Tadashi Iguchi ,  Moto Yabuki

发明人： Kenji Aoyama ,  Eiji Ito ,  Masahiro Kiyotoshi ,  Tadashi Iguchi ,  Moto Yabuki

IPC分类号： H01L21/336

CPC分类号： H01L27/11521 ,  H01L21/764 ,  H01L29/40114 ,  H01L29/66825

摘要： A semiconductor memory device has a semiconductor substrate, a plurality of word lines formed at predetermined intervals on the semiconductor substrate, each word line having a gate insulating film, a charge storage layer, a first insulating film, and a controlling gate electrode which are stacked in order, and including a metal oxide layer above the level of the gate insulating film, a second insulating film covering a side of the word line and a surface of the semiconductor substrate between the word lines, and having a film thickness of 15 nm or less, and a third insulating film formed between the word lines adjacent to each other such that a region below the level of the metal oxide layer has a cavity.

公开(公告)号：US20090212352A1

公开(公告)日：2009-08-27

申请号：US12391953

申请日：2009-02-24

申请人： Kenji AOYAMA ,  Eiji Ito ,  Masahiro Kiyotoshi ,  Tadashi Iguchi ,  Moto Yabuki

发明人： Kenji AOYAMA ,  Eiji Ito ,  Masahiro Kiyotoshi ,  Tadashi Iguchi ,  Moto Yabuki

IPC分类号： H01L29/792 ,  H01L21/28 ,  H01L29/788

CPC分类号： H01L27/11521 ,  H01L21/28273 ,  H01L21/764 ,  H01L29/66825

摘要： A semiconductor memory device has a semiconductor substrate, a plurality of word lines formed at predetermined intervals on the semiconductor substrate, each word line having a gate insulating film, a charge storage layer, a first insulating film, and a controlling gate electrode which are stacked in order, and including a metal oxide layer above the level of the gate insulating film, a second insulating film covering a side of the word line and a surface of the semiconductor substrate between the word lines, and having a film thickness of 15 nm or less, and a third insulating film formed between the word lines adjacent to each other such that a region below the level of the metal oxide layer has a cavity.

摘要翻译： 半导体存储器件具有半导体衬底，在半导体衬底上以预定间隔形成的多个字线，每个字线具有栅极绝缘膜，电荷存储层，第一绝缘膜和控制栅电极，它们被堆叠 并且包括位于栅极绝缘膜的高度之上的金属氧化物层，覆盖字线的一侧的第二绝缘膜和字线之间的半导体衬底的表面，并且具有15nm的膜厚度或 并且形成在彼此相邻的字线之间的第三绝缘膜，使得低于金属氧化物层的电平的区域具有空腔。

公开(公告)号：US07915156B2

公开(公告)日：2011-03-29

申请号：US12391953

申请日：2009-02-24

申请人： Kenji Aoyama ,  Eiji Ito ,  Masahiro Kiyotoshi ,  Tadashi Iguchi ,  Moto Yabuki

发明人： Kenji Aoyama ,  Eiji Ito ,  Masahiro Kiyotoshi ,  Tadashi Iguchi ,  Moto Yabuki

IPC分类号： H01L21/336

CPC分类号： H01L27/11521 ,  H01L21/28273 ,  H01L21/764 ,  H01L29/66825

摘要： A semiconductor memory device has a semiconductor substrate, a plurality of word lines formed at predetermined intervals on the semiconductor substrate, each word line having a gate insulating film, a charge storage layer, a first insulating film, and a controlling gate electrode which are stacked in order, and including a metal oxide layer above the level of the gate insulating film, a second insulating film covering a side of the word line and a surface of the semiconductor substrate between the word lines, and having a film thickness of 15 nm or less, and a third insulating film formed between the word lines adjacent to each other such that a region below the level of the metal oxide layer has a cavity.

摘要翻译： 半导体存储器件具有半导体衬底，在半导体衬底上以预定间隔形成的多个字线，每个字线具有栅极绝缘膜，电荷存储层，第一绝缘膜和控制栅电极，它们被堆叠 并且包括位于栅极绝缘膜的高度之上的金属氧化物层，覆盖字线的一侧的第二绝缘膜和字线之间的半导体衬底的表面，并且具有15nm的膜厚度或 并且形成在彼此相邻的字线之间的第三绝缘膜，使得低于金属氧化物层的电平的区域具有空腔。

公开(公告)号：US5879447A

公开(公告)日：1999-03-09

申请号：US478765

申请日：1995-06-07

申请人： Takako Okada ,  Shigeru Kambayashi ,  Moto Yabuki ,  Shinji Onga ,  Yoshitaka Tsunashima ,  Yuuichi Mikata ,  Haruo Okano

发明人： Takako Okada ,  Shigeru Kambayashi ,  Moto Yabuki ,  Shinji Onga ,  Yoshitaka Tsunashima ,  Yuuichi Mikata ,  Haruo Okano

IPC分类号： H01L21/02 ,  H01L21/20 ,  H01L21/28 ,  H01L21/329 ,  H01L21/334 ,  H01L21/336 ,  H01L21/822 ,  H01L21/8249 ,  H01L27/04 ,  H01L27/06 ,  H01L27/12 ,  H01L29/49 ,  H01L29/78 ,  H01L29/786 ,  C30B19/00

CPC分类号： H01L28/82 ,  H01L21/2022 ,  H01L21/28035 ,  H01L29/6609 ,  H01L29/66181 ,  H01L29/66613 ,  H01L29/66628 ,  H01L29/66651 ,  H01L29/66757 ,  H01L29/66765 ,  H01L29/78675 ,  H01L29/78678 ,  H01L29/49 ,  H01L29/78654

摘要： A single crystal and a polycrystal having an excellent crystal quality and providing a highly reliable semiconductor device are formed by solid phase growth at low temperatures. An amorphous thin film is deposited on a substrate such that an average inter-atomic distance of main constituent element of the amorphous thin film is 1.02 times or more of an average inter-atomic distance of the elements in single crystal, and crystallization energy is applied to the amorphous thin film to perform solid phase growth to thereby form a single crystal. In another embodiment of the present invention, an amorphous semiconductor thin film is formed on a substrate or an insulating film such that an average inter-atomic distance distribution of main constituent element of the film substantially coincides with an average inter-atomic distance distribution of the element in a single crystal, and crystallization energy is applied to the amorphous semiconductor thin film to cause solid phase growth to thereby form a single crystalline semiconductor thin film.

公开(公告)号：US5582640A

公开(公告)日：1996-12-10

申请号：US56443

申请日：1993-04-30

申请人： Takako Okada ,  Shigeru Kambayashi ,  Moto Yabuki ,  Shinji Onga ,  Yoshitaka Tsunashima ,  Yuuichi Mikata ,  Haruo Okano

发明人： Takako Okada ,  Shigeru Kambayashi ,  Moto Yabuki ,  Shinji Onga ,  Yoshitaka Tsunashima ,  Yuuichi Mikata ,  Haruo Okano

IPC分类号： H01L21/02 ,  H01L21/20 ,  H01L21/28 ,  H01L21/329 ,  H01L21/334 ,  H01L21/336 ,  H01L21/822 ,  H01L21/8249 ,  H01L27/04 ,  H01L27/06 ,  H01L27/12 ,  H01L29/49 ,  H01L29/78 ,  H01L29/786

CPC分类号： H01L28/82 ,  H01L21/2022 ,  H01L21/28035 ,  H01L29/6609 ,  H01L29/66181 ,  H01L29/66613 ,  H01L29/66628 ,  H01L29/66651 ,  H01L29/66757 ,  H01L29/66765 ,  H01L29/78675 ,  H01L29/78678 ,  H01L29/49 ,  H01L29/78654

摘要： A single crystal and a polycrystal having an excellent crystal quality and providing a highly reliable semiconductor device are formed by solid phase growth at low temperatures. An amorphous thin film is deposited on a substrate such that an average inter-atomic distance of main constituent element of the amorphous thin film is 1.02 times or more of an average inter-atomic distance of the elements in single crystal, and crystallization energy is applied to the amorphous thin film to perform solid phase growth to thereby form a single crystal. In another embodiment of the present invention, an amorphous semiconductor thin film is formed on a substrate or an insulating film such that an average inter-atomic distance distribution of main constituent element of the film substantially coincides with an average inter-atomic distance distribution of the element in a single crystal, and crystallization energy is applied to the amorphous semiconductor thin film to cause solid phase growth to thereby form a single crystalline semiconductor thin film.

公开(公告)号：US08436331B2

公开(公告)日：2013-05-07

申请号：US12844374

申请日：2010-07-27

申请人： Yoko Iwakaji ,  Jun Hirota ,  Kyoichi Suguro ,  Moto Yabuki

发明人： Yoko Iwakaji ,  Jun Hirota ,  Kyoichi Suguro ,  Moto Yabuki

IPC分类号： H01L21/02

CPC分类号： H01L27/1021 ,  G11C13/0007 ,  G11C2213/71 ,  H01L27/2409 ,  H01L27/2481 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/145 ,  H01L45/16 ,  H01L45/1675

摘要： According to one embodiment, a method for manufacturing a memory device is disclosed. The method includes forming a silicon diode. At least an upper portion of the silicon diode is made of a semiconductor material containing silicon and doped with impurity. The method includes forming a metal layer made of a metal on the silicon diode. The method includes forming a metal nitride layer made of a nitride of the metal on the metal layer. The method includes forming a resistance change film. In addition, the method includes reacting the metal layer with the silicon diode and the metal nitride layer by heat treatment to form an electrode film containing the metal, silicon, and nitrogen.

摘要翻译： 根据一个实施例，公开了一种用于制造存储器件的方法。 该方法包括形成硅二极管。 至少硅二极管的上部由含有硅并掺杂杂质的半导体材料制成。 该方法包括在硅二极管上形成由金属制成的金属层。 该方法包括在金属层上形成由金属的氮化物制成的金属氮化物层。 该方法包括形成电阻变化膜。 此外，该方法包括通过热处理使金属层与硅二极管和金属氮化物层反应，以形成含有金属，硅和氮的电极膜。

公开(公告)号：US06906908B1

公开(公告)日：2005-06-14

申请号：US10849111

申请日：2004-05-20

申请人： Moto Yabuki ,  Andreas Hilliger

发明人： Moto Yabuki ,  Andreas Hilliger

IPC分类号： H01L21/02 ,  H01L21/285 ,  H01L21/768 ,  H01L21/8246 ,  H01L27/115 ,  H01G4/20

CPC分类号： H01L27/11502 ,  H01L21/28568 ,  H01L21/76895 ,  H01L27/11507 ,  H01L28/57 ,  H01L28/75

摘要： Disclosed is a semiconductor device comprising a semiconductor substrate, a capacitor provided above the semiconductor substrate, an insulation region which covers the capacitor and has a first hole and a second hole, the first hole being provided apart from the capacitor and extending in a vertical direction with respect to a main surface of the semiconductor substrate, the second hole reaching an electrode of the capacitor, extending in the vertical direction with respect to the main surface of the semiconductor substrate and being shallower than the first hole, a tungsten plug provided in the first hole, a first oxygen barrier film provided between the tungsten plug and a side wall of the first hole, and a conductive plug provided in the second hole and connected to the electrode of the capacitor.

摘要翻译： 公开了一种半导体器件，包括半导体衬底，设置在半导体衬底上方的电容器，覆盖电容器并具有第一孔和第二孔的绝缘区域，第一孔与电容器分开设置并沿垂直方向延伸 相对于半导体基板的主表面，第二孔到达电容器的电极，相对于半导体基板的主表面在垂直方向上延伸并且比第一孔浅;设置在第一孔中的钨丝塞 第一孔，设置在钨塞和第一孔的侧壁之间的第一氧阻隔膜，以及设置在第二孔中并连接到电容器的电极的导电栓。

公开(公告)号：US08309958B2

公开(公告)日：2012-11-13

申请号：US12872284

申请日：2010-08-31

申请人： Jun Hirota ,  Yoko Iwakaji ,  Moto Yabuki

发明人： Jun Hirota ,  Yoko Iwakaji ,  Moto Yabuki

IPC分类号： H01L29/06 ,  H01L29/12 ,  H01L45/00

CPC分类号： H01L27/1021 ,  H01L27/101

摘要： According to one embodiment, a semiconductor memory device includes a word line interconnection layer, a bit line interconnection layer and a pillar. The word line interconnection layer includes a plurality of word lines which extend in a first direction. The bit line interconnection layer includes a plurality of bit lines which extend in a second direction crossing over the first direction. The pillar is arranged between each of the word lines and each of the bit lines. The pillar includes a silicon diode and a variable resistance film, and the silicon diode includes a p-type portion and an n-type portion. The word line interconnection layer and the bit line interconnection layer are alternately stacked, and a compressive force is applied to the silicon diode in a direction in which the p-type portion and the n-type portion become closer to each other.

摘要翻译： 根据一个实施例，半导体存储器件包括字线互连层，位线互连层和柱。 字线互连层包括沿第一方向延伸的多个字线。 位线互连层包括沿与第一方向交叉的第二方向延伸的多个位线。 支柱布置在每个字线和每个位线之间。 支柱包括硅二极管和可变电阻膜，并且硅二极管包括p型部分和n型部分。 字线互连层和位线互连层交替堆叠，并且在p型部分和n型部分变得更接近的方向上对硅二极管施加压缩力。

公开(公告)号：US20120091414A1

公开(公告)日：2012-04-19

申请号：US13052143

申请日：2011-03-21

申请人： Yoko IWAKAJI ,  Jun Hirota ,  Moto Yabuki ,  Wakana Kai ,  Hirokazu Ishida ,  Ichiro Mizushima

发明人： Yoko IWAKAJI ,  Jun Hirota ,  Moto Yabuki ,  Wakana Kai ,  Hirokazu Ishida ,  Ichiro Mizushima

IPC分类号： H01L47/00 ,  H01L21/20 ,  H01L29/04

CPC分类号： H01L29/045 ,  H01L21/02425 ,  H01L21/0245 ,  H01L21/02502 ,  H01L21/02516 ,  H01L21/02532 ,  H01L21/02609 ,  H01L21/02667 ,  H01L27/1021 ,  H01L27/2409 ,  H01L27/2463 ,  H01L27/2481 ,  H01L29/685 ,  H01L29/868 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/145 ,  H01L45/16 ,  H01L45/1675

摘要： According to one embodiment, a semiconductor device includes a plurality of silicon films. The plurality of silicon films are disposed on one plane and are made of polysilicon containing an impurity. A crystal orientation of each of the silicon films is a (311) orientation.

摘要翻译： 根据一个实施例，半导体器件包括多个硅膜。 多个硅膜设置在一个平面上，由含有杂质的多晶硅制成。 每个硅膜的晶体取向为（311）取向。

公开(公告)号：US20050127513A1

公开(公告)日：2005-06-16

申请号：US11042176

申请日：2005-01-26

申请人： Moto Yabuki

发明人： Moto Yabuki

IPC分类号： H01L27/105 ,  H01L21/02 ,  H01L21/20 ,  H01L21/768 ,  H01L21/8246 ,  H01L23/48 ,  H01L27/115

CPC分类号： H01L27/11502 ,  H01L21/76838 ,  H01L27/11507 ,  H01L28/40 ,  H01L28/82

摘要： Disclosed is a semiconductor device comprising an underlying film, a first electrode formed on the underlying film, a first dielectric film formed on the first electrode, a second electrode formed on the first dielectric film, and a first interconnect including a first conductive portion extending in a stack direction of the first electrode, the first dielectric film and the second electrode, a side surface of the first conductive portion being in contact with one of the first electrode and the second electrode.

摘要翻译： 公开了一种半导体器件，包括下面的膜，形成在下面的膜上的第一电极，形成在第一电极上的第一电介质膜，形成在第一电介质膜上的第二电极和第一互连件，第一互连件包括第一导电部分， 第一电极的堆叠方向，第一电介质膜和第二电极，第一导电部分的侧表面与第一电极和第二电极中的一个接触。