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公开(公告)号：US5930656A
公开(公告)日：1999-07-27
申请号：US953639
申请日：1997-10-17
IPC分类号： C30B25/02 , H01L21/205 , H01L33/00 , H01L33/44 , H01L21/31
CPC分类号： H01L33/44 , C30B25/02 , C30B29/403 , C30B29/406 , H01L21/02381 , H01L21/0242 , H01L21/02458 , H01L21/02505 , H01L21/0254 , H01L21/02576 , H01L21/02579 , H01L21/0262 , H01L33/007 , Y10S438/913 , Y10S438/93 , Y10S438/958
摘要： A substrate for forming a compound semiconductor device is placed in a reaction chamber. An MOCVD method or a GS-MBE method is used to grow compound semiconductor layers on the substrate. The grown layers include, for example, a GaN buffer layer, an n-GaN layer, an InGaN active layer, a p-AlGaN layer, and a p.sup.+ -GaN contact layer. After the growth of the layers, the substrate is kept in the reaction chamber, and a passivation film of, for example, SiNx, SiO2, or SiON is formed on top of the grown layers according to a CVD or GS-MBE method. Since the top of the grown layers is not exposed to air outside the reaction chamber, no oxidization or contamination occurs on the top of the grown layers. The compound semiconductor device is manufactured through simpler processes compared with a prior art that needs separate apparatuses for growing and forming the layers and passivation film.
摘要翻译： 将用于形成化合物半导体器件的衬底放置在反应室中。 使用MOCVD方法或GS-MBE方法来在衬底上生长化合物半导体层。 生长层包括例如GaN缓冲层，n-GaN层，InGaN有源层，p-AlGaN层和p + -GaN接触层。 在层的生长之后，将基板保持在反应室中，并且根据CVD或GS-MBE方法在生长层的顶部上形成例如SiN x，SiO 2或SiON的钝化膜。 由于生长层的顶部不暴露于反应室外部的空气，因此在生长层的顶部不发生氧化或污染。 与现有技术相比，通过更简单的工艺制造复合半导体器件，其需要用于生长和形成层和钝化膜的单独的装置。
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公开(公告)号：US08629468B2
公开(公告)日：2014-01-14
申请号：US12690464
申请日：2010-01-20
申请人： Kenji Isomoto , Chisato Furukawa
发明人： Kenji Isomoto , Chisato Furukawa
IPC分类号： H01L33/00
CPC分类号： C30B29/40 , C30B23/02 , C30B25/18 , C30B29/42 , C30B29/44 , H01L33/0079 , H01L33/025 , H01L33/16
摘要： A method for manufacturing a light emitting device, includes: preparing a first substrate by slicing a single crystal ingot pulled in a pulling direction tilted with respect to a first plane orientation, the slicing being in a direction substantially perpendicular to the pulling direction; preparing a second substrate including a major surface having a plane orientation substantially parallel to a plane orientation of a major surface of the first substrate; growing a stacked unit as a crystal on the major surface of the second substrate, the stacked unit including a light emitting layer; and removing the second substrate after bonding the stacked unit and the major surface of the first substrate by heating them in a joined state. A plane orientation of the major surface of the first substrate and a plane orientation of the major surface of the second substrate are one or another selected from a plane tilted from a (100) plane toward a [011] direction and a plane tilted from a (−100) plane toward a [0-1-1] direction, respectively.
摘要翻译： 一种发光器件的制造方法，其特征在于，包括：通过对在相对于第一平面取向倾斜的拉拔方向拉伸的单晶锭进行切片来制作第一基板，所述切片位于与所述拉拔方向大致正交的方向上; 制备包括具有基本上平行于所述第一基底的主表面的平面取向的平面取向的主表面的第二基底; 在第二基板的主表面上生长作为晶体的堆叠单元，所述堆叠单元包括发光层; 以及通过在接合状态下加热所述第一基板的所述层叠单元和所述主表面而将所述第二基板除去。 第一基板的主表面的平面取向和第二基板的主表面的平面取向是从（100）面朝向[011]方向倾斜的平面中选择的一个或另一个，以及从 （-100）面朝向[0-1-1]方向。
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3.发明申请公开(公告)号：US20100237366A1
公开(公告)日：2010-09-23
申请号：US12690464
申请日：2010-01-20
申请人： Kenji Isomoto , Chisato Furukawa
发明人： Kenji Isomoto , Chisato Furukawa
CPC分类号： C30B29/40 , C30B23/02 , C30B25/18 , C30B29/42 , C30B29/44 , H01L33/0079 , H01L33/025 , H01L33/16
摘要： A method for manufacturing a light emitting device, includes: preparing a first substrate by slicing a single crystal ingot pulled in a pulling direction tilted with respect to a first plane orientation, the slicing being in a direction substantially perpendicular to the pulling direction; preparing a second substrate including a major surface having a plane orientation substantially parallel to a plane orientation of a major surface of the first substrate; growing a stacked unit as a crystal on the major surface of the second substrate, the stacked unit including a light emitting layer; and removing the second substrate after bonding the stacked unit and the major surface of the first substrate by heating them in a joined state. A plane orientation of the major surface of the first substrate and a plane orientation of the major surface of the second substrate are one or another selected from a plane tilted from a (100) plane toward a [011] direction and a plane tilted from a (−100) plane toward a [0-1-1] direction, respectively.
摘要翻译： 一种发光器件的制造方法，其特征在于，包括：通过对在相对于第一平面取向倾斜的拉拔方向拉伸的单晶锭进行切片来制作第一基板，所述切片位于与所述拉拔方向大致正交的方向上; 制备包括具有基本上平行于所述第一基底的主表面的平面取向的平面取向的主表面的第二基底; 在第二基板的主表面上生长作为晶体的堆叠单元，所述堆叠单元包括发光层; 以及通过在接合状态下加热所述第一基板的所述层叠单元和所述主表面而将所述第二基板除去。 第一基板的主表面的平面取向和第二基板的主表面的平面取向是从（100）面朝向[011]方向倾斜的平面中选择的一个或另一个，以及从 （-100）面朝向[0-1-1]方向。
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公开(公告)号：US06320207B1
公开(公告)日：2001-11-20
申请号：US08844616
申请日：1997-04-21
IPC分类号： H01L3300
CPC分类号： H01L33/325 , H01L21/0237 , H01L21/0242 , H01L21/02458 , H01L21/02502 , H01L21/0251 , H01L21/0254 , H01L21/0262
摘要： A light emitting device has an N-type gallium nitride system compound semiconductor layer provided on a substrate; and a P-type gallium nitride system compound semiconductor layer provided on said N-type gallium nitride system compound semiconductor layer. The N-type gallium nitride compound semiconductor layer has such an area that an impurity concentration increases corresponding to a layer thickness from the side of said substrate.
摘要翻译： 发光器件具有设置在基板上的N型氮化镓系化合物半导体层; 以及设置在所述N型氮化镓系化合物半导体层上的P型氮化镓系化合物半导体层。 N型氮化镓系化合物半导体层具有从基板一侧的层厚度的杂质浓度增加的面积。
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5.发明授权
公开(公告)号：US6017807A
公开(公告)日：2000-01-25
申请号：US60068
申请日：1998-04-15
IPC分类号： H01L21/205 , H01L33/06 , H01L33/32 , H01L33/36 , H01L31/18
CPC分类号： H01L33/325 , H01L33/007
摘要： After p-type gallium nitride compound semiconductor layers, to which p-type impurity is added, are formed by virtue of chemical vapor deposition, the p-type gallium nitride compound semiconductor layers are thermally annealed at more than 400.degree. C. or more than 700.degree. C. while supplying a flow of an inert gas in parallel to a substrate surface at a predetermined flow rate or more. Otherwise, the p-type gallium nitride compound semiconductor layers are thermally annealed at more than 400.degree. C. or more than 700.degree. C. in an inert gas atmosphere having a predetermined pressure or more. According to the annealing process, the p-type impurity can be more effectively activated, so that p-type gallium nitride compound semiconductor layers which have fewer crystal defects, etc. and have lower resistivity can be formed.
摘要翻译： 在通过化学气相沉积形成p型杂质的p型氮化镓化合物半导体层之后，p型氮化镓系化合物半导体层在400℃以上热退火， 同时以预定的流速或更多的流量平行于衬底表面供应惰性气体流。 否则，在具有预定压力或更大压力的惰性气体气氛中，p型氮化镓化合物半导体层在大于400℃或高于700℃下热退火。 根据退火处理，可以更有效地激活p型杂质，从而可以形成具有较少的晶体缺陷等并且具有较低电阻率的p型氮化镓化合物半导体层。
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6.发明授权公开(公告)号：US07679915B2
公开(公告)日：2010-03-16
申请号：US11663191
申请日：2005-08-22
CPC分类号： H02M7/003 , H01L2924/0002 , H05K7/209 , Y10T29/49002 , H01L2924/00
摘要： There is provided a motor control apparatus in which a size of the apparatus can easily be reduced, a work for aligning a power semiconductor module with a substrate can be eliminated and an assembling property can be enhanced.In a motor control apparatus in which a power semiconductor module adhering to a heat sink is mounted on a first substrate, a spacer is provided between the heat sink and the substrate and the power semiconductor module is disposed in the spacer. Moreover, an edge part of a hole has such a structure as to block a space between a terminal protruded from a side portion of the power semiconductor module and the heat sink.
摘要翻译： 提供了一种电动机控制装置，其中可以容易地减小装置的尺寸，可以消除用于对准功率半导体模块与衬底的工作，并且可以提高组装性能。 在其中将附着在散热片上的功率半导体模块安装在第一基板上的电动机控制装置中，在散热片和基板之间设置间隔件，功率半导体模块设置在间隔件中。 此外，孔的边缘部分具有阻挡从功率半导体模块的侧部突出的端子与散热器之间的空间的结构。
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公开(公告)号：USD561095S1
公开(公告)日：2008-02-05
申请号：US29278750
申请日：2007-04-09
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公开(公告)号：USD455399S1
公开(公告)日：2002-04-09
申请号：US29133167
申请日：2000-11-22
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公开(公告)号：US07898806B2
公开(公告)日：2011-03-01
申请号：US12439767
申请日：2007-08-24
申请人： Kenji Isomoto
发明人： Kenji Isomoto
IPC分类号： H05K7/20
CPC分类号： H02M7/003 , H05K7/20918
摘要： There is provided a motor controller that can easily reduce the size and manufacturing cost of a motor controller by reducing the size of a heat sink without increasing the number of parts much.The motor controller includes a heat sink, a plurality of power semiconductor modules that is in close contact with the heat sink, a substrate (6) that is electrically connected to the plurality of power semiconductor modules, and a fan (8) that generates the flow of external air and supplies cooling air to the heat sink. The heat sink is formed by the combination of two kinds of heat sinks that include a first heat sink (9) and a second heat sink (10), and at least one of the power semiconductor modules is in close contact with each of the first and second heat sinks (9) and (10).
摘要翻译： 提供了一种电动机控制器，其可以通过减少散热器的尺寸而不增加零件数量而容易地减小电动机控制器的尺寸和制造成本。 马达控制器包括散热器，与散热器紧密接触的多个功率半导体模块，电连接到多个功率半导体模块的基板（6）和产生该多个功率半导体模块的风扇（8） 外部空气流动，并向散热片提供冷却空气。 散热器由包括第一散热器（9）和第二散热器（10）的两种散热器的组合形成，并且功率半导体模块中的至少一个与第一散热器（9）和第二散热器 和第二散热器（9）和（10）。
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公开(公告)号：US20070258194A1
公开(公告)日：2007-11-08
申请号：US11630414
申请日：2005-06-02
申请人： Hideharu Okayama , Kenji Isomoto , Shuhei Nohara , Toshio Omata
发明人： Hideharu Okayama , Kenji Isomoto , Shuhei Nohara , Toshio Omata
IPC分类号： H02B1/00
CPC分类号： H02M7/003 , H01L25/162 , H01L2924/0002 , H05K1/0203 , H05K1/144 , H05K7/209 , H05K2201/1056 , H05K2201/2018 , H05K2201/2036 , H01L2924/00
摘要： There is provided a motor controller which eliminates a positioning operation between a power semiconductor element and a base plate to improve assemblability. A motor controller has a power semiconductor element (3) closely contacted with a heatsink (1) and mounted in a first base plate (4), wherein a spacer (2) having an engaging section (2e) formed therein as a hole for the power semiconductor element (3) is interposed between the heatsink (1) and the base plate (4), and the power semiconductor element (3) is positioned in the spacer (2). Further, the peripheral wall of the hole is arranged so as to shut off a space between a terminal projecting from the side of the power semiconductor element (3) and the heatsink (1).
摘要翻译： 提供了一种电动机控制器，其消除功率半导体元件和基板之间的定位操作，以改善组装性。 电动机控制器具有与散热器（1）紧密接触并安装在第一基板（4）中的功率半导体元件（3），其中具有形成在其中的接合部分（2e）作为孔的间隔件（2） 功率半导体元件（3）插入在散热器（1）和基板（4）之间，功率半导体元件（3）位于间隔物（2）中。 此外，孔的周壁布置成切断从功率半导体元件（3）的侧面突出的端子与散热器（1）之间的空间。
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