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公开(公告)号：US07799681B2
公开(公告)日：2010-09-21
申请号：US12173814
申请日：2008-07-15
申请人： Kenji Suzuki , Frank M. Cerio, Jr. , Miho Jomen , Shigeru Mizuno , Yasushi Mizusawa , Tadahiro Ishizaka
发明人： Kenji Suzuki , Frank M. Cerio, Jr. , Miho Jomen , Shigeru Mizuno , Yasushi Mizusawa , Tadahiro Ishizaka
IPC分类号： H01L21/44
CPC分类号： H01L21/76849 , C23C16/02 , C23C16/16 , H01L21/02068 , H01L21/28562 , H01L21/32134 , H01L21/32135 , H01L21/76826 , H01L21/76828 , H01L21/76834 , H01L21/76846 , H01L21/76856 , H01L21/76868 , H01L21/76883
摘要： A method for integrating ruthenium (Ru) metal cap layers and modified Ru metal cap layers into copper (Cu) metallization of semiconductor devices to improve electromigration (EM) and stress migration (SM) in bulk Cu metal. In one embodiment, the method includes providing a planarized patterned substrate containing a Cu metal surface and a dielectric layer surface, depositing first Ru metal on the Cu metal surface, and depositing additional Ru metal on the dielectric layer surface, where the amount of the additional Ru metal is less than the amount of the first Ru metal. The method further includes at least substantially removing the additional Ru metal from the dielectric layer surface to improve the selective formation of a Ru metal cap layer on the Cu metal surface. Other embodiments further include incorporating one or more types of modifier elements into the dielectric layer surface, the Cu metal surface, the Ru metal cap layer, or a combination thereof.
摘要翻译： 将钌（Ru）金属盖层和改性的Ru金属覆盖层整合到半导体器件的铜（Cu）金属化中以改善块状Cu金属中的电迁移（EM）和应力迁移（SM）的方法。 在一个实施例中，该方法包括提供包含Cu金属表面和电介质层表面的平坦化图案化衬底，在Cu金属表面上沉积第一Ru金属，以及在电介质层表面上沉积额外的Ru金属，其中额外的量 Ru金属少于第一Ru金属的量。 该方法还包括从电介质层表面至少基本上去除额外的Ru金属，以改善在Cu金属表面上的Ru金属覆盖层的选择性形成。 其他实施例还包括将一种或多种类型的改性剂元素结合到电介质层表面，Cu金属表面，Ru金属覆盖层或其组合中。
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公开(公告)号：US20100015798A1
公开(公告)日：2010-01-21
申请号：US12173814
申请日：2008-07-15
申请人： Kenji Suzuki , Frank M. Cerio, JR. , Miho Jomen , Shigeru Mizuno , Yasushi Mizusawa , Tadahiro Ishizaka
发明人： Kenji Suzuki , Frank M. Cerio, JR. , Miho Jomen , Shigeru Mizuno , Yasushi Mizusawa , Tadahiro Ishizaka
IPC分类号： H01L21/4763
CPC分类号： H01L21/76849 , C23C16/02 , C23C16/16 , H01L21/02068 , H01L21/28562 , H01L21/32134 , H01L21/32135 , H01L21/76826 , H01L21/76828 , H01L21/76834 , H01L21/76846 , H01L21/76856 , H01L21/76868 , H01L21/76883
摘要： A method for integrating ruthenium (Ru) metal cap layers and modified Ru metal cap layers into copper (Cu) metallization of semiconductor devices to improve electromigration (EM) and stress migration (SM) in bulk Cu metal. In one embodiment, the method includes providing a planarized patterned substrate containing a Cu metal surface and a dielectric layer surface, depositing first Ru metal on the Cu metal surface, and depositing additional Ru metal on the dielectric layer surface, where the amount of the additional Ru metal is less than the amount of the first Ru metal. The method further includes at least substantially removing the additional Ru metal from the dielectric layer surface to improve the selective formation of a Ru metal cap layer on the Cu metal surface. Other embodiments further include incorporating one or more types of modifier elements into the dielectric layer surface, the Cu metal surface, the Ru metal cap layer, or a combination thereof.
摘要翻译： 将钌（Ru）金属盖层和改性的Ru金属覆盖层整合到半导体器件的铜（Cu）金属化中以改善块状Cu金属中的电迁移（EM）和应力迁移（SM）的方法。 在一个实施例中，该方法包括提供包含Cu金属表面和电介质层表面的平坦化图案化衬底，在Cu金属表面上沉积第一Ru金属，以及在电介质层表面上沉积额外的Ru金属，其中额外的量 Ru金属少于第一Ru金属的量。 该方法还包括从电介质层表面至少基本上去除额外的Ru金属，以改善在Cu金属表面上的Ru金属覆盖层的选择性形成。 其他实施例还包括将一种或多种类型的改性剂元素结合到电介质层表面，Cu金属表面，Ru金属覆盖层或其组合中。
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3.发明授权Diffusion barrier for integrated circuits formed from a layer of reactive metal and method of fabrication 有权由反应金属层形成的集成电路的扩散势垒和制造方法公开(公告)号：US08372739B2
公开(公告)日：2013-02-12
申请号：US11691167
申请日：2007-03-26
IPC分类号： H01L21/4763
CPC分类号： H01L23/53238 , H01L21/76831 , H01L21/76843 , H01L21/76844 , H01L21/76855 , H01L21/76856 , H01L21/76873 , H01L2924/0002 , H01L2924/00
摘要： An interconnect structure for an integrated circuit and method of forming the interconnect structure. The method includes depositing a metallic layer containing a reactive metal in an interconnect opening formed within a dielectric material containing a dielectric reactant element, thermally reacting at least a portion of the metallic layer with at least a portion of the dielectric material to form a diffusion barrier primarily containing a compound of the reactive metal from the metallic layer and the dielectric reactant element from the dielectric material, and filling the interconnect opening with Cu metal, where the diffusion barrier surrounds the Cu metal within the opening. The reactive metal can be Co, Ru, Mo, W, or Ir, or a combination thereof. The interconnect opening can be a trench, a via, or a dual damascene opening.
摘要翻译： 用于集成电路的互连结构和形成互连结构的方法。 该方法包括在包含介电反应物元件的电介质材料中形成的互连开口中沉积含有活性金属的金属层，使金属层的至少一部分与电介质材料的至少一部分热反应形成扩散阻挡层 主要包含来自金属层的反应性金属的化合物和来自电介质材料的介电反应物元件，并且用Cu金属填充互连开口，其中扩散阻挡层围绕开口内的Cu金属。 反应性金属可以是Co，Ru，Mo，W或Ir，或它们的组合。 互连开口可以是沟槽，通孔或双镶嵌开口。
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4.发明申请DIFFUSION BARRIER FOR INTEGRATED CIRCUITS FORMED FROM A LAYER OF REACTIVE METAL AND METHOD OF FABRICATION 有权用于反应金属层形成的集成电路的扩散阻挡层和制造方法公开(公告)号：US20080237859A1
公开(公告)日：2008-10-02
申请号：US11691167
申请日：2007-03-26
IPC分类号： H01L23/52 , H01L21/4763
CPC分类号： H01L23/53238 , H01L21/76831 , H01L21/76843 , H01L21/76844 , H01L21/76855 , H01L21/76856 , H01L21/76873 , H01L2924/0002 , H01L2924/00
摘要： An interconnect structure for an integrated circuit and method of forming the interconnect structure. The method includes depositing a metallic layer containing a reactive metal in an interconnect opening formed within a dielectric material containing a dielectric reactant element, thermally reacting at least a portion of the metallic layer with at least a portion of the dielectric material to form a diffusion barrier primarily containing a compound of the reactive metal from the metallic layer and the dielectric reactant element from the dielectric material, and filling the interconnect opening with Cu metal, where the diffusion barrier surrounds the Cu metal within the opening. The reactive metal can be Co, Ru, Mo, W, or Ir, or a combination thereof. The interconnect opening can be a trench, a via, or a dual damascene opening.
摘要翻译： 用于集成电路的互连结构和形成互连结构的方法。 该方法包括在包含介电反应物元件的电介质材料中形成的互连开口中沉积含有活性金属的金属层，使金属层的至少一部分与电介质材料的至少一部分热反应形成扩散阻挡层 主要包含来自金属层的反应性金属的化合物和来自电介质材料的介电反应物元件，并且用Cu金属填充互连开口，其中扩散阻挡层围绕开口内的Cu金属。 反应性金属可以是Co，Ru，Mo，W或Ir，或它们的组合。 互连开口可以是沟槽，通孔或双镶嵌开口。
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5.发明授权公开(公告)号：US08859422B2
公开(公告)日：2014-10-14
申请号：US13359138
申请日：2012-01-26
申请人： Tadahiro Ishizaka , Atsushi Gomi , Takara Kato , Osamu Yokoyama , Takashi Sakuma , Chiaki Yasumuro , Hiroyuki Toshima , Tatsuo Hatano , Yasushi Mizusawa , Masamichi Hara , Kenzi Suzuki
发明人： Tadahiro Ishizaka , Atsushi Gomi , Takara Kato , Osamu Yokoyama , Takashi Sakuma , Chiaki Yasumuro , Hiroyuki Toshima , Tatsuo Hatano , Yasushi Mizusawa , Masamichi Hara , Kenzi Suzuki
IPC分类号： H01L21/44
CPC分类号： H01L21/02104 , C23C14/025 , C23C14/046 , C23C14/345 , C23C14/541 , C23C14/5806 , C23C16/16 , H01J37/32899 , H01J37/34
摘要： A method of forming a Cu wiring in a trench or hole formed in a substrate is provided. The method includes forming a barrier film on the surface of the trench or hole, forming a Ru film on the barrier film, and embedding Cu in the trench or hole by forming a Cu film on the Ru film using PVD while annealing the substrate such that migration of copper into the trench or hole occurs.
摘要翻译： 提供了一种在衬底中形成的沟槽或孔中形成Cu布线的方法。 该方法包括在沟槽或孔的表面上形成阻挡膜，在阻挡膜上形成Ru膜，并且通过在使衬底退火的同时在PVD膜上形成Cu膜而将Cu嵌入沟槽或孔中，使得 发生铜进入沟槽或孔的迁移。
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公开(公告)号：US20130203250A1
公开(公告)日：2013-08-08
申请号：US13566515
申请日：2012-08-03
IPC分类号： H01L21/768
CPC分类号： H01L21/76841 , C23C14/02 , C23C14/046 , C23C16/02 , C23C16/045 , H01L21/02063 , H01L21/02126 , H01L21/28556 , H01L21/3105 , H01L21/67207 , H01L21/76814 , H01L21/76826 , H01L21/76843
摘要： A semiconductor device manufacturing method includes: modifying a surface of a burying recess, of which surface is hydrophobic and which is formed in a dielectric film, to a hydrophilic state by supplying a plasma containing H ions and H radicals or a plasma containing NHx (x being 1, 2 or 3) ions and NHx radicals to the dielectric film formed on a substrate and containing silicon, carbon, hydrogen and oxygen, a bottom portion of the burying recess being exposed with a lower conductive layer; and directly forming an adhesion film formed of a Ru film on the hydrophilic surface of the recess. The method further includes burying copper forming a conductive path in the recess.
摘要翻译： 半导体器件制造方法包括：通过供给含有H离子和H基团的等离子体或包含NH x（x）的等离子体，将其表面是疏水性的并且形成在电介质膜中的掩埋凹槽的表面改性为亲水状态 是1,2或3）离子和NH x自由基，形成在衬底上并含有硅，碳，氢和氧的电介质膜，埋入凹部的底部用下导电层暴露; 并且在凹部的亲水性表面上直接形成由Ru膜形成的粘合膜。 该方法还包括在凹槽中形成导电路径的铜。
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公开(公告)号：US08034406B2
公开(公告)日：2011-10-11
申请号：US11526767
申请日：2006-09-26
CPC分类号： C23C16/54 , C23C14/566
摘要： A method and system are provided for integrated substrate processing in Cu metallization. The method includes providing a substrate in a vacuum processing tool containing a plurality of processing systems configured to process the substrate and a substrate transfer system configured to transfer the substrate under vacuum conditions between the plurality of processing systems, and performing an integrated deposition process on the substrate. The plurality of processing systems and the substrate transfer system maintain a base pressure of background gases at 6.8×10−8 Ton or lower, preferably 5×10−8 Torr or lower, during the integrated deposition process. According to one embodiment, the integrated process includes depositing a barrier metal layer on the substrate, and depositing a Cu layer on the barrier metal layer. According to another embodiment, the integrated process further includes depositing a Ru layer on the barrier metal layer, and depositing a Cu layer on the Ru layer.
摘要翻译： 提供了用于Cu金属化中的集成基板处理的方法和系统。 该方法包括在真空处理工具中提供衬底，该真空处理工具包含配置成处理衬底的多个处理系统和被配置为在多个处理系统之间的真空条件下传送衬底的衬底传送系统，以及对 基质。 在整个沉积过程中，多个处理系统和基板传送系统将背景气体的基础压力保持在6.8×10-8吨或更低，优选5×10-8托或更低。 根据一个实施例，集成工艺包括在衬底上沉积阻挡金属层，以及在阻挡金属层上沉积Cu层。 根据另一实施例，集成工艺还包括在阻挡金属层上沉积Ru层，以及在Ru层上沉积Cu层。
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公开(公告)号：US20130237053A1
公开(公告)日：2013-09-12
申请号：US13876682
申请日：2011-09-26
申请人： Tadahiro Ishizaka , Takashi Sakuma , Tatsuo Hatano , Osamu Yokoyama , Atsushi Gomi , Chiaki Yasumuro , Toshihiko Fukushima , Hiroyuki Toshima , Masaya Kawamata , Yasushi Mizusawa , Takara Kato
发明人： Tadahiro Ishizaka , Takashi Sakuma , Tatsuo Hatano , Osamu Yokoyama , Atsushi Gomi , Chiaki Yasumuro , Toshihiko Fukushima , Hiroyuki Toshima , Masaya Kawamata , Yasushi Mizusawa , Takara Kato
IPC分类号： H01L21/768 , H01J37/34
CPC分类号： H01L21/768 , C23C14/021 , C23C14/024 , C23C14/14 , C23C14/345 , C23C14/3492 , C23C14/541 , C23C14/542 , H01J37/34 , H01L21/2855 , H01L21/76865 , H01L21/76873 , H01L21/76877 , H01L21/76882
摘要： A film forming method which generates metal ions from a metal target with a plasma in a processing chamber and attracts the metal ions with a bias to deposit a metal thin film on a target object wherein trenches are formed. The method includes: generating metal ions from a target and attracting the metal ions into a target object with a bias to form a base film in a trench; ionizing a rare gas with the bias in a state where no metal ion is generated and attracting the generated ions into the target object to etch the base film; and plasma sputtering the target to generate metal ions and attracting the metal ions into the object with a high frequency power for bias to deposit a main film as a metal film, while reflowing the main film by heating.
摘要翻译： 一种在处理室中从具有等离子体的金属靶产生金属离子的薄膜形成方法，并且在偏压下吸引金属离子以在形成有沟槽的目标物体上沉积金属薄膜。 该方法包括：从靶产生金属离子并以偏压将金属离子吸引到目标物体中，以在沟槽中形成基膜; 在不产生金属离子的状态下以偏压电离稀有气体，并将产生的离子吸引到目标物体中以蚀刻基膜; 并且等离子体溅射靶以产生金属离子并以高频功率将金属离子吸引到物体中以偏压沉积作为金属膜的主膜，同时通过加热回流主膜。
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9.发明授权公开(公告)号：US07959985B2
公开(公告)日：2011-06-14
申请号：US11378263
申请日：2006-03-20
CPC分类号： C23C16/45542 , C23C16/32 , C23C16/36 , C23C16/509 , C23C16/56
摘要： A method for forming a modified TaC or TaCN film that may be utilized as a barrier film for Cu metallization. The method includes disposing a substrate in a process chamber of a plasma enhanced atomic layer deposition (PEALD) system configured to perform a PEALD process, depositing a TaC or TaCN film on the substrate using the PEALD process, and modifying the deposited TaC or TaCN film by exposing the deposited TaC or TaCN film to plasma excited hydrogen or atomic hydrogen or a combination thereof in order to remove carbon from at least the plasma exposed portion of the deposited TaCN film. The method further includes forming a metal film on the modified TaCN film, where the modified TaCN film provides stronger adhesion to the metal film than the deposited TaCN film. According to one embodiment, a TaCN film is deposited from alternating exposures of TAIMATA and plasma excited hydrogen.
摘要翻译： 用于形成可用作Cu金属化阻挡膜的改性TaC或TaCN膜的方法。 该方法包括将基板设置在等离子体增强原子层沉积（PEALD）系统的处理室中，其被配置为执行PEALD工艺，使用PEALD工艺在基板上沉积TaC或TaCN膜，以及修改沉积的TaC或TaCN膜 通过将沉积的TaC或TaCN膜暴露于等离子体激发的氢或原子氢或其组合，以便从至少沉积的TaCN膜的等离子体暴露部分除去碳。 该方法还包括在改性的TaCN膜上形成金属膜，其中改性的TaCN膜比沉积的TaCN膜提供比金属膜更强的附着力。 根据一个实施方案，通过TAIMATA和等离子体激发氢的交替曝光沉积TaCN膜。
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公开(公告)号：US20080075835A1
公开(公告)日：2008-03-27
申请号：US11526767
申请日：2006-09-26
CPC分类号： C23C16/54 , C23C14/566
摘要： A method and system are provided for integrated substrate processing in Cu metallization. The method includes providing a substrate in a vacuum processing tool containing a plurality of processing systems configured to process the substrate and a substrate transfer system configured to transfer the substrate under vacuum conditions between the plurality of processing systems, and performing an integrated deposition process on the substrate. The plurality of processing systems and the substrate transfer system maintain a base pressure of background gases at 6.8×10−8 Torr or lower, preferably 5×10−8 Torr or lower, during the integrated deposition process. According to one embodiment, the integrated process includes depositing a barrier metal layer on the substrate, and depositing a Cu layer on the barrier metal layer. According to another embodiment, the integrated process further includes depositing a depositing a Ru layer on the barrier metal layer, and depositing a Cu layer on the Ru layer.
摘要翻译： 提供了用于Cu金属化中的集成基板处理的方法和系统。 该方法包括在真空处理工具中提供衬底，该真空处理工具包含配置成处理衬底的多个处理系统和被配置为在多个处理系统之间的真空条件下传送衬底的衬底传送系统，以及对 基质。 多个处理系统和基板传送系统在背景气体的基础压力下保持6.8×10 -8乇或更低，优选为5×10 -8乇或更低，在 综合沉积工艺。 根据一个实施例，集成工艺包括在衬底上沉积阻挡金属层，以及在阻挡金属层上沉积Cu层。 根据另一个实施例，集成工艺还包括在阻挡金属层上沉积Ru层，以及在Ru层上沉积Cu层。
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