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    Voltage generating circuit, voltage generating device and semiconductor device using the same, and driving method thereof
    1.
    发明授权
    Voltage generating circuit, voltage generating device and semiconductor device using the same, and driving method thereof 有权
    电压产生电路，电压产生装置和使用该电压产生装置的半导体装置及其驱动方法

    公开(公告)号：US07053693B2

    公开(公告)日：2006-05-30

    申请号：US10765175

    申请日：2004-01-28

    申请人： Kenji Toyoda ,  Michihito Ueda ,  Kiyoshi Morimoto ,  Kiyoyuki Morita

    发明人： Kenji Toyoda ,  Michihito Ueda ,  Kiyoshi Morimoto ,  Kiyoyuki Morita

    IPC分类号： G05F1/10

    CPC分类号： G11C11/4087 ,  G11C11/22 ,  G11C11/4074

    摘要： A voltage generating circuit comprising a capacitor (4), a ferroelectric capacitor (6) serially connected to the capacitor (4), an output terminal (11), a capacitor (10) which grounds the output terminal (11), a supply voltage supplying terminal (13), a switch (1) which connects the supply voltage supplying terminal (13) and the connecting node (N1) of the two capacitors (4, 6), and a switch (9) which connects the connecting node (N1) and output terminal (11); wherein during a first period, with the two switches (1) and (9) placed in the OFF state, a terminal (3) is grounded and a terminal (7) is provided with a supply voltage; wherein during a second period, the terminal (3) is provided with the supply voltage and the switch (9) is placed in the ON state; wherein during a third period, the switch (9) is placed in the OFF state, the switch (1) is placed in the ON state, and the terminal (7) is grounded; wherein during a fourth period, the terminal (7) is provided with the supply voltage; and wherein thereafter the first through fourth periods are repeated.

    摘要翻译： 一种电压产生电路，包括电容器（4），串联连接到电容器（4）的铁电电容器（6），输出端子（11），接地输出端子（11）的电容器（10） 供给端子（13），连接电源电压端子（13）和两个电容器（4,6）的连接节点（N1）的开关（1）和连接节点 （N 1）和输出端子（11）; 其中在第一时段期间，当两个开关（1）和（9）处于断开状态时，端子（3）接地，端子（7）被提供有电源电压; 其中在第二时段期间，端子（3）设置有电源电压，开关（9）置于ON状态; 其中，在第三时段期间，开关（9）处于断开状态，开关（1）置于导通状态，端子（7）接地; 其中在第四时段期间，所述端子（7）被提供有电源电压; 此后重复第一至第四周期。

    Potential generating circuit, potential generating device and semiconductor device using the same, and driving method thereof
    2.
    发明授权
    Potential generating circuit, potential generating device and semiconductor device using the same, and driving method thereof 有权
    电位发生电路，电位产生装置及使用其的半导体装置及其驱动方法

    公开(公告)号：US06809953B2

    公开(公告)日：2004-10-26

    申请号：US10440277

    申请日：2003-05-16

    申请人： Kenji Toyoda ,  Michihito Ueda ,  Kiyoshi Morimoto ,  Kiyoyuki Morita ,  Toru Iwata ,  Jun Kajiwara

    发明人： Kenji Toyoda ,  Michihito Ueda ,  Kiyoshi Morimoto ,  Kiyoyuki Morita ,  Toru Iwata ,  Jun Kajiwara

    IPC分类号： G11C1122

    CPC分类号： H02M3/07 ,  H02M3/073

    摘要： A potential generating circuit comprises a capacitor (4); a ferroelectric capacitor (6) connected in series to the capacitor (4); an output terminal (11); a capacitor (10) for grounding the output terminal (11); a switch (9) for connecting a connecting node (5) between the two capacitors (4, 6) to the output terminal (11); and a switch (1) for connecting the connecting node (5) to the ground; wherein during a first period, with the switches (1) and (9) placed in the OFF state, a terminal (3) is provided with a positive potential and a terminal (7) is grounded; wherein during a second period following the first period, the terminal (3) is grounded and the switch (9) is placed in the ON state; wherein during a third period following the second period, the switch (9) is placed in the OFF state, the switch (1) is placed in the ON state, and the terminal (7) is provided with a positive potential; wherein during a fourth period following the third period, the terminal (7) is grounded; and wherein the first through fourth periods are repeated.

    摘要翻译： 电位发生电路包括电容器（4）; 与电容器（4）串联连接的铁电电容器（6）。 输出端子（11）; 用于使输出端子（11）接地的电容器（10）; 用于将两个电容器（4,6）之间的连接节点（5）连接到输出端子（11）的开关（9）; 和用于将连接节点（5）连接到地面的开关（1）; 其中在第一时段期间，当开关（1）和（9）处于断开状态时，端子（3）被提供有正电位并且端子（7）接地; 其中在所述第一周期之后的第二时段期间，所述端子（3）接地，并且所述开关（9）处于接通状态; 其中在所述第二时段之后的第三时段期间，所述开关（9）处于断开状态，所述开关（1）处于接通状态，并且所述端子（7）被提供有正电位; 其中在所述第三周期之后的第四周期期间，所述终端（7）接地; 并且其中重复第一至第四周期。

    Semiconductor device
    4.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US06847071B2

    公开(公告)日：2005-01-25

    申请号：US10161696

    申请日：2002-06-05

    申请人： Michihito Ueda ,  Kenji Toyoda ,  Kiyoyuki Morita ,  Takashi Ohtsuka

    发明人： Michihito Ueda ,  Kenji Toyoda ,  Kiyoyuki Morita ,  Takashi Ohtsuka

    IPC分类号： H01L27/10 ,  G11C27/00 ,  H01L27/108 ,  H01L29/76 ,  H01L29/94 ,  H01L31/119

    CPC分类号： G11C27/005 ,  G11C11/54 ,  H01L2924/0002 ,  H01L2924/00

    摘要： In an electric potential generating device, a source of an N type MIS transistor is mutually connected to that of a P type MIS transistor and also connected to an output terminal. A drain of an N type MIS transistor 54 is connected to a power supply voltage supply portion for supplying power supply voltage VDD, and a drain of the P type MIS transistor is connected to a ground. In addition, a substrate potential of the N type MIS transistor is a ground voltage VSS, and that of a P type MIS transistor 56 is the power supply voltage VDD. Thus, it is constituted as a source follower circuit for taking output out of the source. It is possible, by utilizing this electric potential generating device, to obtain a logic transformation circuit for stably switching between NOR operation and NAND operation.

    摘要翻译： 在电位产生装置中，N型MIS晶体管的源极相互连接到P型MIS晶体管的源极，并且还连接到输出端子。 N型MIS晶体管54的漏极连接到用于提供电源电压VDD的电源电压供应部分，并且P型MIS晶体管的漏极连接到地。 此外，N型MIS晶体管的衬底电位为接地电压VSS，P型MIS晶体管56的衬底电位为电源电压VDD。 因此，它构成为用于从源极输出的源极跟随器电路。 通过利用该电位产生装置可以获得用于在NOR操作和NAND操作之间稳定切换的逻辑变换电路。

    Semiconductor device and learning method thereof
    5.
    发明授权
    Semiconductor device and learning method thereof 失效
    半导体器件及其学习方法

    公开(公告)号：US06844582B2

    公开(公告)日：2005-01-18

    申请号：US10434358

    申请日：2003-05-09

    申请人： Michihito Ueda ,  Kenji Toyoda ,  Takashi Ohtsuka ,  Kiyoyuki Morita

    发明人： Michihito Ueda ,  Kenji Toyoda ,  Takashi Ohtsuka ,  Kiyoyuki Morita

    IPC分类号： G06N3/063 ,  G11C27/00 ,  H01L21/8246 ,  H01L21/8247 ,  H01L21/84 ,  H01L27/115 ,  H01L27/12 ,  H01L45/00 ,  H01L29/76 ,  H01L27/108 ,  G06F15/18 ,  G06G7/00

    CPC分类号： H01L27/11502 ,  G06N3/0635 ,  G11C11/54 ,  G11C27/00 ,  H01L21/84 ,  H01L27/115 ,  H01L27/11507 ,  H01L27/11521 ,  H01L27/11585 ,  H01L27/1159 ,  H01L27/1203 ,  H01L45/06 ,  H01L45/1206 ,  H01L45/144

    摘要： A learning method of a semiconductor device of the present invention comprises a neuro device having a multiplier as a synapse in which a weight varies according to an input weight voltage, and functioning as a neural network system that processes analog data, comprising a step A of inputting predetermined input data to the neuro device and calculating an error between a target value of an output of the neuro device with respect to the input data and an actual output, a step B of calculating variation amount in the error by varying a weight of the multiplier thereafter, and a step C of varying the weight of the multiplier based on the variation amount in the error, wherein in the steps B and C, after inputting a reset voltage for setting the weight to a substantially constant value to the multiplier as the weight voltage, the weight is varied by inputting the weight voltage corresponding to the weight to be varied.

    摘要翻译： 本发明的半导体器件的学习方法包括具有倍增器作为突触的神经器件，其中重量根据输入重量电压而变化，并且用作处理模拟数据的神经网络系统，其包括步骤A的步骤A 向神经装置输入预定的输入数据并计算神经装置的输出的目标值相对于输入数据与实际输出之间的误差;步骤B，通过改变神经元的重量来计算误差的变化量; 之后的乘法器，以及基于误差变化量来改变乘法器的权重的步骤C，其中在步骤B和C中，在输入用于将权重设定为基本恒定值的复位电压之后， 重量电压，通过输入与要变化的重量相对应的重量电压来改变重量。

    Multilevel semiconductor memory device and method for driving the same as a neuron element in a neural network computer
    6.
    发明授权
    Multilevel semiconductor memory device and method for driving the same as a neuron element in a neural network computer 有权
    多电平半导体存储器件及其在神经网络计算机中作为神经元元件驱动的方法

    公开(公告)号：US06940740B2

    公开(公告)日：2005-09-06

    申请号：US10428840

    申请日：2003-05-05

    申请人： Michihito Ueda ,  Takashi Ohtsuka ,  Kiyoyuki Morita

    发明人： Michihito Ueda ,  Takashi Ohtsuka ,  Kiyoyuki Morita

    IPC分类号： G11C11/22 ,  G11C11/56 ,  H01L21/8246 ,  H01L27/105 ,  H01L27/115 ,  H01L29/788

    CPC分类号： H01L27/11502 ,  G11C11/22 ,  G11C11/223 ,  G11C11/54 ,  G11C11/5657 ,  H01L27/105 ,  H01L27/11507 ,  H01L29/7881

    摘要： A semiconductor device includes: a control-voltage supply unit 110; an MOS transistor including a gate electrode 109 and drain and source regions 103a and 103b; a dielectric capacitor 104; and a resistor 106. The dielectric capacitor 104 and the resistor 106 are disposed in parallel and interposed between the gate electrode 109 and the control-voltage supply unit 110. With this structure, a charge is accumulated in each of an intermediate electrode of the dielectric capacitor 104 and the gate electrode 109 upon the application of a voltage, thereby varying a threshold value of the MOS transistor. In this manner, the history of input signals can be stored as a variation in a drain current in the MOS transistor, thus allowing multilevel information to be held.

    摘要翻译： 半导体器件包括：控制电压提供单元110; 包括栅电极109和漏极和源极区103a和103b的MOS晶体管; 介质电容器104; 和电阻器106。 介质电容器104和电阻器106并联设置并插入在栅电极109和控制电压供给单元110之间。 利用这种结构，在施加电压时，介质电容器104和栅电极109的中间电极中的每一个中积累电荷，从而改变MOS晶体管的阈值。 以这种方式，可以将输入信号的历史存储为MOS晶体管中的漏极电流的变化，从而允许保持多电平信息。

    Method for removing foreign matter, method for forming film, semiconductor device and film forming apparatus
    7.
    发明授权
    Method for removing foreign matter, method for forming film, semiconductor device and film forming apparatus 失效
    异物去除方法，薄膜形成方法，半导体装置和成膜装置

    公开(公告)号：US06716663B2

    公开(公告)日：2004-04-06

    申请号：US10230258

    申请日：2002-08-29

    申请人： Kiyoyuki Morita ,  Takashi Ohtsuka ,  Michihito Ueda

    发明人： Kiyoyuki Morita ,  Takashi Ohtsuka ,  Michihito Ueda

    IPC分类号： H01L2100

    CPC分类号： H01L29/513 ,  C23C16/409 ,  C23C16/4485 ,  H01L21/28167 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/28291 ,  H01L21/31691 ,  H01L29/516 ,  H01L29/517 ,  H01L29/518

    摘要： A semiconductor substrate is placed within a housing. By supplying organometallic complexes and carbon dioxide in a supercritical state into the housing, a BST thin film is formed on a platinum thin film, while at the same time, carbon compounds, which are produced when the BST thin film is formed, are removed. The solubility of carbon compounds in the supercritical carbon dioxide is very high, and yet the viscosity of the supercritical carbon dioxide is low. Accordingly, the carbon compounds are removable efficiently from the BST thin film. An oxide or nitride film may also be formed by performing oxidation or nitriding at a low temperature using water in a supercritical or subcritical state, for example.

    摘要翻译： 将半导体衬底放置在壳体内。 通过将超临界状态的有机金属配合物和二氧化碳供给到壳体中，在铂薄膜上形成BST薄膜，同时除去形成BST薄膜时产生的碳化合物。 碳化合物在超临界二氧化碳中的溶解度非常高，而超临界二氧化碳的粘度低。 因此，碳化合物可从BST薄膜有效地去除。 氧化物或氮化物膜也可以通过使用例如超临界或亚临界状态的水在低温下进行氧化或氮化来形成。

    Stochastic processor, driving method thereof, and recognition process device using the same
    10.
    发明授权
    Stochastic processor, driving method thereof, and recognition process device using the same 有权
    随机处理器，其驱动方法和使用其的识别处理装置

    公开(公告)号：US07493353B2

    公开(公告)日：2009-02-17

    申请号：US10781819

    申请日：2004-02-20

    申请人： Michihito Ueda ,  Kiyoyuki Morita

    发明人： Michihito Ueda ,  Kiyoyuki Morita

    IPC分类号： G06J1/00 ,  G06G7/00

    CPC分类号： G06N7/005

    摘要： A stochastic processor of the present invention includes a fluctuation generator configured to output an analog quantity having a fluctuation, a fluctuation difference calculation means configured to output fluctuation difference data with an output of the fluctuation generator added to analog difference between two data, a thresholding unit configured to perform thresholding on an output of the fluctuation difference calculation means to thereby generate a pulse, and a pulse detection means configured to detect the pulse output from the thresholding unit.

    摘要翻译： 本发明的随机处理器包括：波动发生器，被配置为输出具有波动的模拟量;波动差计算装置，被配置为输出波动差分数据，其中波动发生器的输出相加于两个数据之间的模拟差值;阈值单元 被配置为对所述波动差计算装置的输出执行阈值处理，从而生成脉冲;以及脉冲检测装置，被配置为检测从所述阈值单元输出的脉冲。