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    Coumarin derivative and use thereof
    2.
    发明授权
    Coumarin derivative and use thereof 失效
    香豆素衍生物及其用途

    公开(公告)号：US5574062A

    公开(公告)日：1996-11-12

    申请号：US347467

    申请日：1994-12-13

    申请人： Koichi Hashimoto ,  Akio Yamada ,  Hirokazu Hamano ,  Shigehiro Mori ,  Hisako Moriuchi

    发明人： Koichi Hashimoto ,  Akio Yamada ,  Hirokazu Hamano ,  Shigehiro Mori ,  Hisako Moriuchi

    IPC分类号： C07D311/16 ,  C07D407/04 ,  C07D409/04 ,  A61K31/37 ,  C07D311/20

    CPC分类号： C07D407/04 ,  C07D311/16 ,  C07D409/04

    摘要： The present invention provides compounds having 12-lipoxygenase inhibitory effect and medicines inhibiting 12-lipoxygenase selectively, and relates to novel coumarin derivatives and medicines containing the compounds as effective ingredients. Furthermore, this invention relates to compounds capable of converting to compounds inhibiting 12-lipoxygenase activities selectively according to the cleavage of modified moieties in vivo and medicines inhibiting 12-lipoxygenase selectively, and relates to novel coumarin derivatives having acyl groups as modified moieties and medicines containing the compounds as effective ingredients. The compounds of the present invention can inhibit 12-lipoxygenase strongly and selectively, and being useful as medicines for preventing and treating various circulatory diseases such as arteriosclerosis and vasospasm and for preventing of the metastasis of some kinds of cancers, and show low toxicity and few side effects.

    摘要翻译： PCT No.PCT / JP94 / 00615 Sec。 371日期1994年12月13日第 102（e）日期1994年12月13日PCT 1994年4月12日PCT PCT。 公开号WO94 / 24119 日期：1994年10月27日本发明提供具有12-脂肪氧合酶抑制作用的化合物和选择性抑制12-脂肪氧合酶的药物，涉及新型香豆素衍生物和含有该化合物作为有效成分的药物。 此外，本发明涉及能够根据体内修饰部分的切割和选择性抑制12-脂肪氧合酶的药物选择性地转化成抑制12-脂肪氧合酶活性的化合物的化合物，并且涉及具有酰基作为修饰部分的新型香豆素衍生物和含有 该化合物为有效成分。 本发明化合物能够强烈，有选择地抑制12-脂肪氧合酶，可用作预防和治疗各种循环系统疾病如动脉硬化和血管痉挛以及预防某些癌症转移的药物，并且显示低毒性和少量 副作用。

    Lead-free glass for semiconductor encapsulation
    3.
    发明授权
    Lead-free glass for semiconductor encapsulation 有权
    无铅玻璃用于半导体封装

    公开(公告)号：US09230872B2

    公开(公告)日：2016-01-05

    申请号：US13805039

    申请日：2011-06-17

    申请人： Koichi Hashimoto

    发明人： Koichi Hashimoto

    IPC分类号： H01L23/29 ,  C03C8/02 ,  C03C3/068 ,  C03C3/095 ,  C03C8/24 ,  H01L33/56

    CPC分类号： H01L23/291 ,  C03C3/068 ,  C03C3/095 ,  C03C8/24 ,  H01L33/56 ,  H01L2924/0002 ,  H01L2924/00

    摘要： The technical task of the present invention is to provide a lead-free glass for semiconductor encapsulation, which is easy to automate an appearance inspection, and furthermore, has excellent refinability and encapsulatability of semiconductor devices. In the lead-free glass for semiconductor encapsulation according to the present invention, a temperature at which the viscosity of glass is 106 dPa·s is 670° C. or lower, and, as a glass composition, the content of CeO2 is from 0.01 to 6% by mass, and the content of Sb2O3 is 0.1% by mass or less.

    摘要翻译： 本发明的技术任务是提供一种用于半导体封装的无铅玻璃，其容易自动进行外观检查，此外，具有优异的可熔性和半导体器件的可封装性。 在本发明的半导体封装用无铅玻璃中，玻璃粘度为106dPa·s的温度为670℃以下，作为玻璃组合物，CeO 2的含量为0.01 〜6质量％，Sb 2 O 3的含量为0.1质量％以下。

    Semiconductor element, semiconductor device, and power converter
    4.
    发明授权
    Semiconductor element, semiconductor device, and power converter 有权
    半导体元件，半导体器件和功率转换器

    公开(公告)号：US08933463B2

    公开(公告)日：2015-01-13

    申请号：US13780876

    申请日：2013-02-28

    申请人： Kazuhiro Adachi ,  Osamu Kusumoto ,  Masao Uchida ,  Koichi Hashimoto ,  Shun Kazama

    发明人： Kazuhiro Adachi ,  Osamu Kusumoto ,  Masao Uchida ,  Koichi Hashimoto ,  Shun Kazama

    IPC分类号： H01L29/16 ,  H01L29/66 ,  H01L29/78 ,  H03K17/14 ,  H01L29/45

    CPC分类号： H01L29/1608 ,  H01L29/45 ,  H01L29/66068 ,  H01L29/7805 ,  H01L29/7827 ,  H01L29/7828 ,  H03K17/145

    摘要： A semiconductor element including an MISFET exhibits diode characteristics in a reverse direction through an epitaxial channel layer. The semiconductor element includes: a silicon carbide semiconductor substrate of a first conductivity type, semiconductor layer of the first conductivity type, body region of a second conductivity type, source region of the first conductivity type, epitaxial channel layer in contact with the body region, source electrode, gate insulating film, gate electrode and drain electrode. If the voltage applied to the gate electrode is smaller than a threshold voltage, the semiconductor element functions as a diode wherein current flows from the source electrode to the drain electrode through the epitaxial channel layer. The absolute value of the turn-on voltage of this diode is smaller than the turn-on voltage of a body diode that is formed of the body region and the first silicon carbide semiconductor layer.

    摘要翻译： 包括MISFET的半导体元件通过外延沟道层在相反方向上表现出二极管特性。 半导体元件包括：第一导电类型的碳化硅半导体衬底，第一导电类型的半导体层，第二导电类型的主体区域，第一导电类型的源极区域，与身体区域接触的外延沟道层， 源电极，栅极绝缘膜，栅电极和漏电极。 如果施加到栅电极的电压小于阈值电压，则半导体元件用作二极管，其中电流从源电极通过外延沟道层流到漏电极。 该二极管的导通电压的绝对值小于由体区和第一碳化硅半导体层形成的体二极管的导通电压。

    MODULAR DATA CENTER
    5.
    发明申请
    MODULAR DATA CENTER 审中-公开
    模块化数据中心

    公开(公告)号：US20130058029A1

    公开(公告)日：2013-03-07

    申请号：US13557635

    申请日：2012-07-25

    申请人： Hideyoshi Ootani ,  Kazuhide Sato ,  Makoto Honda ,  Koichi Hashimoto ,  Tomoyuki Kinoshita ,  Masaaki Yamamoto ,  Kobun Takahashi ,  Hiroshi Morimoto

    发明人： Hideyoshi Ootani ,  Kazuhide Sato ,  Makoto Honda ,  Koichi Hashimoto ,  Tomoyuki Kinoshita ,  Masaaki Yamamoto ,  Kobun Takahashi ,  Hiroshi Morimoto

    IPC分类号： G06F1/20

    CPC分类号： F24F3/044 ,  H05K7/1497 ,  H05K7/20745

    摘要： A data center is disclosed that includes a container; a server; a rack installed within the container and storing the server; and a curtain fixed to at least one point of the rack or the container and separating an internal space of the container between a cold side and a hot side; wherein the rack is configured to enable the circulation of air from the cold side to the hot side. The curtain is fixed by a removable clamping mechanism. The data center further includes a modular refrigeration unit configured to attach to the container and direct cold air into the cold area. At least one prop is positioned below a bottom of the housing and connected to a container bottom, the prop is configured to absorb vibration of the container or housing.

    摘要翻译： 公开了一种包括容器的数据中心; 一个服务器 安装在容器内并存储服务器的机架; 以及窗帘，其固定在所述架子或所述容器的至少一个点上，并且在所述冷侧和所述热侧之间分离所述容器的内部空间; 其中，所述支架构造成能够使空气从所述冷侧循环到所述热侧。 窗帘通过可拆卸的夹紧机构固定。 数据中心还包括模块化制冷单元，其被配置为附接到容器并将冷空气引导到冷区域中。 至少一个支柱位于壳体的底部下方并连接到容器底部，支撑构造成吸收容器或壳体的振动。

    Semiconductor element, semiconductor device, and electric power converter
    6.
    发明授权
    Semiconductor element, semiconductor device, and electric power converter 有权
    半导体元件，半导体器件和电力转换器

    公开(公告)号：US08283973B2

    公开(公告)日：2012-10-09

    申请号：US13389555

    申请日：2010-08-09

    申请人： Koichi Hashimoto ,  Kazuhiro Adachi ,  Osamu Kusumoto ,  Masao Uchida ,  Shun Kazama

    发明人： Koichi Hashimoto ,  Kazuhiro Adachi ,  Osamu Kusumoto ,  Masao Uchida ,  Shun Kazama

    IPC分类号： G05F3/02

    CPC分类号： H01L29/7828 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/78 ,  H01L29/7838 ,  H02M7/5387 ,  Y02B70/1483

    摘要： A semiconductor element 100 including an MISFET according to the present invention is characterized by having diode characteristics in a reverse direction through an epitaxial channel layer 50. The semiconductor element 100 includes a semiconductor layer 20 of a first conductivity type, a body region 30 of a second conductivity type, source and drain regions 40 and 75 of the first conductivity type, an epitaxial channel layer 50 in contact with the body region, source and drain electrodes 45 and 70, a gate insulating film 60, and a gate electrode 65. If the voltage applied to the gate electrode of the MISFET is smaller than a threshold voltage, the semiconductor element 100 functions as a diode in which current flows from the source electrode 45 to the drain electrode 70 through the epitaxial channel layer 50. The absolute value of the turn-on voltage of this diode is smaller than that of the turn-on voltage of a body diode that is formed of the body region and the first silicon carbide semiconductor layer.

    摘要翻译： 包括根据本发明的MISFET的半导体元件100的特征在于通过外延沟道层50在相反方向上具有二极管特性。半导体元件100包括第一导电类型的半导体层20，第一导电类型的体区30 第二导电类型，第一导电类型的源极和漏极区域40和75，与主体区域接触的外延沟道层50，源极和漏极电极45和70，栅极绝缘膜60和栅电极65.如果 施加到MISFET的栅电极的电压小于阈值电压，半导体元件100用作二极管，其中电流通过外延沟道层50从源电极45流到漏极70。绝对值 该二极管的导通电压小于由体区和第一硅碳化物形成的体二极管的导通电压的导通电压 e半导体层。

    SEMICONDUCTOR ELEMENT, SEMICONDUCTOR DEVICE, AND POWER CONVERTER
    7.
    发明申请
    SEMICONDUCTOR ELEMENT, SEMICONDUCTOR DEVICE, AND POWER CONVERTER 有权
    半导体元件，半导体器件和电源转换器

    公开(公告)号：US20120057386A1

    公开(公告)日：2012-03-08

    申请号：US13266271

    申请日：2010-04-28

    申请人： Kazuhiro Adachi ,  Osamu Kusumoto ,  Masao Uchida ,  Koichi Hashimoto ,  Shun Kazama

    发明人： Kazuhiro Adachi ,  Osamu Kusumoto ,  Masao Uchida ,  Koichi Hashimoto ,  Shun Kazama

    IPC分类号： H02M7/537 ,  H01L29/24

    CPC分类号： H01L29/1608 ,  H01L29/45 ,  H01L29/66068 ,  H01L29/7805 ,  H01L29/7827 ,  H01L29/7828 ,  H03K17/145

    摘要： A semiconductor element 100 including an MISFET according to the present invention is characterized by having diode characteristics in a reverse direction through an epitaxial channel layer 50. The semiconductor element 100 includes a silicon carbide semiconductor substrate 10 of a first conductivity type, a semiconductor layer 20 of the first conductivity type, a body region 30 of a second conductivity type, a source region 40 of the first conductivity type, an epitaxial channel layer 50 in contact with the body region, a source electrode 45, a gate insulating film 60, a gate electrode 65 and a drain electrode 70. If the voltage applied to the gate electrode of the MISFET is smaller than a threshold voltage, the semiconductor element 100 functions as a diode in which current flows from the source electrode 45 to the drain electrode 70 through the epitaxial channel layer 50. The absolute value of the turn-on voltage of this diode is smaller than that of the turn-on voltage of a body diode that is formed of the body region and the first silicon carbide semiconductor layer.

    摘要翻译： 包括根据本发明的MISFET的半导体元件100的特征在于通过外延沟道层50在相反方向上具有二极管特性。半导体元件100包括第一导电类型的碳化硅半导体衬底10，半导体层20 第一导电类型的体区30，第一导电类型的源极区40，与体区接触的外延沟道层50，源电极45，栅极绝缘膜60， 栅电极65和漏电极70.如果施加到MISFET的栅电极的电压小于阈值电压，则半导体元件100用作二极管，其中电流从源电极45流到漏电极70通过 外延沟道层50.该二极管的导通电压的绝对值小于体二的导通电压的绝对值 由所述体区和所述第一碳化硅半导体层形成。

    Semiconductor encapsulation material and method for encapsulating semiconductor using the same
    8.
    发明授权
    Semiconductor encapsulation material and method for encapsulating semiconductor using the same 有权
    半导体封装材料及其使用其封装半导体的方法

    公开(公告)号：US07968380B2

    公开(公告)日：2011-06-28

    申请号：US12489561

    申请日：2009-06-23

    申请人： Koichi Hashimoto

    发明人： Koichi Hashimoto

    IPC分类号： H01L21/00 ,  C03C3/076 ,  C03C3/089

    CPC分类号： C03C8/02 ,  C03C8/08 ,  H01L23/291 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A semiconductor encapsulation material of the present invention contains a glass for metal coating which has a strain point of 480° C. or higher, a temperature corresponding to a viscosity of 104 dPa·s of 1,100° C. or lower, and a thermal expansion coefficient at 30 to 380° C. of 70×10−7 to 110×10−7/° C. The semiconductor encapsulation material of the present invention contains no environmentally harmful substances, has a heat resistance temperature as high as 500° C. or above, and can be used for the encapsulation of metals susceptible to oxidation, e.g., Dumet.

    摘要翻译： 本发明的半导体封装材料含有应变点为480℃以上的金属涂层用玻璃，对应于粘度为104dPa·s的温度为1100℃以下的温度，热膨胀 30〜380℃的系数为70×10-7〜110×10-7 /℃。本发明的半导体封装材料不含环境有害物质，耐热温度高达500℃。 或以上，并且可用于包封易受氧化的金属，例如Dumet。

    SEMICONDUCTOR ELEMENT AND METHOD FOR MANUFACTURING SAME
    10.
    发明申请
    SEMICONDUCTOR ELEMENT AND METHOD FOR MANUFACTURING SAME 有权
    半导体元件及其制造方法

    公开(公告)号：US20090101918A1

    公开(公告)日：2009-04-23

    申请号：US12300352

    申请日：2007-05-17

    申请人： Masao Uchida ,  Koichi Hashimoto ,  Masashi Hayashi

    发明人： Masao Uchida ,  Koichi Hashimoto ,  Masashi Hayashi

    IPC分类号： H01L29/12 ,  H01L21/04

    CPC分类号： H01L29/7802 ,  H01L21/046 ,  H01L29/0696 ,  H01L29/1608 ,  H01L29/41741 ,  H01L29/66068 ,  H01L29/7828

    摘要： A semiconductor device includes: a semiconductor layer 10; a semiconductor region 15s of a first conductivity type defined on the surface 10s of the semiconductor layer; a semiconductor region 14s of a second conductivity type defined on the surface 10s of the semiconductor layer to surround the semiconductor region 15s; and a conductor 19 with a conductive surface 19s to contact with the semiconductor regions 15s and 14s. The semiconductor layer 10 includes silicon carbide. At least one of the semiconductor region 15s and the conductive surface 19s is not circular. The semiconductor region 15s and the conductive surface 19s are shaped such that as the degree of misalignment between the conductive surface 19s and the semiconductor region 15s increases from zero through one-third of the width of the conductive surface 19s, a portion of the profile of the conductive surface 19s that crosses the semiconductor region 15s has smoothly changing lengths.

    摘要翻译： 半导体器件包括：半导体层10; 限定在半导体层的表面10s上的第一导电类型的半导体区域15s; 限定在半导体层的表面10s上以包围半导体区域15s的第二导电类型的半导体区域14s; 以及具有导电表面19s以与半导体区域15s和14s接触的导体19。 半导体层10包括碳化硅。 半导体区域15s和导电表面19s中的至少一个不是圆形的。 半导体区域15s和导电表面19s被成形为使得当导电表面19s和半导体区域15s之间的未对准程度从零增加到导电表面19s的宽度的三分之一时，轮廓的一部分 穿过半导体区域15s的导电表面19s具有平滑变化的长度。