公开(公告)号：US20070241406A1

公开(公告)日：2007-10-18

申请号：US11402907

申请日：2006-04-13

申请人： Kuo-Feng Yu ,  Jian-Hsing Lee ,  Juing-Yi Wu ,  Chong-Gim Gan ,  Dun-Nian Yaung

发明人： Kuo-Feng Yu ,  Jian-Hsing Lee ,  Juing-Yi Wu ,  Chong-Gim Gan ,  Dun-Nian Yaung

IPC分类号： H01L23/62

CPC分类号： H01L29/0847 ,  H01L23/60 ,  H01L27/0277 ,  H01L29/0692 ,  H01L29/41725 ,  H01L29/41758 ,  H01L29/78 ,  H01L2924/0002 ,  H01L2924/00

摘要： An integrated circuit has functional circuitry coupled to a terminal. An electrostatic discharge protector can be coupled to the terminal to protect the functional circuitry from an electrostatic discharge. A substrate includes a first semiconductor material with a first dopant type. A plurality of drain segments adjoin the substrate. Each of the drain segments has a first conductor, a second conductor, and a third conductor. A central via set in a central region of the drain segment couples the second conductor to the third conductor. A peripheral via set in a peripheral region of the drain segment couples the first conductor to the second conductor. A plurality of source segments adjoin the substrate and laterally interlace with the drain segments. If an electrostatic discharge is detected at the terminal of the integrated circuit, an electrical current of the ESD is directed into the electrostatic discharge protector and distributed substantially uniformly among a plurality of resistive paths in the electrostatic discharge protector.

摘要翻译： 集成电路具有耦合到终端的功能电路。 静电放电保护器可以耦合到端子以保护功能电路免受静电放电。 衬底包括具有第一掺杂剂类型的第一半导体材料。 多个漏极段邻接衬底。 每个漏极段具有第一导体，第二导​​体和第三导体。 设置在排水段的中心区域的中心通孔将第二导体连接到第三导体。 设置在漏极段的外围区域中的周边通孔将第一导体耦合到第二导体。 多个源区段与衬底相邻并与排水段横向交错。 如果在集成电路的端子处检测到静电放电，则ESD的电流被引导到静电放电保护器中并且基本均匀地分布在静电放电保护器中的多个电阻路径之中。

公开(公告)号：US07309897B2

公开(公告)日：2007-12-18

申请号：US11402907

申请日：2006-04-13

申请人： Kuo-Feng Yu ,  Jian-Hsing Lee ,  Juing-Yi Wu ,  Chong-Gim Gan ,  Dun-Nian Yaung

发明人： Kuo-Feng Yu ,  Jian-Hsing Lee ,  Juing-Yi Wu ,  Chong-Gim Gan ,  Dun-Nian Yaung

IPC分类号： H01L23/62

CPC分类号： H01L29/0847 ,  H01L23/60 ,  H01L27/0277 ,  H01L29/0692 ,  H01L29/41725 ,  H01L29/41758 ,  H01L29/78 ,  H01L2924/0002 ,  H01L2924/00

摘要： An integrated circuit has functional circuitry coupled to a terminal. An electrostatic discharge protector can be coupled to the terminal to protect the functional circuitry from an electrostatic discharge. A substrate includes a first semiconductor material with a first dopant type. A plurality of drain segments adjoin the substrate. Each of the drain segments has a first conductor, a second conductor, and a third conductor. A central via set in a central region of the drain segment couples the second conductor to the third conductor. A peripheral via set in a peripheral region of the drain segment couples the first conductor to the second conductor. A plurality of source segments adjoin the substrate and laterally interlace with the drain segments. If an electrostatic discharge is detected at the terminal of the integrated circuit, an electrical current of the ESD is directed into the electrostatic discharge protector and distributed substantially uniformly among a plurality of resistive paths in the electrostatic discharge protector.

摘要翻译： 集成电路具有耦合到终端的功能电路。 静电放电保护器可以耦合到端子以保护功能电路免受静电放电。 衬底包括具有第一掺杂剂类型的第一半导体材料。 多个漏极段邻接衬底。 每个漏极段具有第一导体，第二导​​体和第三导体。 设置在排水段的中心区域的中心通孔将第二导体连接到第三导体。 设置在漏极段的外围区域中的周边通孔将第一导体耦合到第二导体。 多个源区段与衬底相邻并与排水段横向交错。 如果在集成电路的端子处检测到静电放电，则ESD的电流被引导到静电放电保护器中并且基本均匀地分布在静电放电保护器中的多个电阻路径之中。

公开(公告)号：US10090349B2

公开(公告)日：2018-10-02

申请号：US13571099

申请日：2012-08-09

申请人： Meng-Hsun Wan ,  Szu-Ying Chen ,  Dun-Nian Yaung ,  Jen-Cheng Liu

发明人： Meng-Hsun Wan ,  Szu-Ying Chen ,  Dun-Nian Yaung ,  Jen-Cheng Liu

IPC分类号： H01L27/146

摘要： A device includes an image sensor chip having an image sensor therein. A read-out chip is underlying and bonded to the image sensor chip, wherein the read-out chip includes a logic device selected from the group consisting essentially of a reset transistor, a source follower, a row selector, and combinations thereof therein. The logic device and the image sensor are electrically coupled to each other, and are parts of a same pixel unit. A peripheral circuit chip is underlying and bonded to the read-out chip, wherein the peripheral circuit chip includes a logic circuit.

公开(公告)号：US09177986B2

公开(公告)日：2015-11-03

申请号：US13598275

申请日：2012-08-29

申请人： Wen-I Hsu ,  Min-Feng Kao ,  Jen-Cheng Liu ,  Dun-Nian Yaung ,  Tzu-Hsuan Hsu ,  Wen-De Wang

发明人： Wen-I Hsu ,  Min-Feng Kao ,  Jen-Cheng Liu ,  Dun-Nian Yaung ,  Tzu-Hsuan Hsu ,  Wen-De Wang

IPC分类号： H01L29/00 ,  H01L27/146 ,  H01L29/06 ,  H01L21/762

CPC分类号： H01L27/14689 ,  H01L21/761 ,  H01L21/76237 ,  H01L27/1463 ,  H01L27/14643 ,  H01L29/0649

摘要： A system and method for isolating semiconductor devices is provided. An embodiment comprises an isolation region that is laterally removed from source/drain regions of semiconductor devices and has a dielectric material extending over the isolation implant between the source/drain regions. The isolation region may be formed by forming an opening through a layer over the substrate, depositing a dielectric material along the sidewalls of the opening, implanting ions into the substrate after the deposition, and filling the opening with another dielectric material.

摘要翻译： 提供一种用于隔离半导体器件的系统和方法。 一个实施例包括从半导体器件的源极/漏极区域侧向移除的隔离区域，并且具有在源极/漏极区域之间的隔离注入物上延伸的电介质材料。 可以通过在衬底上形成通过层的开口形成隔离区域，沿着开口的侧壁沉积电介质材料，在沉积之后将离子注入到衬底中，并用另一种电介质材料填充该开口。

公开(公告)号：US09048162B2

公开(公告)日：2015-06-02

申请号：US13615071

申请日：2012-09-13

申请人： Min-Feng Kao ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Chun-Chieh Chuang ,  Hsiao-Hui Tseng ,  Tzu-Hsuan Hsu

发明人： Min-Feng Kao ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Chun-Chieh Chuang ,  Hsiao-Hui Tseng ,  Tzu-Hsuan Hsu

IPC分类号： H01L31/02 ,  H01L27/146 ,  H01L31/18 ,  H01L31/103

CPC分类号： H01L31/18 ,  H01L27/1461 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/1464 ,  H01L27/14689 ,  H01L31/02 ,  H01L31/103 ,  H01L31/1804 ,  Y02E10/547 ,  Y02P70/521

摘要： A device includes a diode, which includes a first, a second, and a third doped region in a semiconductor substrate. The first doped region is of a first conductivity type, and has a first impurity concentration. The second doped region is of the first conductivity type, and has a second impurity concentration lower than the first impurity concentration. The second doped region encircles the first doped region. The third doped region is of a second conductivity type opposite the first conductivity type, wherein the third doped region overlaps a portion of the first doped region and a portion of the second doped region.

摘要翻译： 一种器件包括二极管，其包括半导体衬底中的第一，第二和第三掺杂区域。 第一掺杂区域是第一导电类型，并具有第一杂质浓度。 第二掺杂区域是第一导电类型，并且具有低于第一杂质浓度的第二杂质浓度。 第二掺杂区域包围第一掺杂区域。 第三掺杂区域具有与第一导电类型相反的第二导电类型，其中第三掺杂区域与第一掺杂区域的一部分和第二掺杂区域的一部分重叠。

公开(公告)号：US09013022B2

公开(公告)日：2015-04-21

申请号：US13198111

申请日：2011-08-04

申请人： Jeng-Shyan Lin ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Wen-De Wang ,  Shuang-Ji Tsai ,  Yueh-Chiou Lin

发明人： Jeng-Shyan Lin ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Wen-De Wang ,  Shuang-Ji Tsai ,  Yueh-Chiou Lin

IPC分类号： H01L31/00 ,  H01L23/00 ,  H01L23/48 ,  H01L27/146 ,  H01L21/768 ,  H01L23/525

CPC分类号： H01L27/14636 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/525 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/45 ,  H01L24/48 ,  H01L24/83 ,  H01L27/14623 ,  H01L27/1463 ,  H01L27/1464 ,  H01L27/14643 ,  H01L27/14683 ,  H01L27/14685 ,  H01L27/14689 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/1134 ,  H01L2224/11916 ,  H01L2224/451 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48453 ,  H01L2224/48463 ,  H01L2224/83359 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/10253 ,  H01L2924/13091 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

摘要： An integrated circuit structure includes a semiconductor substrate, and a dielectric pad extending from a bottom surface of the semiconductor substrate up into the semiconductor substrate. A low-k dielectric layer is disposed underlying the semiconductor substrate. A first non-low-k dielectric layer is underlying the low-k dielectric layer. A metal pad is underlying the first non-low-k dielectric layer. A second non-low-k dielectric layer is underlying the metal pad. An opening extends from a top surface of the semiconductor substrate down to penetrate through the semiconductor substrate, the dielectric pad, and the low-k dielectric layer, wherein the opening lands on a top surface of the metal pad. A passivation layer includes a portion on a sidewall of the opening, wherein a portion of the passivation layer at a bottom of the opening is removed.

摘要翻译： 集成电路结构包括半导体衬底和从半导体衬底的底表面延伸到半导体衬底中的介质衬垫。 低k电介质层设置在半导体衬底下方。 第一个非低k电介质层位于低k电介质层的下面。 金属焊盘位于第一非低k电介质层的下面。 第二个非低k电介质层位于金属焊盘的下方。 开口从半导体衬底的顶表面向下延伸以穿透半导体衬底，电介质衬垫和低k电介质层，其中，开口焊接在金属衬垫的顶表面上。 钝化层包括在开口的侧壁上的部分，其中去除开口底部的钝化层的一部分。

公开(公告)号：US08981510B2

公开(公告)日：2015-03-17

申请号：US12794101

申请日：2010-06-04

申请人： Chun-Chieh Chuang ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Keng-Yu Chou ,  Wen-De Wang ,  Pao-Tung Chen

发明人： Chun-Chieh Chuang ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Keng-Yu Chou ,  Wen-De Wang ,  Pao-Tung Chen

IPC分类号： H01L31/0232 ,  H01L27/146

CPC分类号： H01L27/14685 ,  H01L27/1462 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/1463 ,  H01L27/1464 ,  H01L27/14643 ,  H01L27/14689

摘要： Provided is an image sensor device. The image sensor device includes a substrate having a front side and a back side. The image sensor includes first and second radiation-detection devices that are disposed in the substrate. The first and second radiation-detection devices are operable to detect radiation waves that enter the substrate through the back side. The image sensor also includes an anti-reflective coating (ARC) layer. The ARC layer is disposed over the back side of the substrate. The ARC layer has first and second ridges that are disposed over the first and second radiation-detection devices, respectively. The first and second ridges each have a first refractive index value. The first and second ridges are separated by a substance having a second refractive index value that is less than the first refractive index value.

摘要翻译： 提供了一种图像传感器装置。 图像传感器装置包括具有正面和背面的基板。 图像传感器包括设置在基板中的第一和第二放射线检测装置。 第一和第二放射线检测装置可操作以检测通过背面进入衬底的辐射波。 图像传感器还包括抗反射涂层（ARC）层。 ARC层设置在基板的背面上。 ARC层具有分别设置在第一和第二辐射检测装置上的第一和第二脊。 第一和第二脊各自具有第一折射率值。 第一和第二脊由具有小于第一折射率值的第二折射率值的物质分开。

公开(公告)号：US08946849B2

公开(公告)日：2015-02-03

申请号：US13592124

申请日：2012-08-22

申请人： Shuang-Ji Tsai ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Jeng-Shyan Lin ,  Feng-Chi Hung

发明人： Shuang-Ji Tsai ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Jeng-Shyan Lin ,  Feng-Chi Hung

IPC分类号： H01L21/00 ,  H01L27/146

CPC分类号： H01L27/1464 ,  H01L27/14621 ,  H01L27/14623 ,  H01L27/14687

摘要： A device includes a semiconductor substrate having a front side and a backside. A plurality of image sensors is disposed at the front side of the semiconductor substrate. A plurality of clear color-filters is disposed on the backside of the semiconductor substrate. A plurality of metal rings encircles the plurality of clear color-filters.

摘要翻译： 一种器件包括具有正面和背面的半导体衬底。 多个图像传感器设置在半导体衬底的前侧。 多个透明滤色器设置在半导体衬底的背面。 多个金属环围绕多个透明滤色器。

公开(公告)号：US08816457B2

公开(公告)日：2014-08-26

申请号：US13549792

申请日：2012-07-16

申请人： Jyh-Ming Hung ,  Jen-Cheng Liu ,  Dun-Nian Yaung ,  Chun-Chieh Chuang

发明人： Jyh-Ming Hung ,  Jen-Cheng Liu ,  Dun-Nian Yaung ,  Chun-Chieh Chuang

IPC分类号： H04N5/225

CPC分类号： H01L27/14687 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14629 ,  H01L27/14632

摘要： The present disclosure provides various embodiments of an image sensor device. An exemplary image sensor device includes an image sensing region disposed in a substrate; a multilayer interconnection structure disposed over the substrate; and a color filter formed in the multilayer interconnection structure and aligned with the image sensing region. The color filter has a length and a width, where the length is greater than the width.

摘要翻译： 本公开提供了图像传感器装置的各种实施例。 示例性图像传感器装置包括设置在基板中的图像感测区域; 布置在所述基板上的多层互连结构; 以及形成在多层互连结构中并与图像感测区域对准的滤色器。 滤色片具有长度和宽度，其长度大于宽度。

公开(公告)号：US08710607B2

公开(公告)日：2014-04-29

申请号：US13547269

申请日：2012-07-12

申请人： Szu-Ying Chen ,  Tzu-Jui Wang ,  Dun-Nian Yaung ,  Jen-Cheng Liu

发明人： Szu-Ying Chen ,  Tzu-Jui Wang ,  Dun-Nian Yaung ,  Jen-Cheng Liu

IPC分类号： H01L31/18 ,  H01L31/02 ,  H01L27/146

CPC分类号： H01L27/14636 ,  H01L24/06 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14634 ,  H01L27/1464 ,  H01L2224/0603 ,  H01L2224/06131 ,  H01L2924/12043

摘要： Methods and apparatus for packaging a backside illuminated (BSI) image sensor or a BSI sensor device with an application specific integrated circuit (ASIC) are disclosed. A bond pad array may be formed in a bond pad area of a BSI sensor where the bond pad array comprises a plurality of bond pads electrically interconnected, wherein each bond pad of the bond pad array is of a small size which can reduce the dishing effect of a big bond pad. The plurality of bond pads of a bond pad array may be interconnected at the same layer of the pad or at a different metal layer. The BSI sensor may be bonded to an ASIC in a face-to-face fashion where the bond pad arrays are aligned and bonded together.

摘要翻译： 公开了用专用集成电路（ASIC）封装背面照明（BSI）图像传感器或BSI传感器装置的方法和装置。 接合焊盘阵列可以形成在BSI传感器的接合焊盘区域中，其中接合焊盘阵列包括电互连的多个接合焊盘，其中接合焊盘阵列的每个接合焊盘是小尺寸的，这可以减小凹陷效应 的大债券垫。 接合焊盘阵列的多个接合焊盘可以在焊盘的相同层处或在不同的金属层处互连。 BSI传感器可以以面对面的方式结合到ASIC，其中接合焊盘阵列对准并结合在一起。