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    Methods for placing substrates in contact with molten solder
    1.
    发明授权
    Methods for placing substrates in contact with molten solder 有权
    使基板与熔融焊料接触的方法

    公开(公告)号：US07918383B2

    公开(公告)日：2011-04-05

    申请号：US11140420

    申请日：2005-05-27

    申请人： Kyle K. Kirby ,  Salman Akram ,  Daniel P. Cram ,  Roy T. Lange ,  Warren M. Farnworth

    发明人： Kyle K. Kirby ,  Salman Akram ,  Daniel P. Cram ,  Roy T. Lange ,  Warren M. Farnworth

    IPC分类号： B23K31/02

    CPC分类号： B23K1/085 ,  B23K1/0016 ,  B23K3/0653 ,  B23K2101/40

    摘要： Methods and devices for placing a semiconductor wafer or other substrate in contact with solder are described. A wave soldering apparatus includes a solder bath, a nozzle for producing a solder wave, and a jig for orienting a substrate in a substantially vertical orientation and placing the substrate in contact with a cascading solder wave. In another wave soldering apparatus, a jig orients a semiconductor wafer in a substantially horizontal orientation in contact with the solder wave. Another soldering apparatus includes a tank comprising molten solder and a fixture configured to orient one or more semiconductor wafers in a substantially vertical orientation. Methods of placing semiconductor wafers or other substrates in contact with solder using the devices of the present invention are also disclosed.

    摘要翻译： 描述了将半导体晶片或其它基板与焊料接触的方法和装置。 波峰焊装置包括焊料槽，用于产生焊波的喷嘴和用于使基板垂直定向的夹具，并使基板与级联焊波接触。 在另一种波峰焊装置中，夹具使得与焊波接触的大致水平取向的半导体晶片。 另一个焊接装置包括一个包含熔融焊料和一个被配置为使一个或多个半导体晶片呈基本垂直取向取向的夹具的罐。 还公开了使用本发明的装置将半导体晶片或其它基板与焊料接触的方法。

    Frame structure and semiconductor attach process for use therewith for fabrication of image sensor packages and the like, and resulting packages
    3.
    发明授权
    Frame structure and semiconductor attach process for use therewith for fabrication of image sensor packages and the like, and resulting packages 有权
    用于制造图像传感器封装等的框架结构和半导体附着工艺以及所产生的封装

    公开(公告)号：US07645635B2

    公开(公告)日：2010-01-12

    申请号：US10919604

    申请日：2004-08-16

    申请人： Alan G. Wood ,  Kyle K. Kirby ,  Warren M. Farnworth ,  Salman Akram

    发明人： Alan G. Wood ,  Kyle K. Kirby ,  Warren M. Farnworth ,  Salman Akram

    IPC分类号： H01L21/00

    CPC分类号： H01L27/14618 ,  B33Y80/00 ,  H01L27/14625 ,  H01L2224/48091 ,  H01L2924/00014

    摘要： A semiconductor package such as an image sensor package, and methods for fabrication. A frame structure includes an array of frames, each having an aperture therethrough, into which an image sensor die in combination with a cover glass, filter, lens or other components may be installed in precise mutual alignment. Singulated image sensor dice and other components may be picked and placed into each frame of the frame structure. Alternatively, the frame structure may be configured to be aligned with and joined to a wafer bearing a plurality of image sensor dice, wherein optional, downwardly protruding skirts along peripheries of the frames may be received into kerfs cut along streets between die locations on the wafer, followed by installation of other package components. In either instance, the frame structure in combination with singulated image sensor dice or a joined wafer is singulated into individual image sensor packages. Various external connection approaches may be used for the packages.

    摘要翻译： 诸如图像传感器封装的半导体封装以及制造方法。 框架结构包括每个具有穿过其中的孔的框架阵列，图像传感器与盖玻片，过滤器，透镜或其它部件组合的模具可以精确相互对准地安装在该框架中。 单片图像传感器骰子和其他组件可以被拾取并放置在框架结构的每个帧中。 或者，框架结构可以被配置为与承载多个图像传感器骰子的晶片对准并且连接到其上，其中沿着框架的周边的任选的向下突出的裙边可以被接收到沿着晶片上的模具位置之间沿着街道切割的切口 ，然后安装其他包装组件。 在任一情况下，将帧结构与单独的图像传感器芯片或连接的晶片组合成单独的图像传感器封装。 各种外部连接方法可用于包装。

    Method of forming vias in semiconductor substrates without damaging active regions thereof and resulting structures
    4.
    发明授权
    Method of forming vias in semiconductor substrates without damaging active regions thereof and resulting structures 有权
    在半导体衬底中形成通孔的方法，而不损坏其有效区域和结果

    公开(公告)号：US07598167B2

    公开(公告)日：2009-10-06

    申请号：US11140402

    申请日：2005-05-27

    申请人： Charles M. Watkins ,  Kyle K. Kirby ,  Alan G. Wood ,  Salman Akram ,  Warren M. Farnworth

    发明人： Charles M. Watkins ,  Kyle K. Kirby ,  Alan G. Wood ,  Salman Akram ,  Warren M. Farnworth

    IPC分类号： H01L21/4763

    CPC分类号： H01L21/76898

    摘要： Methods for forming through vias in a semiconductor substrate and resulting structures are disclosed. In one embodiment, a through via may be formed by forming a partial via from the active surface through a conductive element thereon and a portion of the semiconductor substrate underlying the conductive element. The through via may then be completed by laser ablation or drilling from the back surface. In another embodiment, a partial via may be formed by laser ablation or drilling from the back surface of a semiconductor substrate to a predetermined distance therein. The through via may be completed from the active surface by forming a partial via extending through the conductive element and the underlying semiconductor substrate to intersect the laser-drilled partial via. In another embodiment, a partial via may first be formed by ablation or drilling from the back surface of the semiconductor substrate followed by dry etching to complete the through via and expose the underside of the conductive element.

    摘要翻译： 公开了在半导体衬底中形成贯通孔的方法和所得到的结构。 在一个实施例中，通孔可以通过在其上的导电元件和导电元件下面的半导体衬底的一部分从活性表面形成部分通孔而形成通孔。 然后可以通过从后表面的激光烧蚀或钻孔来完成通孔。 在另一个实施例中，部分通孔可以通过激光烧蚀或从半导体衬底的背面钻孔到其中的预定距离来形成。 通孔可以通过形成延伸穿过导电元件和下面的半导体衬底以与激光钻孔的部分通孔相交的部分通孔从活性表面完成。 在另一个实施例中，可以首先通过从半导体衬底的后表面进行烧蚀或钻孔形成部分通孔，然后进行干法蚀刻以完成通孔并暴露导电元件的下侧。

    Method of forming vias in semiconductor substrates and resulting structures
    9.
    发明授权
    Method of forming vias in semiconductor substrates and resulting structures 有权
    在半导体衬底和结构中形成通孔的方法

    公开(公告)号：US07855140B2

    公开(公告)日：2010-12-21

    申请号：US11781083

    申请日：2007-07-20

    申请人： Charles M. Watkins ,  Kyle K. Kirby ,  Alan G. Wood ,  Salman Akram ,  Warren M. Farnworth

    发明人： Charles M. Watkins ,  Kyle K. Kirby ,  Alan G. Wood ,  Salman Akram ,  Warren M. Farnworth

    IPC分类号： H01L21/4763

    CPC分类号： H01L21/76898

    摘要： Methods for forming through vias in a semiconductor substrate and resulting structures are disclosed. In one embodiment, a through via may be formed by forming a partial via from an active surface through a conductive element thereon and a portion of the substrate underlying the conductive element. The through via may then be completed by laser ablation or drilling from a back surface. In another embodiment, a partial via may be formed by laser ablation or drilling from the back surface of a substrate to a predetermined distance therein. The through via may be completed from the active surface by forming a partial via extending through the conductive element and the underlying substrate to intersect the laser-drilled partial via. In another embodiment, a partial via may first be formed by laser ablation or drilling from the back surface of the substrate followed by dry etching to complete the through via.

    摘要翻译： 公开了在半导体衬底中形成贯通孔的方法和所得到的结构。 在一个实施例中，可以通过从活性表面通过其上的导电元件和导电元件下面的基底的一部分形成部分通孔来形成通孔。 然后可以通过从后表面的激光烧蚀或钻孔来完成通孔。 在另一个实施例中，部分通孔可以通过激光烧蚀或从衬底的背面钻孔到其中的预定距离来形成。 通孔可以通过形成延伸通过导电元件和下面的衬底以与激光钻孔的部分通孔相交的部分通孔从活性表面完成。 在另一个实施例中，可以首先通过激光烧蚀或从衬底的背面进行钻孔形成部分通孔，然后通过干蚀刻来完成通孔。