Abstract:
A printed circuit board according to one embodiment of the present invention comprises an insulation board and a plurality of metal electrodes disposed on the insulation board, wherein: the plurality of metal electrodes include a first electrode and a second electrode; the first electrode includes a first surface parallel to an upper surface of the insulation board, a second surface facing the first surface, a first side surface disposed between the first surface and the second surface, and a second side surface facing the first side surface; a part of the first side surface and a part of the second side surface protrude toward the outside of the first electrode in the direction parallel to the upper surface of the insulation board; the first side surface protrudes farther in an area adjacent to the first surface than in an area adjacent to the second surface; and the second side surface protrudes farther in the area adjacent to the second surface than in the area adjacent to the first surface.
Abstract:
Disclosed are a hot plate and a method of manufacturing the same. The method includes the steps of preparing a first barrier layer, laminating a first heat transfer layer on the first barrier layer, and laminating a second barrier layer on the first heat transfer layer. The first barrier layer or the second barrier layer includes a plurality of first sub-nano-barrier layers and a plurality of second sub-nano-barrier layers. The hot plate includes a first barrier layer, a first heat transfer layer on the first barrier layer, and a second barrier layer on the first heat transfer layer. The first barrier layer or the second barrier layer includes a plurality of first sub-nano-barrier layers and a plurality of second sub-nano-barrier layers.
Abstract:
Disclosed is a method of manufacturing a thin film, the method including: growing an epitaxial layer on a surface of a wafer at a growth temperature, wherein the growing of the epitaxial layer comprises controlling a defect present on a surface of the wafer. Also, disclosed is a wafer including: a substrate; and an epitaxial layer located on the substrate, wherein a basal dislocation density of the epitaxial layer is equal to or less than 1/cm2.
Abstract translation:公开了一种制造薄膜的方法,该方法包括:在生长温度下在晶片的表面上生长外延层,其中外延层的生长包括控制晶片表面上存在的缺陷。 此外,公开了一种晶片,包括:基板; 以及位于所述衬底上的外延层,其中所述外延层的基底位错密度等于或小于1 / cm 2。
Abstract:
A circuit board according to an embodiment comprises: an insulation layer; a circuit pattern disposed on the upper surface or under the lower surface of the insulation layer; and a buffer layer disposed on at least one surface of the upper surface and the lower surface of the insulation layer, wherein the buffer layer includes carbon, nitrogen, and oxygen, the ratio of the nitrogen to the carbon ((carbon/nitrogen)*100) is 5 to 15, and the ratio of the oxygen to the carbon ((carbon/oxygen)*100) is 15 to 30.
Abstract:
A circuit board according to an embodiment includes an insulating layer; and a circuit pattern disposed on the insulating layer, wherein the circuit pattern includes a copper foil layer disposed on the insulating layer, a first plating layer disposed on the copper foil layer, and a second plating layer disposed on the first plating layer, and wherein the copper foil layer has a thickness in a range of 2 μm to 5 μm.
Abstract:
An electrophoretic particle according to an embodiment contains carbon black, and the electrophoretic particle comprises: a core portion; and a shell portion disposed to surround the outer surface of the core portion, wherein a protrusion portion is formed on the surface of the core portion, the core portion has a chromaticity index of 2 or less, the core portion has a light absorption rate of 90% to 99%, and the particle diameter of the electrophoretic particles is 50 nm to 800 nm.
Abstract:
A circuit board according to an embodiment includes an insulating layer; and a circuit pattern disposed on the insulating layer, wherein the circuit pattern includes a copper foil layer disposed on the insulating layer, a first plating layer disposed on the copper foil layer, and a second plating layer disposed on the first plating layer, and wherein the copper foil layer has a thickness in a range of 2 μm to 5 μm.
Abstract:
A circuit board according to one embodiment comprises a first insulation layer, a circuit pattern on the first insulation layer, and a second insulation layer on the circuit pattern, wherein a heat transfer member is arranged inside the first insulation layer and/or the second insulation layer, and the heat transfer member is arranged while coming in contact with a side surface of the insulation layer.
Abstract:
A circuit board according to an embodiment includes an insulating layer; and a circuit pattern disposed on the insulating layer, wherein the circuit pattern includes a copper foil layer disposed on the insulating layer, a first plating layer disposed on the copper foil layer, and a second plating layer disposed on the first plating layer, and wherein the copper foil layer has a thickness in a range of 2 μm to 5 μm.
Abstract:
A method for fabricating a silicon carbide epitaxial wafer according to the embodiment includes introducing a carbon source and a silicon source into a reactor in which a silicon carbide wafer is provided; heating the reactor; and adjusting an amount of the silicon source or the carbon source introduced into the reactor. A silicon carbide epitaxial wafer according to the embodiment includes a silicon carbide epitaxial layer having a surface roughness of 0.3 nm or less.