Layout design for a high power, GaN-based FET
    1.
    发明授权
    Layout design for a high power, GaN-based FET 有权
    高功率GaN基FET的布局设计

    公开(公告)号:US08319256B2

    公开(公告)日:2012-11-27

    申请号:US12821492

    申请日:2010-06-23

    摘要: A FET includes a substrate, a buffer layer disposed on the substrate, a channel layer disposed over the buffer layer and a barrier layer disposed over the channel layer. Source, gate and drain electrodes are located over the barrier layer and extend in a longitudinal direction thereon. A portion of the channel and barrier layers define a mesa extending in the longitudinal direction and the source and drain electrodes extend beyond an edge of the mesa. The gate electrodes extend along an edge sidewall of the mesa. A conductive source interconnect is disposed over the buffer layer and have a first end electrically connected to the source electrode. A first dielectric layer is disposed over the buffer layer and over the source interconnect. A gate via is formed in the first dielectric layer. A conductive gate node extends along the buffer layer and electrically connects the portion of the gate electrode extending along the sidewall of the mesa. A gate pad is disposed on the first dielectric layer adjacent the mesa. A conductive gate connect strip is located over the gate node and is in contact therewith. The gate strip is in electrical contact with the gate pad. A source via is formed in the first dielectric layer and a source pad is formed in the source via. The conductive source interconnect has a second end in electrical contact with the source pad.

    摘要翻译: FET包括衬底,设置在衬底上的缓冲层,设置在缓冲层上的沟道层和设置在沟道层上的阻挡层。 源极,栅极和漏极电极位于阻挡层的上方并沿其纵向方向延伸。 通道和阻挡层的一部分限定沿纵向方向延伸的台面,并且源电极和漏电极延伸超过台面的边缘。 栅电极沿着台面的边缘侧壁延伸。 导电源互连设置在缓冲层之上并且具有电连接到源电极的第一端。 第一介电层设置在缓冲层之上并且在源互连上。 在第一电介质层中形成栅极通孔。 导电栅极节点沿着缓冲层延伸并且电连接沿着台面的侧壁延伸的栅电极的部分。 栅极焊盘设置在与台面相邻的第一电介质层上。 导电栅极连接条位于栅极节点上方并与其接触。 栅极条与栅极焊盘电接触。 源极通孔形成在第一电介质层中,并且在源极通孔中形成源极焊盘。 导电源互连具有与源极焊盘电接触的第二端。

    LAYOUT DESIGN FOR A HIGH POWER, GaN-BASED FET
    2.
    发明申请
    LAYOUT DESIGN FOR A HIGH POWER, GaN-BASED FET 有权
    用于高功率GaN基FET的布局设计

    公开(公告)号:US20110316045A1

    公开(公告)日:2011-12-29

    申请号:US12821492

    申请日:2010-06-23

    IPC分类号: H01L29/772

    摘要: A FET includes a substrate, a buffer layer disposed on the substrate, a channel layer disposed over the buffer layer and a barrier layer disposed over the channel layer. Source, gate and drain electrodes are located over the barrier layer and extend in a longitudinal direction thereon. A portion of the channel and barrier layers define a mesa extending in the longitudinal direction and the source and drain electrodes extend beyond an edge of the mesa. The gate electrodes extend along an edge sidewall of the mesa. A conductive source interconnect is disposed over the buffer layer and have a first end electrically connected to the source electrode. A first dielectric layer is disposed over the buffer layer and over the source interconnect. A gate via is formed in the first dielectric layer. A conductive gate node extends along the buffer layer and electrically connects the portion of the gate electrode extending along the sidewall of the mesa. A gate pad is disposed on the first dielectric layer adjacent the mesa. A conductive gate connect strip is located over the gate node and is in contact therewith. The gate strip is in electrical contact with the gate pad. A source via is formed in the first dielectric layer and a source pad is formed in the source via. The conductive source interconnect has a second end in electrical contact with the source pad.

    摘要翻译: FET包括衬底,设置在衬底上的缓冲层,设置在缓冲层上的沟道层和设置在沟道层上的阻挡层。 源极,栅极和漏极电极位于阻挡层的上方并沿其纵向方向延伸。 通道和阻挡层的一部分限定沿纵向方向延伸的台面,并且源电极和漏电极延伸超过台面的边缘。 栅电极沿台面的边缘侧壁延伸。 导电源互连设置在缓冲层之上并且具有电连接到源电极的第一端。 第一介电层设置在缓冲层之上并且在源互连上。 在第一电介质层中形成栅极通孔。 导电栅极节点沿着缓冲层延伸并且电连接沿着台面的侧壁延伸的栅电极的部分。 栅极焊盘设置在与台面相邻的第一电介质层上。 导电栅极连接条位于栅极节点上方并与其接触。 栅极条与栅极焊盘电接触。 源极通孔形成在第一电介质层中,并且在源极通孔中形成源极焊盘。 导电源互连具有与源极焊盘电接触的第二端。

    GaN semiconductor based voltage conversion device
    9.
    发明授权
    GaN semiconductor based voltage conversion device 有权
    基于GaN半导体的电压转换装置

    公开(公告)号:US07116567B2

    公开(公告)日:2006-10-03

    申请号:US11029266

    申请日:2005-01-05

    IPC分类号: H02H3/20

    摘要: A converter is provided having an AC input and a DC output. The converter includes a rectifier that receives the AC input and that provides a rectifier output, a series connected current to magnetic field energy storage device and current interrupter connected across the rectifier output and a series connected gallium nitride diode and output charge storage device connected between a midpoint of the series connected magnetic field energy storage device and current interrupter and a terminal of the rectifier output and wherein the converter is characterized in not needing a transient voltage suppression circuit.

    摘要翻译: A转换器具有AC输入和DC输出。 该转换器包括一个接收AC输入并提供整流器输出的整流器,连接在整流器输出端的磁场能量存储装置和断流器的串联电流和串联的氮化镓二极管和输出电荷存储装置 串联连接的磁场蓄能装置的中点和电流断流器以及整流器输出的端子,其中转换器的特征在于不需要瞬态电压抑制电路。

    GAN SEMICONDUCTOR BASED VOLTAGE CONVERSION DEVICE
    10.
    发明申请
    GAN SEMICONDUCTOR BASED VOLTAGE CONVERSION DEVICE 有权
    基于GAN半导体的电压转换器件

    公开(公告)号:US20060145674A1

    公开(公告)日:2006-07-06

    申请号:US11029266

    申请日:2005-01-05

    IPC分类号: G05F1/40 G05F1/618

    摘要: A converter is provided having an AC input and a DC output. The converter includes a rectifier that receives the AC input and that provides a rectifier output, a series connected current to magnetic field energy storage device and current interrupter connected across the rectifier output and a series connected gallium nitride diode and output charge storage device connected between a midpoint of the series connected magnetic field energy storage device and current interrupter and a terminal of the rectifier output and wherein the converter is characterized in not needing a transient voltage suppression circuit.

    摘要翻译: A转换器具有AC输入和DC输出。 该转换器包括一个接收AC输入并提供整流器输出的整流器,连接在整流器输出端的磁场能量存储装置和断流器的串联电流和串联的氮化镓二极管和输出电荷存储装置 串联连接的磁场蓄能装置的中点和电流断流器以及整流器输出的端子,其中转换器的特征在于不需要瞬态电压抑制电路。