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    TECHNIQUES FOR MANUFACTURING A DOUBLE ELECTRODE MEMORY ARRAY
    1.
    发明申请
    TECHNIQUES FOR MANUFACTURING A DOUBLE ELECTRODE MEMORY ARRAY 有权

    公开(公告)号：US20230113960A1

    公开(公告)日：2023-04-13

    申请号：US17499709

    申请日：2021-10-12

    申请人： Micron Technology, Inc.

    发明人： Anna Maria Conti ,  Andrea Gotti ,  Pavan Reddy K. Aella

    IPC分类号： H01L27/24 ,  H01L45/00

    摘要： Methods, systems, and devices for techniques for manufacturing a double electrode memory array are described. A memory device may be fabricated using a sequence of fabrication steps that include depositing a first stack of materials including a conductive layer, an interface layer, and a first electrode layer. The first stack of materials may be etched to form a first set of trenches. A second stack of materials may be deposited on top of the first stack of materials. The second stack may include a second electrode layer in contact with the first electrode layer, a storage layer, and a third electrode layer. The second stack of materials may be etched to form a second set of trenches above the first set of trenches, and filled with a sealing layer and a dielectric material. The sealing layer may not extend substantially into the first set of trenches.

    DYNAMICALLY BOOSTING READ VOLTAGE FOR A MEMORY DEVICE
    2.
    发明申请
    DYNAMICALLY BOOSTING READ VOLTAGE FOR A MEMORY DEVICE 有权

    公开(公告)号：US20220165333A1

    公开(公告)日：2022-05-26

    申请号：US17101846

    申请日：2020-11-23

    申请人： Micron Technology, Inc.

    发明人： Nicola Ciocchini ,  Andrea Gotti

    IPC分类号： G11C13/00 ,  H01L45/00

    摘要： Systems, methods, and apparatus related to dynamically determining read voltages used in memory devices. In one approach, a memory device has a memory array including memory cells. One or more resistors are formed as part of the memory array. A memory controller increments a counter as write operations are performed on the memory cells. When the counter reaches a limit, a write operation is performed on the resistors. The write operation applies voltages to the resistors similarly as applied to the memory cells over time during normal operation. When performing a read operation, a current is applied to one or more of the resistors to determine a boost voltage. When reading the memory cells, a read voltage is adjusted based on the boost voltage. The memory cells are read using the adjusted read voltage.

    Apparatuses including electrodes having a conductive barrier material and methods of forming same
    3.
    发明授权
    Apparatuses including electrodes having a conductive barrier material and methods of forming same 有权

    公开(公告)号：US10651381B2

    公开(公告)日：2020-05-12

    申请号：US16040515

    申请日：2018-07-19

    申请人： MICRON TECHNOLOGY, INC.

    发明人： Swapnil A. Lengade ,  John M. Meldrim ,  Andrea Gotti

    IPC分类号： H01L45/00 ,  H01L27/24

    摘要： Apparatuses and methods of manufacture are disclosed for phase change memory cell electrodes having a conductive barrier material. In one example, an apparatus includes a first chalcogenide structure and a second chalcogenide structure stacked together with the first chalcogenide structure. A first electrode portion is coupled to the first chalcogenide structure, a second electrode portion is coupled to the second chalcogenide structure, and a third electrode portion is between the first and second electrode portions. A first portion of an electrically conductive barrier material is disposed between the first and third electrode portions. A second portion of the electrically conductive barrier material is disposed between the second and third electrode portions.

    Phase change memory cells including nitrogenated carbon materials, and related methods
    5.
    发明授权
    Phase change memory cells including nitrogenated carbon materials, and related methods 有权
    包括含氮碳材料的相变记忆单元及相关方法

    公开(公告)号：US09299929B2

    公开(公告)日：2016-03-29

    申请号：US14727106

    申请日：2015-06-01

    申请人： Micron Technology, Inc.

    发明人： Andrea Gotti ,  Luca Fumagalli

    IPC分类号： H01L21/8239 ,  H01L45/00 ,  H01L27/24

    CPC分类号： H01L45/1293 ,  H01L27/2427 ,  H01L27/2463 ,  H01L45/06 ,  H01L45/1253 ,  H01L45/143 ,  H01L45/144 ,  H01L45/16 ,  H01L45/1616 ,  H01L45/1625

    摘要： A phase change memory cell comprising a first chalcogenide compound on a first electrode, a first nitrogenated carbon material directly on the first chalcogenide compound, a second chalcogenide compound directly on the first nitrogenated carbon material, and a second nitrogenated carbon material directly on the second chalcogenide compound and directly on a second electrode. Other phase change memory cells are described. A method of forming a phase change memory cell and a phase change memory device are also described.

    摘要翻译： 一种相变存储单元，包括在第一电极上的第一硫族化合物，直接位于第一硫属化物化合物上的第一含氮碳材料，直接位于第一氮化碳材料上的第二硫族化合物，以及直接位于第二硫族化物上的第二含氮碳材料 化合物并直接在第二电极上。 其他相变存储单元被描述。 还描述了形成相变存储单元和相变存储器件的方法。

    Array Of Capacitors, Array Of Memory Cells, And Methods Used In Forming An Array Of Capacitors
    7.
    发明公开
    Array Of Capacitors, Array Of Memory Cells, And Methods Used In Forming An Array Of Capacitors 审中-公开

    公开(公告)号：US20240237330A1

    公开(公告)日：2024-07-11

    申请号：US18407675

    申请日：2024-01-09

    申请人： Micron Technology, Inc.

    发明人： Jordan D. Greenlee ,  Andrea Gotti ,  David McShannon ,  Silvia Borsari

    IPC分类号： H10B12/00 ,  G11C5/06

    CPC分类号： H10B12/31 ,  G11C5/063 ,  H01L28/91 ,  H10B12/482 ,  H10B12/488

    摘要： A method used in forming an array of capacitors comprises forming horizontally-spaced openings into sacrificial material and through insulative material that is between a top and bottom of the sacrificial material. The insulative material at least predominately comprises at least one of a silicon nitride, a silicon boronitride, and a silicon carbonitride. The insulative material with horizontally-spaced openings there-through comprises an insulative horizontal lattice. An insulative lining is deposited within the horizontally-spaced openings and directly above the sacrificial material. The insulative lining at least predominately comprises at least one of a silicon oxide and a silicon oxynitride. During the depositing, the insulative lining is intermittently exposed to a nitrogen-containing plasma. First capacitor electrodes that are individually within individual of the horizontally-spaced openings are formed laterally over the insulative lining that is in the horizontally-spaced openings. The sacrificial material is removed and a capacitor insulator is formed over the first capacitor electrodes and the insulative horizontal lattice. Second-capacitor-electrode material is formed over the capacitor insulator. Structure independent of method is disclosed.

    Dynamically boosting read voltage for a memory device
    8.
    发明授权
    Dynamically boosting read voltage for a memory device 有权

    公开(公告)号：US11373705B2

    公开(公告)日：2022-06-28

    申请号：US17101846

    申请日：2020-11-23

    申请人： Micron Technology, Inc.

    发明人： Nicola Ciocchini ,  Andrea Gotti

    IPC分类号： G11C13/00 ,  H01L45/00

    摘要： Systems, methods, and apparatus related to dynamically determining read voltages used in memory devices. In one approach, a memory device has a memory array including memory cells. One or more resistors are formed as part of the memory array. A memory controller increments a counter as write operations are performed on the memory cells. When the counter reaches a limit, a write operation is performed on the resistors. The write operation applies voltages to the resistors similarly as applied to the memory cells over time during normal operation. When performing a read operation, a current is applied to one or more of the resistors to determine a boost voltage. When reading the memory cells, a read voltage is adjusted based on the boost voltage. The memory cells are read using the adjusted read voltage.

    ELECTRONIC DEVICES COMPRISING METAL OXIDE MATERIALS AND RELATED METHODS AND SYSTEMS
    9.
    发明申请
    ELECTRONIC DEVICES COMPRISING METAL OXIDE MATERIALS AND RELATED METHODS AND SYSTEMS 有权

    公开(公告)号：US20210126193A1

    公开(公告)日：2021-04-29

    申请号：US16665679

    申请日：2019-10-28

    申请人： Micron Technology, Inc.

    发明人： Santanu Sarkar ,  Robert K. Grubbs ,  Farrell M. Good ,  Adam W. Saxler ,  Andrea Gotti

    IPC分类号： H01L45/00

    摘要： An electronic device comprising a stack structure comprising one or more stacks of materials and a metal oxide material adjacent to the stacks of materials. The materials of the stacks comprise one or more chalcogenide materials. The metal oxide material comprises aluminum oxide, aluminum silicate, hafnium oxide, hafnium silicate, zirconium oxide, zirconium silicate, or a combination thereof and the metal oxide material extends continuously from an upper portion of the one or more stacks of materials to a lower portion of the one or more stacks of materials. Additional electronic devices are disclosed, as are related systems and methods of forming an electronic device.