Semiconductor device and manufacturing method thereof
    1.
    发明授权
    Semiconductor device and manufacturing method thereof 失效
    半导体装置及其制造方法

    公开(公告)号:US06645859B1

    公开(公告)日:2003-11-11

    申请号:US10170579

    申请日:2002-06-14

    IPC分类号: H01L2144

    摘要: A manufacturing method of a semiconductor device allowing successful filling of an insulating film by HDP-CVD (High Density Plasma-Chemical Vapor Deposition) in a gap or valley between densely placed interconnections is provided. The method includes the steps of forming semiconductor elements on a semiconductor substrate, forming on the semiconductor elements a plurality of interconnections with top protective layers side by side to electrically connect the semiconductor elements, forming a protective insulating film by CVD other than HDP-CVD to cover top and side surfaces of the interconnections and a bottom surface of a gap between the interconnections, and forming an insulating film by HDP-CVD to cover the protective insulating film and to fill in the gap between the interconnections covered with the protective insulating film.

    摘要翻译: 提供了通过HDP-CVD(高密度等离子体 - 化学气相沉积)在密集布置的互连之间的间隙或谷中成功地填充绝缘膜的半导体器件的制造方法。 该方法包括以下步骤:在半导体衬底上形成半导体元件,在半导体元件上形成与顶部保护层并排的多个互连以电连接半导体元件,通过除HDP-CVD之外的CVD形成保护绝缘膜以形成保护绝缘膜 互连的顶盖和侧表面以及互连之间的间隙的底表面,并且通过HDP-CVD形成绝缘膜以覆盖保护绝缘膜并填充被保护绝缘膜覆盖的互连之间的间隙。

    Method of manufacturing semiconductor device
    2.
    发明授权
    Method of manufacturing semiconductor device 失效
    制造半导体器件的方法

    公开(公告)号:US06544904B1

    公开(公告)日:2003-04-08

    申请号:US10157882

    申请日:2002-05-31

    IPC分类号: H01L2131

    摘要: A method of manufacturing a semiconductor device is provided, which prevents a polyimide film from coming unstuck from a film to be subjected to isotropic etching, and further prevents deposits adhered to respective side faces of the films from coming off, during a heat treatment for imidizing the polyimide film. Isotropic etching is performed on a silicon nitride film 4 using, as a mask, a polyimide film 5 having a predetermined pattern formed therein. Next, a heat treatment is carried out to imidize the polyimide film 5 prior to performing anisotropic etching on a silicon oxide film 3. During the heat treatment for imidizing the polyimide film 5, since deposits, which are to be generated by anisotropic etching, are not yet adhered to the respective side faces of the films, the polyimide film 5 does not come unstuck from the silicon nitride film 4. Further, the deposits which are adhered to the respective side face of the films after the heat treatment will not come off.

    摘要翻译: 提供一种制造半导体器件的方法,其防止聚酰亚胺膜从薄膜脱落以进行各向同性蚀刻,并且进一步防止在用于酰亚胺化的热处理期间粘附到膜的各个侧面的沉积物脱落 聚酰亚胺薄膜。 在氮化硅膜4上进行各向同性蚀刻,使用形成有预定图案的聚酰亚胺膜5作为掩模。 接下来,在对氧化硅膜3进行各向异性蚀刻之前,进行热处理以对聚酰亚胺膜5进行酰亚胺化。在酰亚胺化聚酰亚胺膜5的热处理中,由于通过各向异性蚀刻产生的沉积物为 还没有粘附到膜的各个侧面,聚酰亚胺膜5不会从氮化硅膜4脱落。此外,附着在热处理后的膜的相应侧面的沉积物将不会脱落 。

    Interconnection structure of semiconductor device
    3.
    发明授权
    Interconnection structure of semiconductor device 失效
    半导体器件的互连结构

    公开(公告)号:US07489040B2

    公开(公告)日:2009-02-10

    申请号:US11635495

    申请日:2006-12-08

    IPC分类号: H01L23/48

    摘要: An interconnection is provided with a dummy interconnection connected to an interconnection body, and the dummy interconnection is provided with a stress concentration portion in which tensile stress higher than that of the interconnection body is generated. In proximity to the stress concentration portion, an insulating film formed by high-density plasma CVD is provided, and the tensile stress is generated in the stress concentration portion by the insulating film. With this structure, the occurrence of a void can be prevented at any position in the interconnection body.

    摘要翻译: 互连设置有连接到互连体的虚拟互连,并且虚设互连设置有应力集中部,其中产生比互连体高的拉伸应力。 在应力集中部分附近,设置通过高密度等离子体CVD形成的绝缘膜,并且通过绝缘膜在应力集中部分产生拉伸应力。 利用这种结构,可以防止在互连体中的任何位置发生空隙。

    Interconnection structure of semiconductor device
    4.
    发明申请
    Interconnection structure of semiconductor device 失效
    半导体器件的互连结构

    公开(公告)号:US20070096322A1

    公开(公告)日:2007-05-03

    申请号:US11635495

    申请日:2006-12-08

    IPC分类号: H01L23/52

    摘要: An interconnection is provided with a dummy interconnection connected to an interconnection body, and the dummy interconnection is provided with a stress concentration portion in which tensile stress higher than that of the interconnection body is generated. In proximity to the stress concentration portion, an insulating film formed by high-density plasma CVD is provided, and the tensile stress is generated in the stress concentration portion by the insulating film. With this structure, the occurrence of a void can be prevented at any position in the interconnection body.

    摘要翻译: 互连设置有连接到互连体的虚拟互连,并且虚设互连设置有应力集中部,其中产生比互连体高的拉伸应力。 在应力集中部分附近,设置通过高密度等离子体CVD形成的绝缘膜,并且通过绝缘膜在应力集中部分产生拉伸应力。 利用这种结构,可以防止在互连体中的任何位置发生空隙。

    Motor and motor for electric power steering
    8.
    发明授权
    Motor and motor for electric power steering 有权
    用于电动助力转向的电动机和电动机

    公开(公告)号:US08841805B2

    公开(公告)日:2014-09-23

    申请号:US13408542

    申请日:2012-02-29

    IPC分类号: H02K11/00

    摘要: A motor has a motor body and a control unit, which is joined to the motor body. A resolver is connected to the control unit through a flat cable. The flat cable is arranged such that the width direction of the flat cable corresponds with a circumferential direction of the motor body. The flat cable extends outwardly in a radial direction of the motor case.

    摘要翻译: 马达具有马达主体和控制单元,其连接到马达主体。 旋转变压器通过扁平电缆连接到控制单元。 扁平电缆布置成使得扁平电缆的宽度方向对应于电动机主体的圆周方向。 扁平电缆沿电动机壳体的径向方向向外延伸。