公开(公告)号：US20080044957A1

公开(公告)日：2008-02-21

申请号：US11870631

申请日：2007-10-11

申请人： James Chambers ,  Mark Visokay ,  Luigi Colombo ,  Antonio Rotondaro

发明人： James Chambers ,  Mark Visokay ,  Luigi Colombo ,  Antonio Rotondaro

IPC分类号： H01L21/84

CPC分类号： H01L21/823842

摘要： Forming metal gate transistors that have different work functions is disclosed. In one example, a first metal, which is a ‘mid gap’ metal, is manipulated in first and second regions by second and third metals, respectively, to move the work function of the first metal in opposite directions in the different regions. The resulting work functions in the different regions correspond to that of different types of the transistors that are to be formed.

摘要翻译： 公开了具有不同功函数的金属栅极晶体管。 在一个示例中，第一金属是“中间间隙”金属，分别在第一和第二区域中被第二和第三金属操纵，以在不同区域中沿相反方向移动第一金属的功函数。 在不同区域中产生的功函数对应于将要形成的不同类型的晶体管。

公开(公告)号：US20050136589A1

公开(公告)日：2005-06-23

申请号：US10738958

申请日：2003-12-17

申请人： Antonio Rotondaro ,  Douglas Mercer ,  Luigi Colombo ,  Mark Visokay ,  Haowen Bu ,  Malcolm Bevan

发明人： Antonio Rotondaro ,  Douglas Mercer ,  Luigi Colombo ,  Mark Visokay ,  Haowen Bu ,  Malcolm Bevan

IPC分类号： H01L21/28 ,  H01L21/336 ,  H01L21/8242 ,  H01L29/51

CPC分类号： H01L21/28176 ,  H01L21/28194 ,  H01L29/517 ,  H01L29/518 ,  H01L29/6656 ,  H01L29/6659

摘要： Methods are disclosed that fabricating semiconductor devices with high-k dielectric layers. The invention removes portions of deposited high-k dielectric layers not below gates and covers exposed portions (e.g., sidewalls) of high-k dielectric layers during fabrication with an encapsulation layer, which mitigates defects in the high-k dielectric layers and contamination of process tools. The encapsulation layer can also be employed as an etch stop layer and, at least partially, in comprising sidewall spacers. As a result, a semiconductor device can be fabricated with a substantially uniform equivalent oxide thickness.

摘要翻译： 公开了制造具有高k电介质层的半导体器件的方法。 本发明除了不在门下方的沉积的高k电介质层的部分，并且在用封装层制造期间覆盖高k电介质层的暴露部分（例如，侧壁），这减轻了高k电介质层中的缺陷和工艺污染 工具 封装层也可以用作蚀刻停止层，并且至少部分地包括侧壁间隔物。 结果，可以制造具有基本均匀的等效氧化物厚度的半导体器件。

公开(公告)号：US20050124121A1

公开(公告)日：2005-06-09

申请号：US10731647

申请日：2003-12-09

申请人： Antonio Rotondaro ,  James Chambers ,  Mark Visokay ,  Luigi Colombo

发明人： Antonio Rotondaro ,  James Chambers ,  Mark Visokay ,  Luigi Colombo

IPC分类号： C23C16/56 ,  H01L21/28 ,  H01L21/31 ,  H01L21/314 ,  H01L21/316 ,  H01L21/336 ,  H01L21/4763 ,  H01L21/8242 ,  H01L29/51

CPC分类号： H01L21/02318 ,  C23C16/56 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/3143 ,  H01L21/31641 ,  H01L21/31645 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518

摘要： The present invention pertains to annealing a high dielectric constant (high-k) material in a manner that substantially reduces or eliminates disadvantages and problems heretofore associated with the same. In particular, the high-k material is annealed in an ambient having a single chemistry of nitrogen and hydrogen, such as ammonia (NH3), to nitride and react unwanted impurities, and an oxidizer to oxidize and densify the high-k material, while mitigating growth of a lower-k material at an interface of the high-k material and an underlying substrate. Additionally, particular temperatures and pressures are utilized within the process so that the risk of an undesired exothermic reaction is mitigated. Annealing the high-k material in accordance with manners disclosed herein has application to semiconductor fabrication processes and, as such, is discussed herein within the context of the same.

摘要翻译： 本发明涉及以大大减少或消除与之相关的缺点和问题的方式退火高介电常数（高k）材料。 特别地，高k材料在具有氮和氢的单一化学性质（例如氨（NH 3））的环境中退火至氮化物并反应不需要的杂质，以及氧化剂氧化和 致密化高k材料，同时减轻在高k材料和下层衬底的界面处的较低k材料的生长。 此外，在该方法中利用特定的温度和压力，以便减轻不期望的放热反应的风险。 根据本文公开的方式对高k材料进行退火，已经应用于半导体制造工艺，并且因此本文在其上下文中讨论。

公开(公告)号：US20050233533A1

公开(公告)日：2005-10-20

申请号：US10826516

申请日：2004-04-16

申请人： Husam Alshareef ,  Mark Visokay ,  Antonio Rotondaro ,  Luigi Colombo

发明人： Husam Alshareef ,  Mark Visokay ,  Antonio Rotondaro ,  Luigi Colombo

IPC分类号： H01L21/28 ,  H01L21/321 ,  H01L21/4763 ,  H01L21/8238

CPC分类号： H01L21/321 ,  H01L21/28079 ,  H01L21/823835 ,  H01L21/823842

摘要： The present invention provides a semiconductor device, a method of manufacture therefor, and a method for manufacturing an integrated circuit. The semiconductor device (100), among other possible elements, includes a first transistor (120) located over a semiconductor substrate (110), wherein the first transistor (120) has a metal gate electrode (135) having a work function, and a second transistor (160) located over the semiconductor substrate (110) and proximate the first transistor (120), wherein the second transistor (160) has a plasma altered metal gate electrode (175) having a different work function.

摘要翻译： 本发明提供一种半导体器件及其制造方法以及集成电路的制造方法。 半导体器件（100）以及其他可能的元件包括位于半导体衬底（110）上方的第一晶体管（120），其中第一晶体管（120）具有具有功函数的金属栅电极（135） 第二晶体管（160）位于半导体衬底（110）上并且靠近第一晶体管（120），其中第二晶体管（160）具有具有不同功函数的等离子体改变的金属栅电极（175）。

公开(公告)号：US20050136690A1

公开(公告)日：2005-06-23

申请号：US10739617

申请日：2003-12-18

申请人： Luigi Colombo ,  James Chambers ,  Mark Visokay ,  Antonio Rotondaro

发明人： Luigi Colombo ,  James Chambers ,  Mark Visokay ,  Antonio Rotondaro

IPC分类号： C23C16/56 ,  H01L21/28 ,  H01L21/314 ,  H01L21/316 ,  H01L21/318 ,  H01L29/51 ,  H01L29/78 ,  H01L21/31 ,  H01L21/8242 ,  H01L21/469

CPC分类号： H01L21/02318 ,  C23C16/56 ,  H01L21/02323 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/3143 ,  H01L21/31608 ,  H01L21/31616 ,  H01L21/31641 ,  H01L21/31645 ,  H01L21/318 ,  H01L29/518 ,  H01L29/78

摘要： A method for improving high-κ gate dielectric film (104) properties. The high-κ film (104) is subjected to a two step anneal sequence. The first anneal is performed in a reducing ambient (106) with low partial pressure of oxidizer to promote film relaxation and increase by-product diffusion and desorption. The second anneal is performed in an oxidizing ambient (108) with a low partial pressure of reducer to remove defects and impurities.

摘要翻译： 一种改善高卡门电介质膜（104）性能的方法。 对高卡帕膜（104）进行两步退火处理。 第一退火在具有低分压氧化剂的还原环境（106）中进行，以促进膜弛豫并增加副产物扩散和解吸附。 第二次退火在具有低分压还原剂的氧化环境（108）中进行以除去缺陷和杂质。

公开(公告)号：US20050136580A1

公开(公告)日：2005-06-23

申请号：US10745313

申请日：2003-12-22

申请人： Luigi Colombo ,  James Chambers ,  Mark Visokay ,  Antonio Rotondaro

发明人： Luigi Colombo ,  James Chambers ,  Mark Visokay ,  Antonio Rotondaro

IPC分类号： H01L21/336 ,  H01L21/8238 ,  H01L29/51 ,  H01L29/78 ,  H01L21/00 ,  H01L21/4763 ,  H01L21/8234

CPC分类号： H01L29/7833 ,  H01L21/823828 ,  H01L21/823857 ,  H01L29/51 ,  H01L29/6656 ,  H01L29/6659

摘要： The present invention pertains to forming a transistor in the absence of hydrogen, or in the presence of a significantly reduced amount of hydrogen. In this manner, a high-k material can be utilized to form a gate dielectric layer in the transistor and facilitate device scaling while mitigating defects that can be introduced into the high-k material by the presence of hydrogen and/or hydrogen containing compounds.

摘要翻译： 本发明涉及在不存在氢的情况下形成晶体管，或者在显着减少量的氢的存在下。 以这种方式，可以利用高k材料在晶体管中形成栅极电介质层，并且便于器件缩放，同时减轻可通过存在氢和/或含氢化合物引入高k材料的缺陷。

公开(公告)号：US20080057739A1

公开(公告)日：2008-03-06

申请号：US11924132

申请日：2007-10-25

申请人： Luigi Colombo ,  James Chambers ,  Mark Visokay ,  Antonio Rotondaro

发明人： Luigi Colombo ,  James Chambers ,  Mark Visokay ,  Antonio Rotondaro

IPC分类号： H01L21/469

CPC分类号： H01L21/02318 ,  C23C16/56 ,  H01L21/02323 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/3143 ,  H01L21/31608 ,  H01L21/31616 ,  H01L21/31641 ,  H01L21/31645 ,  H01L21/318 ,  H01L29/518 ,  H01L29/78

摘要： A method for improving high-κ gate dielectric film (104) properties. The high-κ film (104) is subjected to a two step anneal sequence. The first anneal is performed in a reducing ambient (106) with low partial pressure of oxidizer to promote film relaxation and increase by-product diffusion and desorption. The second anneal is performed in an oxidizing ambient (108) with a low partial pressure of reducer to remove defects and impurities.

摘要翻译： 一种改善高卡门电介质膜（104）性能的方法。 对高卡帕膜（104）进行两步退火处理。 第一退火在具有低分压氧化剂的还原环境（106）中进行，以促进膜弛豫并增加副产物扩散和解吸附。 第二次退火在具有低分压还原剂的氧化环境（108）中进行以除去缺陷和杂质。

公开(公告)号：US20050023623A1

公开(公告)日：2005-02-03

申请号：US10928036

申请日：2004-08-27

申请人： Mark Visokay ,  Antonio Rotondaro ,  Luigi Colombo

发明人： Mark Visokay ,  Antonio Rotondaro ,  Luigi Colombo

IPC分类号： H01L21/28 ,  H01L21/336 ,  H01L21/8238 ,  H01L29/423 ,  H01L29/51 ,  H01L21/8234 ,  H01L29/76 ,  H01L31/062

CPC分类号： H01L21/28185 ,  H01L21/28114 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/28211 ,  H01L21/823857 ,  H01L29/42376 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66545

摘要： A MOSFET structure with high-k gate dielectrics for silicon or metal gates with gate dielectric liquid-based oxidation surface treatments prior to gate material deposition and gate formation.

摘要翻译： 在栅极材料沉积和栅极形成之前，具有用于硅或金属栅极的高k栅极电介质的MOSFET结构，其具有基于栅介质液体的氧化表面处理。

公开(公告)号：US20070284676A1

公开(公告)日：2007-12-13

申请号：US11745918

申请日：2007-05-08

申请人： Husam Alshareef ,  Mark Visokay ,  Antonio Rotondaro ,  Luigi Colombo

发明人： Husam Alshareef ,  Mark Visokay ,  Antonio Rotondaro ,  Luigi Colombo

IPC分类号： H01L31/00

CPC分类号： H01L21/321 ,  H01L21/28079 ,  H01L21/823835 ,  H01L21/823842

摘要： The present invention provides a semiconductor device, a method of manufacture therefor, and a method for manufacturing an integrated circuit. The semiconductor device (100), among other possible elements, includes a first transistor (120) located over a semiconductor substrate (110), wherein the first transistor (120) has a metal gate electrode (135) having a work function, and a second transistor (160) located over the semiconductor substrate (110) and proximate the first transistor (120), wherein the second transistor (160) has a plasma altered metal gate electrode (175) having a different work function.

摘要翻译： 本发明提供一种半导体器件及其制造方法以及集成电路的制造方法。 半导体器件（100）以及其他可能的元件包括位于半导体衬底（110）上方的第一晶体管（120），其中第一晶体管（120）具有具有功函数的金属栅电极（135） 第二晶体管（160）位于半导体衬底（110）上并且靠近第一晶体管（120），其中第二晶体管（160）具有具有不同功函数的等离子体改变的金属栅电极（175）。

公开(公告)号：US20070072363A1

公开(公告)日：2007-03-29

申请号：US11549340

申请日：2006-10-13

申请人： Mark Visokay ,  Luigi Colombo ,  James Chambers ,  Antonio Rotondaro ,  Haowen Bu

发明人： Mark Visokay ,  Luigi Colombo ,  James Chambers ,  Antonio Rotondaro ,  Haowen Bu

IPC分类号： H01L21/8242

CPC分类号： H01L21/28185 ,  H01L21/02148 ,  H01L21/02271 ,  H01L21/02332 ,  H01L21/02337 ,  H01L21/0234 ,  H01L21/28202 ,  H01L21/3144 ,  H01L21/3162 ,  H01L21/31637 ,  H01L21/31641 ,  H01L21/31645 ,  H01L21/31691 ,  H01L29/517 ,  H01L29/518

摘要： Methods are disclosed for treating deposited gate dielectric materials, in which the deposited dielectric is subjected to one or more non-oxidizing anneals to densify the material, one or more oxidizing anneals to mitigate material defects, and to a nitridation process to introduce nitrogen into the gate dielectric. The annealing may be performed before and/or after the nitridation to mitigate deposition and/or nitridation defects and to densify the material while mitigating formation of unwanted low dielectric constant oxides at the interface between the gate dielectric and the semiconductor substrate.