公开(公告)号：US06795161B2

公开(公告)日：2004-09-21

申请号：US09811419

申请日：2001-03-20

申请人： Masaya Ogura ,  Eiichi Murakami ,  Nobuaki Ogushi

发明人： Masaya Ogura ,  Eiichi Murakami ,  Nobuaki Ogushi

IPC分类号： G03B2752

CPC分类号： G03F7/70883

摘要： An exposure apparatus having an illuminating optics unit for irradiating a reticle, on which a predetermined pattern has been formed, with exposing light emitted from an exposure light source, a reticle stage on which the reticle is placed, a projection optics unit for projecting the predetermined pattern of the reticle onto a substrate, and a substrate stage on which the substrate is placed. The apparatus includes at least one chamber for internally accommodating the illuminating optics unit, the reticle stage, the projection optics unit and the substrate stage, a first pressure control device for making a value of pressure inside the at least one chamber higher than a value of pressure outside the at least one chamber, and a first correction device for correcting optical characteristics of the projection optics unit, by performing at least one of (i) moving an adjustment unit for adjusting the optical characteristics of the projection optics unit and (ii) shifting a wavelength of the exposing light, in accordance with the value of the pressure inside the at least one chamber.

摘要翻译： 一种曝光装置，具有照射光学单元，用于对已经形成预定图案的掩模版进行曝光，曝光从曝光光源发射的光，其上放置有掩模版的标线片台，投影光学单元， 掩模版到基板上的图案，以及放置基板的基板台。 该装置包括用于内部容纳照明光学单元，标线片台，投影光学单元和基板台的至少一个室，用于使至少一个室内的压力值高于第一压力控制装置的值的第一压力控制装置 以及第一校正装置，用于通过执行（i）移动用于调整投影光学单元的光学特性的调节单元和（ii）至少一个腔室的光学特性的调整单元中的至少一个来校正投影光学单元的光学特性; 根据至少一个室内的压力值移动曝光光的波长。

公开(公告)号：US08544344B2

公开(公告)日：2013-10-01

申请号：US13296365

申请日：2011-11-15

申请人： Eiichi Murakami

发明人： Eiichi Murakami

IPC分类号： G01F1/66

CPC分类号： G01F1/662 ,  G01F15/14

摘要： First and second piezoelectric transducers 2 and 3 are fixed to a tubular main body 1 via first and second fitting bases 4 and 5. On front and rear surfaces of an end portion of each of the first and second piezoelectric transducers 2 and 3 are provided first and second electrodes 6 and 7. When the tubular main body 1 is secured to a circuit box, each of the end portions of the first and second piezoelectric transducers 2 and 3 is inserted between first and second contact members provided on the circuit box such that the first and second electrodes 6 and 7 are electrically connected to the first and second contact members, respectively to connect the first and second piezoelectric transducers 2 and 3 to the circuit box by one touch operation.

摘要翻译： 第一和第二压电换能器2和3经由第一和第二配件基座4和5固定到管状主体1.在第一和第二压电换能器2和3中的每一个的端部的前表面和后表面被设置为第一 和第二电极6和7.当管状主体1固定到电路箱时，第一和第二压电换能器2和3的每个端部插入设置在电路箱上的第一和第二接触构件之间，使得 第一和第二电极6和7分别电连接到第一和第二接触构件，以通过一次触摸操作将第一和第二压电换能器2和3连接到电路箱。

公开(公告)号：US20060111805A1

公开(公告)日：2006-05-25

申请号：US11320778

申请日：2005-12-30

申请人： Natsuki Yokoyama ,  Yoshifumi Kawamoto ,  Eiichi Murakami ,  Fumihiko Uchida ,  Kenichi Mizuishi ,  Yoshio Kawamura

发明人： Natsuki Yokoyama ,  Yoshifumi Kawamoto ,  Eiichi Murakami ,  Fumihiko Uchida ,  Kenichi Mizuishi ,  Yoshio Kawamura

IPC分类号： G06F19/00

CPC分类号： C23C14/568 ,  C23C16/54 ,  G05B19/41865 ,  G05B2219/45031 ,  H01L21/67161 ,  H01L21/67167 ,  H01L21/67173 ,  H01L21/67184 ,  H01L21/67276 ,  H01L21/67727 ,  H01L21/67745 ,  Y02P90/14 ,  Y02P90/20 ,  Y02P90/28 ,  Y10S414/135 ,  Y10S414/137 ,  Y10S438/908 ,  Y10T29/41

摘要： A fabricating method for a system including a plurality of processing apparatuses connected to each other by an inter-apparatus transporter. The semiconductor waters are processed in the processing apparatuses and are transported to specified processing apparatuses in different time interval that are set to N times a unit time interval. Since the fabricating system includes processing apparatuses and an inter-apparatus transporter that are periodically controlled at time intervals related to a unit time, intervals related to a unit time, the scheduling of a plurality of works can be made efficiently to enhance the level of optimization, thus improving the productivity.

摘要翻译： 一种用于系统的制造方法，包括通过机构间运送器彼此连接的多个处理装置。 半导体水在处理装置中进行处理，并以不同的时间间隔被传送到规定的处理装置，时间间隔设定为单位时间间隔的N倍。 由于制造系统包括以与单位时间相关的时间间隔周期性地控制的处理装置和装置间运送器，所以与单位时间相关的间隔，可以有效地进行多个作品的调度以增强优化级别 ，从而提高生产率。

公开(公告)号：US5562800A

公开(公告)日：1996-10-08

申请号：US308442

申请日：1994-09-19

申请人： Yoshio Kawamura ,  Yoshifumi Kawamoto ,  Fumihiko Uchida ,  Kenichi Mizuishi ,  Natsuki Yokoyama ,  Eiichi Murakami ,  Yoshinori Nakayama ,  Eiichi Seya

发明人： Yoshio Kawamura ,  Yoshifumi Kawamoto ,  Fumihiko Uchida ,  Kenichi Mizuishi ,  Natsuki Yokoyama ,  Eiichi Murakami ,  Yoshinori Nakayama ,  Eiichi Seya

IPC分类号： B65G49/00 ,  B65G49/07 ,  H01L21/00 ,  H01L21/02 ,  H01L21/027 ,  H01L21/677

CPC分类号： H01L21/67748 ,  H01L21/67167 ,  H01L21/6719 ,  H01L21/67196 ,  H01L21/67742 ,  Y10S414/135 ,  Y10S414/139 ,  Y10S438/935

摘要： A wafer transport method includes the steps of preparing a semiconductor process equipment having a transport chamber and a process chamber. An interface means connects the transport chamber to the process chamber. A transport means transports a semiconductor wafer from the transport chamber to the process chamber by way of the interface means. The transport means mounting a substrate is inserted into a communicating corridor including a supply means and an exhaust means. The substrate is transported while performing the supply and exhaust by sequentially controlling a supply shutoff means, an exhaust shutoff means, and a communicating shutoff means according to the position of a conductance part formed of a gap between the transport means and the communicating corridor. Thus, the substrate is transported at a high throughput without contamination of the substrate while keeping the different atmospheric conditions for the transport chamber and the process chamber, thereby manufacturing a semiconductor device with high performance capabilities.

摘要翻译： 晶片输送方法包括准备具有输送室和处理室的半导体工艺设备的步骤。 接口装置将输送室连接到处理室。 传送装置通过接口装置将半导体晶片从传送室传送到处理室。 安装基板的输送装置被插入到包括供给装置和排气装置的通信走廊中。 通过根据由输送装置和通信走廊之间的间隙形成的电导部分的位置依次控制供给切断装置，排气关闭装置和通信切断装置，在进行供给和排出的同时运送基板。 因此，在保持输送室和处理室的不同大气条件的同时，以高通量输送基板而不污染基板，从而制造具有高性能的半导体器件。

公开(公告)号：US5017798A

公开(公告)日：1991-05-21

申请号：US406090

申请日：1989-09-12

申请人： Eiichi Murakami ,  Michio Kohno ,  Akiyoshi Suzuki

发明人： Eiichi Murakami ,  Michio Kohno ,  Akiyoshi Suzuki

IPC分类号： G01N21/94 ,  G01N21/956

CPC分类号： G01N21/94 ,  G01N2021/4719 ,  G01N2021/95676

摘要： An apparatus usable with an object having surfaces, for examining the states of the surfaces, includes on irradiating system for irradiating the surfaces of the object with a single light beam, and a plurality of light-receiving systems provided in association with the surfaces of the object, respectively, the plural light-receiving systems being arranged to receive light scatteringly reflected from the surfaces of the object, respectively, and to produce outputs corresponding to the states of the surfaces of the object, respectively.

公开(公告)号：US07977238B2

公开(公告)日：2011-07-12

申请号：US12764411

申请日：2010-04-21

申请人： Takako Funakoshi ,  Eiichi Murakami ,  Kazumasa Yanagisawa ,  Kan Takeuchi ,  Hideo Aoki ,  Hizuru Yamaguchi ,  Takayuki Oshima ,  Kazuyuki Tsunokuni ,  Kousuke Okuyama

发明人： Takako Funakoshi ,  Eiichi Murakami ,  Kazumasa Yanagisawa ,  Kan Takeuchi ,  Hideo Aoki ,  Hizuru Yamaguchi ,  Takayuki Oshima ,  Kazuyuki Tsunokuni ,  Kousuke Okuyama

IPC分类号： H01L21/4763

CPC分类号： H01L23/53238 ,  H01L21/823871 ,  H01L23/5286 ,  H01L2924/0002 ,  H01L2924/00

摘要： A manufacturing technique is disclosed for producing a semiconductor integrated circuit device having plural layers of buried wirings, and such that there is prevented the occurrence of a discontinuity caused by stress migration at an interface between a plug connected at a bottom thereof to a buried wiring and the buried wiring. For example, in the case where the width of a first Cu wiring is not smaller than about 0.9 μm and is smaller than about 1.44 μm, and the width of a second Cu wiring and the diameter of a plug are about 0.18 μm, there are arranged two or more plugs which connect the first wirings and the second Cu wirings electrically with each other.

摘要翻译： 公开了一种用于制造具有多层埋置布线的半导体集成电路器件的制造技术，并且防止了在其底部连接到埋地布线的插头与嵌入布线之间的界面处的应力迁移引起的不连续性的发生，以及 埋地线。 例如，在第一Cu布线的宽度不小于约0.9μm且小于约1.44μm的情况下，并且第二Cu布线的宽度和塞子的直径为约0.18μm的情况下，存在 布置两个或更多个将第一布线和第二铜布线彼此电连接的插头。

公开(公告)号：US20080243293A1

公开(公告)日：2008-10-02

申请号：US12153926

申请日：2008-05-28

申请人： Natsuki Yokoyama ,  Yoshifumi Kawamoto ,  Eiichi Murakami ,  Fumihiko Uchida ,  Kenichi Mizuishi ,  Yoshio Kawamura

发明人： Natsuki Yokoyama ,  Yoshifumi Kawamoto ,  Eiichi Murakami ,  Fumihiko Uchida ,  Kenichi Mizuishi ,  Yoshio Kawamura

IPC分类号： G06F17/00

CPC分类号： C23C14/568 ,  C23C16/54 ,  G05B19/41865 ,  G05B2219/45031 ,  H01L21/67161 ,  H01L21/67167 ,  H01L21/67173 ,  H01L21/67184 ,  H01L21/67276 ,  H01L21/67727 ,  H01L21/67745 ,  Y02P90/14 ,  Y02P90/20 ,  Y02P90/28 ,  Y10S414/135 ,  Y10S414/137 ,  Y10S438/908 ,  Y10T29/41

摘要： A fabricating method for a system that includes a plurality of processing apparatuses connected to each other by an inter-apparatus transporter and a computer storing managing information of processing and transporting of semiconductor wafers. The processing apparatuses have an interface for loading and unloading a plurality of the semiconductor wafers that are contained in a carrier. The semiconductor waters are processed in processing chambers of the processing apparatuses and the result of processing is monitored. In the processing, a first carrier containing the plurality of the semiconductor wafers having been processed in the first processing apparatus is transported toward the second processing apparatus by the inter-apparatus transporter prior to unloading of a second carrier containing semiconductor wafers processed in the second processing apparatus, according to the managing information.

公开(公告)号：US07392106B2

公开(公告)日：2008-06-24

申请号：US11320610

申请日：2005-12-30

申请人： Natsuki Yokoyama ,  Yoshifumi Kawamoto ,  Eiichi Murakami ,  Fumihiko Uchida ,  Kenichi Mizuishi ,  Yoshio Kawamura

发明人： Natsuki Yokoyama ,  Yoshifumi Kawamoto ,  Eiichi Murakami ,  Fumihiko Uchida ,  Kenichi Mizuishi ,  Yoshio Kawamura

IPC分类号： G06F19/00

CPC分类号： C23C14/568 ,  C23C16/54 ,  G05B19/41865 ,  G05B2219/45031 ,  H01L21/67161 ,  H01L21/67167 ,  H01L21/67173 ,  H01L21/67184 ,  H01L21/67276 ,  H01L21/67727 ,  H01L21/67745 ,  Y02P90/14 ,  Y02P90/20 ,  Y02P90/28 ,  Y10S414/135 ,  Y10S414/137 ,  Y10S438/908 ,  Y10T29/41

摘要： A fabricating method for a system that includes a plurality of processing apparatuses connected to each other by an inter-apparatus transporter and a computer storing managing information of processing and transporting of semiconductor wafers. The processing apparatuses have an interface for loading and unloading a plurality of the semiconductor wafers that are contained in a carrier. The semiconductor waters are processed in processing chambers of the processing apparatuses and the result of processing is monitored. In the processing, a first carrier containing the plurality of the semiconductor wafers having been processed in the first processing apparatus is transported toward the second processing apparatus by the inter-apparatus transporter prior to unloading of a second carrier containing semiconductor wafers processed in the second processing apparatus, according to the managing information.

摘要翻译： 一种系统的制造方法，其包括通过机器间运输机彼此连接的多个处理装置和存储管理半导体晶片的处理和传输信息的计算机。 处理装置具有用于装载和卸载容纳在载体中的多个半导体晶片的界面。 在处理装置的处理室中处理半导体水，并监视处理结果。 在处理中，在卸载包含在第二处理中处理的半导体晶片的第二载体之前，将包含在第一处理装置中处理的多个半导体晶片的第一载体通过装置间传送器输送到第二处理装置 装置，根据管理信息。

公开(公告)号：US07046330B2

公开(公告)日：2006-05-16

申请号：US11229829

申请日：2005-09-20

申请人： Eiichi Murakami

发明人： Eiichi Murakami

IPC分类号： G03B27/52 ,  G03B27/42

CPC分类号： G03F9/7096 ,  G03F7/70883 ,  G03F9/7026 ,  Y10S438/947

摘要： An exposure apparatus for printing, by exposure, a pattern of an original onto a substrate includes a housing tightly filled with a predetermined ambience and for accommodating therein at least a portion of an exposure light optical axis, and a detection system having an optical system, wherein a portion of a light path of the detection system is disposed in a first space enclosed by the housing, and wherein at least another portion of the detection system including an electrical element thereof is disposed in a second space outside the housing.

摘要翻译： 用于通过曝光将原稿图案打印到基板上的曝光装置包括紧密地填充有预定环境并用于在其中容纳曝光光轴的至少一部分的外壳以及具有光学系统的检测系统， 其中所述检测系统的光路的一部分设置在由所述壳体包围的第一空间中，并且其中包括其电气元件的所述检测系统的至少另一部分设置在所述壳体外部的第二空间中。

公开(公告)号：US06953728B2

公开(公告)日：2005-10-11

申请号：US10775236

申请日：2004-02-11

申请人： Eiichi Murakami ,  Akio Nishida ,  Kazunori Umeda ,  Kousuke Okuyama ,  Toshiaki Yamanaka ,  Jiro Yugami ,  Shinichiro Kimura

发明人： Eiichi Murakami ,  Akio Nishida ,  Kazunori Umeda ,  Kousuke Okuyama ,  Toshiaki Yamanaka ,  Jiro Yugami ,  Shinichiro Kimura

IPC分类号： H01L29/43 ,  H01L21/8234 ,  H01L21/8238 ,  H01L21/8242 ,  H01L27/088 ,  H01L27/092 ,  H01L27/10 ,  H01L27/105 ,  H01L27/108 ,  H01L29/423 ,  H01L29/49 ,  H01L29/78 ,  H01L21/331 ,  H01L21/8222

CPC分类号： H01L27/10894 ,  H01L21/823412 ,  H01L21/823462 ,  H01L27/105 ,  H01L27/10873

摘要： This semiconductor device manufacturing method comprises the steps of: forming a thick gate oxide film (thick oxide film) in a first region of a substrate, forming a thin gate oxide film (thin oxide layer) in a second region, and then, applying oxynitridation to these gate oxide films; forming gate electrodes to 1d on these gate oxide films; and implanting an ion that contains nitrogen or nitrogen atoms into at least one part of an interface between the hick gate oxide film (thick oxide film) and the substrate before or after the step of forming the gate electrodes, thereby forming a highly oxy-nitrided region. In this manner, in a semiconductor device in which there coexist a MISFET having a thin gate insulation film and a MISFET having a thick gate insulation film, hot carrier reliability of the MISFET having the thick gate insulation film is improved.

摘要翻译： 该半导体器件制造方法包括以下步骤：在衬底的第一区域形成厚栅氧化膜（厚氧化物膜），在第二区域形成薄的栅极氧化膜（薄氧化物层），然后施加氧氮化 到这些栅氧化膜; 在这些栅极氧化膜上形成栅电极至1d; 以及在形成栅电极的步骤之前或之后，将含有氮或氮原子的离子注入到所述堰栅氧化膜（厚氧化物膜）和所述衬底之间的界面的至少一部分中，从而形成高度氧氮化 地区。 以这种方式，在并入具有薄栅极绝缘膜的MISFET和具有厚栅极绝缘膜的MISFET的半导体器件中，具有厚栅极绝缘膜的MISFET的热载流子可靠性得到改善。