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1.发明申请Methods of internal stress reduction in dielectric films with chemical incorporation and structures formed thereby 审中-公开具有化学结合的介电膜内部应力降低的方法及由此形成的结构公开(公告)号：US20070123059A1
公开(公告)日：2007-05-31
申请号：US11290409
申请日：2005-11-29
申请人： Michael Haverty , Grant Kloster , Sadasivan Shankar , Boyan Boyanov , Michael Goodner , Mansour Moinpour
发明人： Michael Haverty , Grant Kloster , Sadasivan Shankar , Boyan Boyanov , Michael Goodner , Mansour Moinpour
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： H01L21/3105 , H01L21/02203 , H01L21/02345 , H01L21/02359 , H01L21/31695 , H01L21/76826
摘要： Methods of forming a microelectronic structure are described. Embodiments of those methods include forming a porous dielectric layer comprising at least one active end group, and bonding at least one large atomic radii species to replace the at least one active end group, wherein a local swelling may be formed within a portion of the porous dielectric.
摘要翻译： 描述形成微电子结构的方法。 这些方法的实施方案包括形成包含至少一个活性端基的多孔电介质层，并且键合至少一个大的原子半径物质以代替至少一个活性端基，其中局部溶胀可以形成在多孔 电介质。
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公开(公告)号：US20060220251A1
公开(公告)日：2006-10-05
申请号：US11096678
申请日：2005-03-31
IPC分类号： H01L23/48
CPC分类号： H01L21/76826 , H01L21/02126 , H01L21/02203 , H01L21/02337 , H01L21/31695
摘要： A method of forming a film. The method comprises depositing a porous film. The porous film has active end groups; and preventing cross-linking among said active end groups, wherein the end groups are capped with less reactive or unreactive groups.
摘要翻译： 一种形成膜的方法。 该方法包括沉积多孔膜。 多孔膜具有活性端基; 并且阻止所述活性端基之间的交联，其中末端基团被较少反应性或非反应性基团封端。
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公开(公告)号：US20050287787A1
公开(公告)日：2005-12-29
申请号：US10880632
申请日：2004-06-29
IPC分类号： H01L21/316 , H01L21/768 , H01L21/4763 , H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L21/02178 , H01L21/02203 , H01L21/02274 , H01L21/02362 , H01L21/31695 , H01L21/76807 , H01L21/7682 , H01L2221/1047
摘要： A method for selecting and forming a low-k, relatively high E porous ceramic film in a semiconductor device is described. A ceramic material is selected having a relatively high Young's modulus and relatively lower dielectric constant. The k is reduced by making the film porous.
摘要翻译： 描述了在半导体器件中选择和形成低k，较高E多孔陶瓷膜的方法。 选择具有相对高的杨氏模量和相对较低的介电常数的陶瓷材料。 通过使膜多孔化来减小k。
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公开(公告)号：US20060068190A1
公开(公告)日：2006-03-30
申请号：US10956794
申请日：2004-09-30
CPC分类号： H01L23/5329 , H01L21/02126 , H01L21/02203 , H01L21/02216 , H01L21/02282 , H01L21/31695 , H01L2924/0002 , H01L2924/09701 , Y10T428/249956 , H01L2924/00
摘要： An electronic device that includes a molecular sieve layer is described herein. The molecular sieve layer may be used as a high mechanical strength, low dielectric constant insulating layer.
摘要翻译： 本文描述了包括分子筛层的电子器件。 分子筛层可以用作高机械强度低介电常数绝缘层。
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5.发明授权Polymer interlayer dielectric and passivation materials for a microelectronic device 有权用于微电子器件的聚合物层间电介质和钝化材料公开(公告)号：US08154121B2
公开(公告)日：2012-04-10
申请号：US12037625
申请日：2008-02-26
申请人： Kunal Shah , Michael Haverty , Sadasivan Shankar , Doug Ingerly , Grant Kloster
发明人： Kunal Shah , Michael Haverty , Sadasivan Shankar , Doug Ingerly , Grant Kloster
IPC分类号： H01L23/48
CPC分类号： H01L21/312 , H01L21/02118 , H01L23/5329 , H01L2924/0002 , H01L2924/00
摘要： Polymer interlayer dielectric and passivation materials for a microelectronic device are generally described. In one example, an apparatus includes one or more interconnect structures of a microelectronic device and one or more polymeric dielectric layers coupled with the one or more interconnect structures, the polymeric dielectric layers including copolymer backbones having a first monomeric unit and a second monomeric unit wherein the first monomeric unit has a different chemical structure than the second monomeric unit and wherein the copolymer backbones are cross-linked by a first cross-linker or a second cross-linker, or combinations thereof.
摘要翻译： 通常描述用于微电子器件的聚合物层间电介质和钝化材料。 在一个示例中，装置包括微电子器件的一个或多个互连结构以及与一个或多个互连结构耦合的一个或多个聚合物电介质层，所述聚合物电介质层包括具有第一单体单元和第二单体单元的共聚物主链，其中 第一单体单元具有与第二单体单元不同的化学结构，并且其中共聚物主链通过第一交联剂或第二交联剂或其组合交联。
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6.发明申请POLYMER INTERLAYER DIELECTRIC AND PASSIVATION MATERIALS FOR A MICROELECTRONIC DEVICE 有权用于微电子器件的聚合物中间层介质和钝化材料公开(公告)号：US20090212421A1
公开(公告)日：2009-08-27
申请号：US12037625
申请日：2008-02-26
申请人： Kunal Shah , Michael Haverty , Sadasivan Shankar , Doug Ingerly , Grant Kloster
发明人： Kunal Shah , Michael Haverty , Sadasivan Shankar , Doug Ingerly , Grant Kloster
IPC分类号： H01L23/48 , H01L21/302
CPC分类号： H01L21/312 , H01L21/02118 , H01L23/5329 , H01L2924/0002 , H01L2924/00
摘要： Polymer interlayer dielectric and passivation materials for a microelectronic device are generally described. In one example, an apparatus includes one or more interconnect structures of a microelectronic device and one or more polymeric dielectric layers coupled with the one or more interconnect structures, the polymeric dielectric layers including copolymer backbones having a first monomeric unit and a second monomeric unit wherein the first monomeric unit has a different chemical structure than the second monomeric unit and wherein the copolymer backbones are cross-linked by a first cross-linker or a second cross-linker, or combinations thereof.
摘要翻译： 通常描述用于微电子器件的聚合物层间电介质和钝化材料。 在一个示例中，装置包括微电子器件的一个或多个互连结构以及与一个或多个互连结构耦合的一个或多个聚合物电介质层，所述聚合物电介质层包括具有第一单体单元和第二单体单元的共聚物主链，其中 第一单体单元具有与第二单体单元不同的化学结构，并且其中共聚物主链通过第一交联剂或第二交联剂或其组合交联。
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公开(公告)号：US20150187900A1
公开(公告)日：2015-07-02
申请号：US14140629
申请日：2013-12-26
申请人： Sadasivan Shankar , MARK BOHR , Michael Haverty
发明人： Sadasivan Shankar , MARK BOHR , Michael Haverty
IPC分类号： H01L29/51 , H01L21/28 , H01L27/088
CPC分类号： H01L21/28194 , H01L21/823431 , H01L21/823462 , H01L27/088 , H01L27/0886 , H01L29/517
摘要： An integrated circuit including a transistor, wherein the transistor includes a substrate including a surface, a gate oxide deposited on the substrate surface and a gate deposited on the gate oxide. The gate oxide includes one or more dielectric domains and a band gap matrix. The dielectric domains includes a first material and the band gap matrix includes a second material, wherein a dielectric constant of the first material is greater than a dielectric constant of the second material and a band gap of the first material is less than a band gap of the second material.
摘要翻译： 一种包括晶体管的集成电路，其中晶体管包括包括表面的衬底，沉积在衬底表面上的栅极氧化物和沉积在栅极氧化物上的栅极。 栅极氧化物包括一个或多个电介质区域和带隙矩阵。 电介质区域包括第一材料，带隙基体包括第二材料，其中第一材料的介电常数大于第二材料的介电常数，并且第一材料的带隙小于第一材料的带隙 第二种材料。
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8.发明申请公开(公告)号：US20090001591A1
公开(公告)日：2009-01-01
申请号：US11771476
申请日：2007-06-29
IPC分类号： H01L23/52 , H01L21/4763
CPC分类号： H01L23/485 , H01L21/76801 , H01L21/76843 , H01L21/76849 , H01L21/76877 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： Techniques for reducing resistivity in metal interconnects by compressive straining are generally described. In one example, an apparatus includes a dielectric substrate, a thin film of metal coupled with the dielectric substrate, and an interconnect metal coupled to the thin film of metal, the thin film of metal having a lattice parameter that is smaller than the lattice parameter of the interconnect metal to compressively strain the interconnect metal.
摘要翻译： 通常描述通过压缩应变来降低金属互连中的电阻率的技术。 在一个示例中，设备包括电介质基板，与电介质基板耦合的金属薄膜和耦合到金属薄膜的互连金属，金属薄膜具有小于晶格参数的晶格参数 的互连金属，以压缩互连金属。
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公开(公告)号：US20060071300A1
公开(公告)日：2006-04-06
申请号：US10957231
申请日：2004-09-30
申请人： Michael Haverty , Tim Chen , Sadasivan Shankar
发明人： Michael Haverty , Tim Chen , Sadasivan Shankar
IPC分类号： H01L23/58
CPC分类号： H01L21/7682 , H01L21/02126 , H01L21/02203 , H01L21/02274 , H01L21/02304 , H01L21/314 , H01L21/31695 , H01L2221/1047
摘要： Numerous embodiments of an apparatus and method of a dielectric material having a low dielectric constant and good mechanical strength are described. In one embodiment a dielectric material having multiple porous regions is disposed over a substrate. A caged structure is bridged within the plurality of pores. In one particular embodiment, the caged structure may be carborane or a carborane derivative.
摘要翻译： 描述具有低介电常数和良好机械强度的介电材料的装置和方法的许多实施例。 在一个实施例中，具有多个多孔区域的电介质材料设置在衬底上。 笼形结构桥接在多个孔内。 在一个具体实施方案中，笼状结构可以是碳硼烷或碳硼烷衍生物。
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公开(公告)号：US20070224834A1
公开(公告)日：2007-09-27
申请号：US11582720
申请日：2006-10-17
申请人： Michael Haverty , Tim Chen , Sadasivan Shankar
发明人： Michael Haverty , Tim Chen , Sadasivan Shankar
IPC分类号： H01L21/31
CPC分类号： H01L21/7682 , H01L21/02126 , H01L21/02203 , H01L21/02274 , H01L21/02304 , H01L21/314 , H01L21/31695 , H01L2221/1047
摘要： Numerous embodiments of an apparatus and method of a dielectric material having a low dielectric constant and good mechanical strength are described. In one embodiment a dielectric material having multiple porous regions is disposed over a substrate. A caged structure is bridged within the plurality of pores. In one particular embodiment, the caged structure may be carborane or a carborane derivative.
摘要翻译： 描述具有低介电常数和良好机械强度的介电材料的装置和方法的许多实施例。 在一个实施例中，具有多个多孔区域的电介质材料设置在衬底上。 笼形结构桥接在多个孔内。 在一个具体实施方案中，笼状结构可以是碳硼烷或碳硼烷衍生物。
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