MODULATED COMPOSITIONAL AND STRESS CONTROLLED MULTILAYER ULTRATHIN CONFORMAL SiNx DIELECTRICS USED IN NANO DEVICE FABRICATION
    1.
    发明申请
    MODULATED COMPOSITIONAL AND STRESS CONTROLLED MULTILAYER ULTRATHIN CONFORMAL SiNx DIELECTRICS USED IN NANO DEVICE FABRICATION 审中-公开
    在纳米器件制造中使用的调制组合和应力控制的多层超大规模SiNx电介质

    公开(公告)号:US20130333923A1

    公开(公告)日:2013-12-19

    申请号:US13495545

    申请日:2012-06-13

    IPC分类号: C23C16/34 H05K1/02

    摘要: A layer of silicon nitride having a thickness from 0.5 nanometers to 2.4 nanometers is deposited on a substrate. A plasma nitridation process is carried out on the layer. These steps are repeated for a plurality of additional layers of silicon nitride, until a predetermined thickness is attained. Such steps can be used to provide a multilayer silicon nitride dielectric formed on a substrate having an upper surface of dielectric material with Cu and other conductors embedded within, and a plurality of steps. The multilayer silicon nitride dielectric has a plurality of individual layers each having a thickness from 0.5 nanometers to 2.4 nanometers, and the multilayer silicon nitride dielectric conformally covers the steps of the substrate with a conformality of at least seventy percent. A multilayer silicon nitride dielectric, and a multilevel back end of line interconnect wiring structure using same, are also provided.

    摘要翻译: 将厚度为0.5纳米至2.4纳米的氮化硅层沉积在基底上。 在层上进行等离子体氮化处理。 对于多个附加氮化硅层重复这些步骤,直到达到预定厚度。 可以使用这样的步骤来提供形成在具有介电材料的上表面的衬底上的多层氮化硅电介质,其中Cu和其它导体嵌入其中并且多个步骤。 多层氮化硅电介质具有各自具有0.5纳米至2.4纳米厚度的多个单独层,多层氮化硅电介质保形地覆盖具有至少百分之七十的保形度的基底的步骤。 还提供了多层氮化硅电介质,以及使用该多层氮化硅电介质的多层后端的布线结构。

    SELF-ALIGNED COMPOSITE M-MOx/DIELECTRIC CAP FOR Cu INTERCONNECT STRUCTURES
    6.
    发明申请
    SELF-ALIGNED COMPOSITE M-MOx/DIELECTRIC CAP FOR Cu INTERCONNECT STRUCTURES 有权
    用于Cu互连结构的自对准复合材料M-MOx /电介质盖

    公开(公告)号:US20110162874A1

    公开(公告)日:2011-07-07

    申请号:US12683590

    申请日:2010-01-07

    摘要: An interconnect structure is provided that has improved electromigration resistance as well as methods of forming such an interconnect structure. The interconnect structure includes an interconnect dielectric material having a dielectric constant of about 4.0 or less. The interconnect dielectric material has at least one opening therein that is filled with a Cu-containing material. The Cu-containing material within the at least one opening has an exposed upper surface that is co-planar with an upper surface of the interconnect dielectric material. The interconnect structure further includes a composite M-MOx cap located at least on the upper surface of the Cu-containing material within the at least one opening. The composite M-MOx cap includes an upper region that is composed of the metal having a higher affinity for oxygen than copper and copper oxide and a lower region that is composed of a non-stoichiometric oxide of said metal. The interconnect structure further includes a dielectric cap located on at least an upper surface of the composite M-MOx cap.

    摘要翻译: 提供了具有改进的电迁移阻力的互连结构以及形成这种互连结构的方法。 互连结构包括具有约4.0或更小的介电常数的互连电介质材料。 互连电介质材料在其中具有填充有含Cu材料的至少一个开口。 至少一个开口内的含Cu材料具有与互连电介质材料的上表面共面的暴露的上表面。 互连结构还包括至少位于至少一个开口内的含Cu材料的上表面上的复合M-MOx帽。 复合M-MOx帽包括由与氧和氧化铜相比具有比氧更高的亲和性的金属构成的上部区域和由所述金属的非化学计量氧化物构成的下部区域。 互连结构还包括位于复合M-MOx帽的至少上表面上的介电帽。